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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * HWMON driver for ASUS motherboards that publish some sensor values
4 * via the embedded controller registers.
5 *
6 * Copyright (C) 2021 Eugene Shalygin <[email protected]>
7
8 * EC provides:
9 * - Chipset temperature
10 * - CPU temperature
11 * - Motherboard temperature
12 * - T_Sensor temperature
13 * - VRM temperature
14 * - Water In temperature
15 * - Water Out temperature
16 * - CPU Optional fan RPM
17 * - Chipset fan RPM
18 * - VRM Heat Sink fan RPM
19 * - Water Flow fan RPM
20 * - CPU current
21 * - CPU core voltage
22 */
23
24#include <linux/acpi.h>
25#include <linux/bitops.h>
26#include <linux/dev_printk.h>
27#include <linux/dmi.h>
28#include <linux/hwmon.h>
29#include <linux/init.h>
30#include <linux/jiffies.h>
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/platform_device.h>
34#include <linux/sort.h>
35#include <linux/units.h>
36
37#include <linux/unaligned.h>
38
39static char *mutex_path_override;
40
41/* Writing to this EC register switches EC bank */
42#define ASUS_EC_BANK_REGISTER 0xff
43#define SENSOR_LABEL_LEN 16
44
45/*
46 * Arbitrary set max. allowed bank number. Required for sorting banks and
47 * currently is overkill with just 2 banks used at max, but for the sake
48 * of alignment let's set it to a higher value.
49 */
50#define ASUS_EC_MAX_BANK 3
51
52#define ACPI_LOCK_DELAY_MS 800
53
54/* ACPI mutex for locking access to the EC for the firmware */
55#define ASUS_HW_ACCESS_MUTEX_ASMX "\\AMW0.ASMX"
56
57#define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX"
58
59#define ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0 "\\_SB.PC00.LPCB.SIO1.MUT0"
60
61#define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0"
62
63#define ASUS_HW_ACCESS_MUTEX_SB_PCI0_LPCB_SIO1_MUT0 "\\_SB_.PCI0.LPCB.SIO1.MUT0"
64
65#define MAX_IDENTICAL_BOARD_VARIATIONS 3
66
67/* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */
68#define ACPI_GLOBAL_LOCK_PSEUDO_PATH ":GLOBAL_LOCK"
69
70typedef union {
71 u32 value;
72 struct {
73 u8 index;
74 u8 bank;
75 u8 size;
76 u8 dummy;
77 } components;
78} sensor_address;
79
80#define MAKE_SENSOR_ADDRESS(size, bank, index) { \
81 .value = (size << 16) + (bank << 8) + index \
82 }
83
84static u32 hwmon_attributes[hwmon_max] = {
85 [hwmon_chip] = HWMON_C_REGISTER_TZ,
86 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
87 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
88 [hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
89 [hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL,
90};
91
92struct ec_sensor_info {
93 char label[SENSOR_LABEL_LEN];
94 enum hwmon_sensor_types type;
95 sensor_address addr;
96};
97
98#define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \
99 .label = sensor_label, .type = sensor_type, \
100 .addr = MAKE_SENSOR_ADDRESS(size, bank, index), \
101 }
102
103enum ec_sensors {
104 /* chipset temperature [℃] */
105 ec_sensor_temp_chipset,
106 /* CPU temperature [℃] */
107 ec_sensor_temp_cpu,
108 /* CPU package temperature [℃] */
109 ec_sensor_temp_cpu_package,
110 /* motherboard temperature [℃] */
111 ec_sensor_temp_mb,
112 /* "T_Sensor" temperature sensor reading [℃] */
113 ec_sensor_temp_t_sensor,
114 /* like ec_sensor_temp_t_sensor, but at an alternate address [℃] */
115 ec_sensor_temp_t_sensor_alt1,
116 /* VRM temperature [℃] */
117 ec_sensor_temp_vrm,
118 /* VRM east (right) temperature [℃] */
119 ec_sensor_temp_vrme,
120 /* VRM west (left) temperature [℃] */
121 ec_sensor_temp_vrmw,
122 /* CPU Core voltage [mV] */
123 ec_sensor_in_cpu_core,
124 /* CPU_Opt fan [RPM] */
125 ec_sensor_fan_cpu_opt,
126 /* VRM heat sink fan [RPM] */
127 ec_sensor_fan_vrm_hs,
128 /* VRM east (right) heat sink fan [RPM] */
129 ec_sensor_fan_vrme_hs,
130 /* VRM west (left) heat sink fan [RPM] */
131 ec_sensor_fan_vrmw_hs,
132 /* Chipset fan [RPM] */
133 ec_sensor_fan_chipset,
134 /* Water flow sensor reading [RPM] */
135 ec_sensor_fan_water_flow,
136 /* USB4 fan [RPM] */
137 ec_sensor_fan_usb4,
138 /* M.2 fan [RPM] */
139 ec_sensor_fan_m2,
140 /* CPU current [A] */
141 ec_sensor_curr_cpu,
142 /* "Water_In" temperature sensor reading [℃] */
143 ec_sensor_temp_water_in,
144 /* "Water_Out" temperature sensor reading [℃] */
145 ec_sensor_temp_water_out,
146 /* "Water_Block_In" temperature sensor reading [℃] */
147 ec_sensor_temp_water_block_in,
148 /* "Water_Block_Out" temperature sensor reading [℃] */
149 ec_sensor_temp_water_block_out,
150 /* "T_sensor_2" temperature sensor reading [℃] */
151 ec_sensor_temp_t_sensor_2,
152 /* "Extra_1" temperature sensor reading [℃] */
153 ec_sensor_temp_sensor_extra_1,
154 /* "Extra_2" temperature sensor reading [℃] */
155 ec_sensor_temp_sensor_extra_2,
156 /* "Extra_3" temperature sensor reading [℃] */
157 ec_sensor_temp_sensor_extra_3,
158};
159
160#define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset)
161#define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu)
162#define SENSOR_TEMP_CPU_PACKAGE BIT(ec_sensor_temp_cpu_package)
163#define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb)
164#define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor)
165#define SENSOR_TEMP_T_SENSOR_ALT1 BIT(ec_sensor_temp_t_sensor_alt1)
166#define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm)
167#define SENSOR_TEMP_VRME BIT(ec_sensor_temp_vrme)
168#define SENSOR_TEMP_VRMW BIT(ec_sensor_temp_vrmw)
169#define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core)
170#define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt)
171#define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs)
172#define SENSOR_FAN_VRME_HS BIT(ec_sensor_fan_vrme_hs)
173#define SENSOR_FAN_VRMW_HS BIT(ec_sensor_fan_vrmw_hs)
174#define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset)
175#define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow)
176#define SENSOR_FAN_USB4 BIT(ec_sensor_fan_usb4)
177#define SENSOR_FAN_M2 BIT(ec_sensor_fan_m2)
178#define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu)
179#define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in)
180#define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out)
181#define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in)
182#define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out)
183#define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2)
184#define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1)
185#define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2)
186#define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3)
187
188/*
189 * The values for temperature sensor readings without physical sensors connected.
190 * The value varies across generations and is seemingly defined by the EC chip
191 * used in the given board.
192 */
193static const s32 temperature_blank_values[] = {-62, -60, -40};
194
195static const s32 environment_temp_sensors =
196 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_T_SENSOR_ALT1 |
197 SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT |
198 SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT |
199 SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 |
200 SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3;
201
202enum board_family {
203 family_unknown,
204 family_amd_400_series,
205 family_amd_500_series,
206 family_amd_600_series,
207 family_amd_800_series,
208 family_amd_trx_50,
209 family_amd_wrx_90,
210 family_intel_200_series,
211 family_intel_300_series,
212 family_intel_400_series,
213 family_intel_600_series,
214 family_intel_700_series
215};
216
217/*
218 * All the known sensors for ASUS EC controllers. These arrays have to be sorted
219 * by the full ((bank << 8) + index) register index (see asus_ec_block_read() as
220 * to why).
221 */
222static const struct ec_sensor_info sensors_family_amd_400[] = {
223 [ec_sensor_temp_chipset] =
224 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
225 [ec_sensor_temp_cpu] =
226 EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
227 [ec_sensor_temp_mb] =
228 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
229 [ec_sensor_temp_t_sensor] =
230 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
231 [ec_sensor_temp_vrm] =
232 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
233 [ec_sensor_in_cpu_core] =
234 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
235 [ec_sensor_fan_vrm_hs] =
236 EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
237 [ec_sensor_fan_cpu_opt] =
238 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc),
239 [ec_sensor_fan_chipset] =
240 /* no chipset fans in this generation */
241 EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00),
242 [ec_sensor_fan_water_flow] =
243 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4),
244 [ec_sensor_curr_cpu] =
245 EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
246 [ec_sensor_temp_water_out] =
247 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b),
248 [ec_sensor_temp_water_in] =
249 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d),
250};
251
252static const struct ec_sensor_info sensors_family_amd_500[] = {
253 [ec_sensor_temp_chipset] =
254 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
255 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
256 [ec_sensor_temp_mb] =
257 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
258 [ec_sensor_temp_t_sensor] =
259 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
260 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
261 [ec_sensor_in_cpu_core] =
262 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
263 [ec_sensor_fan_cpu_opt] =
264 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
265 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
266 [ec_sensor_fan_chipset] =
267 EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4),
268 [ec_sensor_fan_water_flow] =
269 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
270 [ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
271 [ec_sensor_temp_water_in] =
272 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
273 [ec_sensor_temp_water_out] =
274 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
275 [ec_sensor_temp_water_block_in] =
276 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02),
277 [ec_sensor_temp_water_block_out] =
278 EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03),
279 [ec_sensor_temp_sensor_extra_1] =
280 EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09),
281 [ec_sensor_temp_t_sensor_2] =
282 EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a),
283 [ec_sensor_temp_sensor_extra_2] =
284 EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b),
285 [ec_sensor_temp_sensor_extra_3] =
286 EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c),
287};
288
289static const struct ec_sensor_info sensors_family_amd_600[] = {
290 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30),
291 [ec_sensor_temp_cpu_package] =
292 EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
293 [ec_sensor_temp_mb] =
294 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x32),
295 [ec_sensor_temp_vrm] =
296 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33),
297 [ec_sensor_temp_t_sensor] =
298 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x36),
299 [ec_sensor_temp_t_sensor_alt1] =
300 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x37),
301 [ec_sensor_fan_cpu_opt] =
302 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
303 [ec_sensor_temp_water_in] =
304 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
305 [ec_sensor_temp_water_out] =
306 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
307};
308
309static const struct ec_sensor_info sensors_family_amd_800[] = {
310 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30),
311 [ec_sensor_temp_cpu_package] =
312 EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
313 [ec_sensor_temp_mb] =
314 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x32),
315 [ec_sensor_temp_vrm] =
316 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33),
317 [ec_sensor_temp_t_sensor] =
318 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x36),
319 [ec_sensor_fan_cpu_opt] =
320 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
321};
322
323static const struct ec_sensor_info sensors_family_amd_trx_50[] = {
324 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30),
325 [ec_sensor_temp_cpu_package] =
326 EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
327 [ec_sensor_temp_vrme] = EC_SENSOR("VRM_E", hwmon_temp, 1, 0x00, 0x33),
328 [ec_sensor_temp_vrmw] = EC_SENSOR("VRM_W", hwmon_temp, 1, 0x00, 0x34),
329 [ec_sensor_fan_cpu_opt] = EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
330 [ec_sensor_fan_vrmw_hs] = EC_SENSOR("VRM_E HS", hwmon_fan, 2, 0x00, 0xb4),
331 [ec_sensor_fan_vrme_hs] = EC_SENSOR("VRM_W HS", hwmon_fan, 2, 0x00, 0xbc),
332 [ec_sensor_temp_t_sensor] =
333 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x01, 0x04),
334};
335
336static const struct ec_sensor_info sensors_family_amd_wrx_90[] = {
337 [ec_sensor_temp_cpu_package] =
338 EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
339 [ec_sensor_temp_vrme] = EC_SENSOR("VRM_E", hwmon_temp, 1, 0x00, 0x33),
340 [ec_sensor_temp_vrmw] = EC_SENSOR("VRM_W", hwmon_temp, 1, 0x00, 0x34),
341 [ec_sensor_fan_cpu_opt] =
342 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
343 [ec_sensor_fan_vrmw_hs] =
344 EC_SENSOR("VRMW HS", hwmon_fan, 2, 0x00, 0xb4),
345 [ec_sensor_fan_usb4] = EC_SENSOR("USB4", hwmon_fan, 2, 0x00, 0xb6),
346 [ec_sensor_fan_vrme_hs] =
347 EC_SENSOR("VRME HS", hwmon_fan, 2, 0x00, 0xbc),
348 [ec_sensor_fan_m2] = EC_SENSOR("M.2", hwmon_fan, 2, 0x00, 0xbe),
349 [ec_sensor_temp_t_sensor] =
350 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x01, 0x04),
351};
352
353static const struct ec_sensor_info sensors_family_intel_200[] = {
354 [ec_sensor_temp_chipset] =
355 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
356 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
357 [ec_sensor_temp_mb] =
358 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
359 [ec_sensor_temp_t_sensor] =
360 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
361 [ec_sensor_fan_cpu_opt] =
362 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc),
363};
364
365static const struct ec_sensor_info sensors_family_intel_300[] = {
366 [ec_sensor_temp_chipset] =
367 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
368 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
369 [ec_sensor_temp_mb] =
370 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
371 [ec_sensor_temp_t_sensor] =
372 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
373 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
374 [ec_sensor_fan_cpu_opt] =
375 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
376 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
377 [ec_sensor_fan_water_flow] =
378 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
379 [ec_sensor_temp_water_in] =
380 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
381 [ec_sensor_temp_water_out] =
382 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
383};
384
385static const struct ec_sensor_info sensors_family_intel_400[] = {
386 [ec_sensor_temp_chipset] =
387 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
388 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
389 [ec_sensor_temp_mb] =
390 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
391 [ec_sensor_temp_t_sensor] =
392 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
393 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
394 [ec_sensor_fan_cpu_opt] =
395 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
396 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
397};
398
399static const struct ec_sensor_info sensors_family_intel_600[] = {
400 [ec_sensor_temp_t_sensor] =
401 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
402 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
403 [ec_sensor_fan_cpu_opt] =
404 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
405 [ec_sensor_fan_water_flow] =
406 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbe),
407 [ec_sensor_temp_water_in] =
408 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
409 [ec_sensor_temp_water_out] =
410 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
411 [ec_sensor_temp_water_block_in] =
412 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02),
413};
414
415static const struct ec_sensor_info sensors_family_intel_700[] = {
416 [ec_sensor_temp_t_sensor] =
417 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x01, 0x09),
418 [ec_sensor_temp_t_sensor_2] =
419 EC_SENSOR("T_Sensor 2", hwmon_temp, 1, 0x01, 0x05),
420 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33),
421 [ec_sensor_fan_cpu_opt] =
422 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
423 [ec_sensor_fan_water_flow] =
424 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
425 [ec_sensor_temp_water_in] =
426 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
427 [ec_sensor_temp_water_out] =
428 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
429};
430
431/* Shortcuts for common combinations */
432#define SENSOR_SET_TEMP_CHIPSET_CPU_MB \
433 (SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB)
434#define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT)
435#define SENSOR_SET_WATER_BLOCK \
436 (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT)
437
438struct ec_board_info {
439 unsigned long sensors;
440 /*
441 * Defines which mutex to use for guarding access to the state and the
442 * hardware. Can be either a full path to an AML mutex or the
443 * pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock,
444 * or left empty to use a regular mutex object, in which case access to
445 * the hardware is not guarded.
446 */
447 const char *mutex_path;
448 enum board_family family;
449};
450
451static const struct ec_board_info board_info_crosshair_viii_dark_hero = {
452 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
453 SENSOR_TEMP_T_SENSOR |
454 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
455 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW |
456 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
457 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
458 .family = family_amd_500_series,
459};
460
461static const struct ec_board_info board_info_crosshair_viii_hero = {
462 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
463 SENSOR_TEMP_T_SENSOR |
464 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
465 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
466 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU |
467 SENSOR_IN_CPU_CORE,
468 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
469 .family = family_amd_500_series,
470};
471
472static const struct ec_board_info board_info_crosshair_viii_impact = {
473 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
474 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
475 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
476 SENSOR_IN_CPU_CORE,
477 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
478 .family = family_amd_500_series,
479};
480
481static const struct ec_board_info board_info_crosshair_x670e_extreme = {
482 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
483 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
484 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_WATER_IN |
485 SENSOR_TEMP_WATER_OUT,
486 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
487 .family = family_amd_600_series,
488};
489
490static const struct ec_board_info board_info_crosshair_x670e_gene = {
491 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
492 SENSOR_TEMP_T_SENSOR |
493 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
494 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
495 .family = family_amd_600_series,
496};
497
498static const struct ec_board_info board_info_crosshair_x670e_hero = {
499 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
500 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
501 SENSOR_SET_TEMP_WATER,
502 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
503 .family = family_amd_600_series,
504};
505
506static const struct ec_board_info board_info_crosshair_x870e_hero = {
507 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
508 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
509 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT,
510 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
511 .family = family_amd_800_series,
512};
513
514static const struct ec_board_info board_info_maximus_vi_hero = {
515 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
516 SENSOR_TEMP_T_SENSOR |
517 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
518 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW,
519 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
520 .family = family_intel_300_series,
521};
522
523static const struct ec_board_info board_info_maximus_x_hero = {
524 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
525 SENSOR_TEMP_T_SENSOR |
526 SENSOR_TEMP_VRM | SENSOR_FAN_CPU_OPT,
527 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_LPCB_SIO1_MUT0,
528 .family = family_intel_300_series,
529};
530
531static const struct ec_board_info board_info_maximus_xi_hero = {
532 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
533 SENSOR_TEMP_T_SENSOR |
534 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
535 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW,
536 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
537 .family = family_intel_300_series,
538};
539
540static const struct ec_board_info board_info_maximus_z690_formula = {
541 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
542 SENSOR_SET_TEMP_WATER | SENSOR_FAN_WATER_FLOW,
543 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
544 .family = family_intel_600_series,
545};
546
547static const struct ec_board_info board_info_maximus_z790_extreme = {
548 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
549 SENSOR_SET_TEMP_WATER | SENSOR_FAN_WATER_FLOW,
550 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
551 .family = family_intel_700_series,
552};
553
554static const struct ec_board_info board_info_maximus_z790_hero = {
555 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
556 SENSOR_SET_TEMP_WATER | SENSOR_FAN_WATER_FLOW |
557 SENSOR_FAN_CPU_OPT,
558 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
559 .family = family_intel_700_series,
560};
561
562static const struct ec_board_info board_info_prime_x470_pro = {
563 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
564 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
565 SENSOR_FAN_CPU_OPT |
566 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
567 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
568 .family = family_amd_400_series,
569};
570
571static const struct ec_board_info board_info_prime_x570_pro = {
572 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
573 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
574 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
575 .family = family_amd_500_series,
576};
577
578static const struct ec_board_info board_info_prime_x670e_pro_wifi = {
579 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
580 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
581 SENSOR_TEMP_T_SENSOR_ALT1 | SENSOR_FAN_CPU_OPT,
582 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
583 .family = family_amd_600_series,
584};
585
586static const struct ec_board_info board_info_prime_z270_a = {
587 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
588 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT,
589 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_LPCB_SIO1_MUT0,
590 .family = family_intel_200_series,
591};
592
593static const struct ec_board_info board_info_pro_art_b550_creator = {
594 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
595 SENSOR_TEMP_T_SENSOR |
596 SENSOR_FAN_CPU_OPT,
597 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
598 .family = family_amd_500_series,
599};
600
601static const struct ec_board_info board_info_pro_art_x570_creator_wifi = {
602 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
603 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT |
604 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
605 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
606 .family = family_amd_500_series,
607};
608
609static const struct ec_board_info board_info_pro_art_x670E_creator_wifi = {
610 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
611 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
612 SENSOR_TEMP_T_SENSOR,
613 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
614 .family = family_amd_600_series,
615};
616
617static const struct ec_board_info board_info_pro_art_x870E_creator_wifi = {
618 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
619 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
620 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT,
621 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
622 .family = family_amd_800_series,
623};
624
625static const struct ec_board_info board_info_pro_art_z690_creator_wifi = {
626 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
627 SENSOR_FAN_CPU_OPT,
628 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0,
629 .family = family_intel_600_series,
630};
631
632static const struct ec_board_info board_info_pro_ws_trx50_sage_wifi = {
633 /* Board also has a nct6798 */
634 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE | SENSOR_TEMP_VRME |
635 SENSOR_TEMP_VRMW | SENSOR_FAN_CPU_OPT | SENSOR_FAN_VRME_HS |
636 SENSOR_FAN_VRMW_HS | SENSOR_TEMP_T_SENSOR,
637 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
638 .family = family_amd_trx_50,
639};
640
641static const struct ec_board_info board_info_pro_ws_wrx90e_sage_se = {
642 /* Board also has a nct6798 with 7 more fans and temperatures */
643 .sensors = SENSOR_TEMP_CPU_PACKAGE | SENSOR_TEMP_T_SENSOR |
644 SENSOR_FAN_CPU_OPT | SENSOR_FAN_USB4 | SENSOR_FAN_M2 |
645 SENSOR_FAN_VRME_HS | SENSOR_FAN_VRMW_HS |
646 SENSOR_TEMP_VRME | SENSOR_TEMP_VRMW,
647 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
648 .family = family_amd_wrx_90,
649};
650
651static const struct ec_board_info board_info_pro_ws_x570_ace = {
652 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
653 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET |
654 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
655 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
656 .family = family_amd_500_series,
657};
658
659static const struct ec_board_info board_info_strix_b550_e_gaming = {
660 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
661 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
662 SENSOR_FAN_CPU_OPT,
663 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
664 .family = family_amd_500_series,
665};
666
667static const struct ec_board_info board_info_strix_b550_i_gaming = {
668 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
669 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
670 SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU |
671 SENSOR_IN_CPU_CORE,
672 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
673 .family = family_amd_500_series,
674};
675
676static const struct ec_board_info board_info_strix_b650e_e_gaming = {
677 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
678 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
679 SENSOR_FAN_CPU_OPT,
680 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
681 .family = family_amd_600_series,
682};
683
684static const struct ec_board_info board_info_strix_b650e_i_gaming = {
685 .sensors = SENSOR_TEMP_VRM | SENSOR_TEMP_T_SENSOR |
686 SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_IN_CPU_CORE,
687 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
688 .family = family_amd_600_series,
689};
690
691static const struct ec_board_info board_info_strix_b850_e_gaming_wifi = {
692 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
693 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
694 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT,
695 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
696 .family = family_amd_800_series,
697};
698
699static const struct ec_board_info board_info_strix_b850_i_gaming_wifi = {
700 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
701 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
702 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
703 .family = family_amd_800_series,
704};
705
706static const struct ec_board_info board_info_strix_x470_f_gaming = {
707 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
708 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT |
709 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
710 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
711 .family = family_amd_400_series,
712};
713
714static const struct ec_board_info board_info_strix_x470_i_gaming = {
715 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
716 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
717 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
718 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
719 .family = family_amd_400_series,
720};
721
722static const struct ec_board_info board_info_strix_x570_e_gaming = {
723 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
724 SENSOR_TEMP_T_SENSOR |
725 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
726 SENSOR_IN_CPU_CORE,
727 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
728 .family = family_amd_500_series,
729};
730
731static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = {
732 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
733 SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU |
734 SENSOR_IN_CPU_CORE,
735 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
736 .family = family_amd_500_series,
737};
738
739static const struct ec_board_info board_info_strix_x570_f_gaming = {
740 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
741 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
742 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
743 .family = family_amd_500_series,
744};
745
746static const struct ec_board_info board_info_strix_x570_i_gaming = {
747 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
748 SENSOR_TEMP_T_SENSOR |
749 SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET |
750 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
751 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
752 .family = family_amd_500_series,
753};
754
755static const struct ec_board_info board_info_strix_x670e_e_gaming_wifi = {
756 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
757 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
758 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
759 .family = family_amd_600_series,
760};
761
762static const struct ec_board_info board_info_strix_x670e_i_gaming_wifi = {
763 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
764 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
765 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
766 .family = family_amd_600_series,
767};
768
769static const struct ec_board_info board_info_strix_x870_f_gaming_wifi = {
770 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
771 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | SENSOR_TEMP_T_SENSOR,
772 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
773 .family = family_amd_800_series,
774};
775
776static const struct ec_board_info board_info_strix_x870_i_gaming_wifi = {
777 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
778 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
779 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
780 .family = family_amd_800_series,
781};
782
783static const struct ec_board_info board_info_strix_x870e_e_gaming_wifi = {
784 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
785 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | SENSOR_TEMP_T_SENSOR |
786 SENSOR_FAN_CPU_OPT,
787 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
788 .family = family_amd_800_series,
789};
790
791static const struct ec_board_info board_info_strix_x870e_h_gaming_wifi7 = {
792 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
793 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | SENSOR_TEMP_T_SENSOR |
794 SENSOR_FAN_CPU_OPT,
795 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
796 .family = family_amd_800_series,
797};
798
799static const struct ec_board_info board_info_strix_z390_f_gaming = {
800 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
801 SENSOR_TEMP_T_SENSOR |
802 SENSOR_FAN_CPU_OPT,
803 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
804 .family = family_intel_300_series,
805};
806
807static const struct ec_board_info board_info_strix_z490_f_gaming = {
808 .sensors = SENSOR_TEMP_CHIPSET |
809 SENSOR_TEMP_CPU |
810 SENSOR_TEMP_MB |
811 SENSOR_TEMP_T_SENSOR |
812 SENSOR_TEMP_VRM |
813 SENSOR_FAN_CPU_OPT |
814 SENSOR_FAN_VRM_HS,
815 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
816 .family = family_intel_400_series,
817};
818
819static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = {
820 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
821 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
822 .family = family_intel_600_series,
823};
824
825static const struct ec_board_info board_info_strix_z690_e_gaming_wifi = {
826 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
827 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
828 .family = family_intel_600_series,
829};
830
831static const struct ec_board_info board_info_strix_z790_e_gaming_wifi_ii = {
832 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
833 SENSOR_FAN_CPU_OPT,
834 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0,
835 .family = family_intel_700_series,
836};
837
838static const struct ec_board_info board_info_strix_z790_h_gaming_wifi = {
839 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
840 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0,
841 .family = family_intel_700_series,
842};
843
844static const struct ec_board_info board_info_strix_z790_i_gaming_wifi = {
845 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_T_SENSOR_2 |
846 SENSOR_TEMP_VRM,
847 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0,
848 .family = family_intel_700_series,
849};
850
851static const struct ec_board_info board_info_tuf_gaming_x670e_plus = {
852 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
853 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
854 SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT |
855 SENSOR_FAN_CPU_OPT,
856 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
857 .family = family_amd_600_series,
858};
859
860static const struct ec_board_info board_info_zenith_ii_extreme = {
861 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
862 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
863 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS |
864 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE |
865 SENSOR_SET_WATER_BLOCK |
866 SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 |
867 SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3,
868 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
869 .family = family_amd_500_series,
870};
871
872#define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info) \
873 { \
874 .matches = { \
875 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, \
876 "ASUSTeK COMPUTER INC."), \
877 DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \
878 }, \
879 .driver_data = (void *)board_info, \
880 }
881
882static const struct dmi_system_id dmi_table[] = {
883 DMI_EXACT_MATCH_ASUS_BOARD_NAME("MAXIMUS VI HERO",
884 &board_info_maximus_vi_hero),
885 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO",
886 &board_info_prime_x470_pro),
887 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO",
888 &board_info_prime_x570_pro),
889 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X670E-PRO WIFI",
890 &board_info_prime_x670e_pro_wifi),
891 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME Z270-A",
892 &board_info_prime_z270_a),
893 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt B550-CREATOR",
894 &board_info_pro_art_b550_creator),
895 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI",
896 &board_info_pro_art_x570_creator_wifi),
897 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X670E-CREATOR WIFI",
898 &board_info_pro_art_x670E_creator_wifi),
899 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X870E-CREATOR WIFI",
900 &board_info_pro_art_x870E_creator_wifi),
901 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt Z690-CREATOR WIFI",
902 &board_info_pro_art_z690_creator_wifi),
903 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS TRX50-SAGE WIFI",
904 &board_info_pro_ws_trx50_sage_wifi),
905 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS TRX50-SAGE WIFI A",
906 &board_info_pro_ws_trx50_sage_wifi),
907 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS WRX90E-SAGE SE",
908 &board_info_pro_ws_wrx90e_sage_se),
909 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE",
910 &board_info_pro_ws_x570_ace),
911 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO",
912 &board_info_crosshair_viii_dark_hero),
913 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA",
914 &board_info_crosshair_viii_hero),
915 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO",
916 &board_info_crosshair_viii_hero),
917 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)",
918 &board_info_crosshair_viii_hero),
919 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT",
920 &board_info_crosshair_viii_impact),
921 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E EXTREME",
922 &board_info_crosshair_x670e_extreme),
923 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E GENE",
924 &board_info_crosshair_x670e_gene),
925 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E HERO",
926 &board_info_crosshair_x670e_hero),
927 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X870E HERO",
928 &board_info_crosshair_x870e_hero),
929 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO",
930 &board_info_maximus_xi_hero),
931 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)",
932 &board_info_maximus_xi_hero),
933 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS X HERO",
934 &board_info_maximus_x_hero),
935 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS Z690 FORMULA",
936 &board_info_maximus_z690_formula),
937 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS Z790 EXTREME",
938 &board_info_maximus_z790_extreme),
939 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS Z790 HERO",
940 &board_info_maximus_z790_hero),
941 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING",
942 &board_info_strix_b550_e_gaming),
943 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING",
944 &board_info_strix_b550_i_gaming),
945 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B650E-E GAMING WIFI",
946 &board_info_strix_b650e_e_gaming),
947 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B650E-I GAMING WIFI",
948 &board_info_strix_b650e_i_gaming),
949 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B850-E GAMING WIFI",
950 &board_info_strix_b850_e_gaming_wifi),
951 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B850-I GAMING WIFI",
952 &board_info_strix_b850_i_gaming_wifi),
953 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X470-F GAMING",
954 &board_info_strix_x470_f_gaming),
955 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X470-I GAMING",
956 &board_info_strix_x470_i_gaming),
957 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING",
958 &board_info_strix_x570_e_gaming),
959 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II",
960 &board_info_strix_x570_e_gaming_wifi_ii),
961 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING",
962 &board_info_strix_x570_f_gaming),
963 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING",
964 &board_info_strix_x570_i_gaming),
965 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X670E-E GAMING WIFI",
966 &board_info_strix_x670e_e_gaming_wifi),
967 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X670E-I GAMING WIFI",
968 &board_info_strix_x670e_i_gaming_wifi),
969 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870-F GAMING WIFI",
970 &board_info_strix_x870_f_gaming_wifi),
971 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870-I GAMING WIFI",
972 &board_info_strix_x870_i_gaming_wifi),
973 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870E-E GAMING WIFI",
974 &board_info_strix_x870e_e_gaming_wifi),
975 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870E-E GAMING WIFI7 R2",
976 &board_info_strix_x870e_e_gaming_wifi),
977 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870E-H GAMING WIFI7",
978 &board_info_strix_x870e_h_gaming_wifi7),
979 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z390-E GAMING",
980 &board_info_strix_z390_f_gaming),
981 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z390-F GAMING",
982 &board_info_strix_z390_f_gaming),
983 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z490-F GAMING",
984 &board_info_strix_z490_f_gaming),
985 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4",
986 &board_info_strix_z690_a_gaming_wifi_d4),
987 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-E GAMING WIFI",
988 &board_info_strix_z690_e_gaming_wifi),
989 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z790-E GAMING WIFI II",
990 &board_info_strix_z790_e_gaming_wifi_ii),
991 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z790-H GAMING WIFI",
992 &board_info_strix_z790_h_gaming_wifi),
993 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z790-I GAMING WIFI",
994 &board_info_strix_z790_i_gaming_wifi),
995 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME",
996 &board_info_zenith_ii_extreme),
997 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME ALPHA",
998 &board_info_zenith_ii_extreme),
999 DMI_EXACT_MATCH_ASUS_BOARD_NAME("TUF GAMING X670E-PLUS",
1000 &board_info_tuf_gaming_x670e_plus),
1001 DMI_EXACT_MATCH_ASUS_BOARD_NAME("TUF GAMING X670E-PLUS WIFI",
1002 &board_info_tuf_gaming_x670e_plus),
1003 {},
1004};
1005
1006struct ec_sensor {
1007 /* this is ec_sensors enum value */
1008 unsigned int info_index;
1009 s32 cached_value;
1010};
1011
1012struct lock_data {
1013 union {
1014 acpi_handle aml;
1015 /* global lock handle */
1016 u32 glk;
1017 } mutex;
1018 bool (*lock)(struct lock_data *data);
1019 bool (*unlock)(struct lock_data *data);
1020};
1021
1022/*
1023 * The next function pairs implement options for locking access to the
1024 * state and the EC
1025 */
1026static bool lock_via_acpi_mutex(struct lock_data *data)
1027{
1028 /*
1029 * ASUS DSDT does not specify that access to the EC has to be guarded,
1030 * but firmware does access it via ACPI
1031 */
1032 return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml,
1033 NULL, ACPI_LOCK_DELAY_MS));
1034}
1035
1036static bool unlock_acpi_mutex(struct lock_data *data)
1037{
1038 return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL));
1039}
1040
1041static bool lock_via_global_acpi_lock(struct lock_data *data)
1042{
1043 return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS,
1044 &data->mutex.glk));
1045}
1046
1047static bool unlock_global_acpi_lock(struct lock_data *data)
1048{
1049 return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk));
1050}
1051
1052struct ec_sensors_data {
1053 const struct ec_board_info *board_info;
1054 const struct ec_sensor_info *sensors_info;
1055 struct ec_sensor *sensors;
1056 /* EC registers to read from */
1057 u16 *registers;
1058 u8 *read_buffer;
1059 /* sorted list of unique register banks */
1060 u8 banks[ASUS_EC_MAX_BANK + 1];
1061 /* in jiffies */
1062 u64 next_update;
1063 struct lock_data lock_data;
1064 /* number of board EC sensors */
1065 u8 nr_sensors;
1066 /*
1067 * number of EC registers to read
1068 * (sensor might span more than 1 register)
1069 */
1070 u8 nr_registers;
1071 /* number of unique register banks */
1072 u8 nr_banks;
1073};
1074
1075static u8 register_bank(u16 reg)
1076{
1077 return reg >> 8;
1078}
1079
1080static u8 register_index(u16 reg)
1081{
1082 return reg & 0x00ff;
1083}
1084
1085static bool is_sensor_data_signed(const struct ec_sensor_info *si)
1086{
1087 /*
1088 * guessed from WMI functions in DSDT code for boards
1089 * of the X470 generation
1090 */
1091 return si->type == hwmon_temp;
1092}
1093
1094static const struct ec_sensor_info *
1095get_sensor_info(const struct ec_sensors_data *state, int index)
1096{
1097 return state->sensors_info + state->sensors[index].info_index;
1098}
1099
1100static enum ec_sensors
1101get_ec_sensor_type(const struct ec_sensors_data *state, int index)
1102{
1103 return state->sensors[index].info_index;
1104}
1105
1106static int find_ec_sensor_index(const struct ec_sensors_data *ec,
1107 enum hwmon_sensor_types type, int channel)
1108{
1109 unsigned int i;
1110
1111 for (i = 0; i < ec->nr_sensors; i++) {
1112 if (get_sensor_info(ec, i)->type == type) {
1113 if (channel == 0)
1114 return i;
1115 channel--;
1116 }
1117 }
1118 return -ENOENT;
1119}
1120
1121static int bank_compare(const void *a, const void *b)
1122{
1123 return *((const s8 *)a) - *((const s8 *)b);
1124}
1125
1126static void setup_sensor_data(struct ec_sensors_data *ec)
1127{
1128 struct ec_sensor *s = ec->sensors;
1129 bool bank_found;
1130 int i, j;
1131 u8 bank;
1132
1133 ec->nr_banks = 0;
1134 ec->nr_registers = 0;
1135
1136 for_each_set_bit(i, &ec->board_info->sensors,
1137 BITS_PER_TYPE(ec->board_info->sensors)) {
1138 s->info_index = i;
1139 s->cached_value = 0;
1140 ec->nr_registers +=
1141 ec->sensors_info[s->info_index].addr.components.size;
1142 bank_found = false;
1143 bank = ec->sensors_info[s->info_index].addr.components.bank;
1144 for (j = 0; j < ec->nr_banks; j++) {
1145 if (ec->banks[j] == bank) {
1146 bank_found = true;
1147 break;
1148 }
1149 }
1150 if (!bank_found) {
1151 ec->banks[ec->nr_banks++] = bank;
1152 }
1153 s++;
1154 }
1155 sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL);
1156}
1157
1158static void fill_ec_registers(struct ec_sensors_data *ec)
1159{
1160 const struct ec_sensor_info *si;
1161 unsigned int i, j, register_idx = 0;
1162
1163 for (i = 0; i < ec->nr_sensors; ++i) {
1164 si = get_sensor_info(ec, i);
1165 for (j = 0; j < si->addr.components.size; ++j, ++register_idx) {
1166 ec->registers[register_idx] =
1167 (si->addr.components.bank << 8) +
1168 si->addr.components.index + j;
1169 }
1170 }
1171}
1172
1173static int setup_lock_data(struct device *dev)
1174{
1175 const char *mutex_path;
1176 int status;
1177 struct ec_sensors_data *state = dev_get_drvdata(dev);
1178
1179 mutex_path = mutex_path_override ?
1180 mutex_path_override : state->board_info->mutex_path;
1181
1182 if (!mutex_path || !strlen(mutex_path)) {
1183 dev_err(dev, "Hardware access guard mutex name is empty");
1184 return -EINVAL;
1185 }
1186 if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) {
1187 state->lock_data.mutex.glk = 0;
1188 state->lock_data.lock = lock_via_global_acpi_lock;
1189 state->lock_data.unlock = unlock_global_acpi_lock;
1190 } else {
1191 status = acpi_get_handle(NULL, (acpi_string)mutex_path,
1192 &state->lock_data.mutex.aml);
1193 if (ACPI_FAILURE(status)) {
1194 dev_err(dev,
1195 "Failed to get hardware access guard AML mutex '%s': error %d",
1196 mutex_path, status);
1197 return -ENOENT;
1198 }
1199 state->lock_data.lock = lock_via_acpi_mutex;
1200 state->lock_data.unlock = unlock_acpi_mutex;
1201 }
1202 return 0;
1203}
1204
1205static int asus_ec_bank_switch(u8 bank, u8 *old)
1206{
1207 int status = 0;
1208
1209 if (old) {
1210 status = ec_read(ASUS_EC_BANK_REGISTER, old);
1211 }
1212 if (status || (old && (*old == bank)))
1213 return status;
1214 return ec_write(ASUS_EC_BANK_REGISTER, bank);
1215}
1216
1217static int asus_ec_block_read(const struct device *dev,
1218 struct ec_sensors_data *ec)
1219{
1220 int ireg, ibank, status;
1221 u8 bank, reg_bank, prev_bank;
1222
1223 bank = 0;
1224 status = asus_ec_bank_switch(bank, &prev_bank);
1225 if (status) {
1226 dev_warn(dev, "EC bank switch failed");
1227 return status;
1228 }
1229
1230 if (prev_bank) {
1231 /* oops... somebody else is working with the EC too */
1232 dev_warn(dev,
1233 "Concurrent access to the ACPI EC detected.\nRace condition possible.");
1234 }
1235
1236 /* read registers minimizing bank switches. */
1237 for (ibank = 0; ibank < ec->nr_banks; ibank++) {
1238 if (bank != ec->banks[ibank]) {
1239 bank = ec->banks[ibank];
1240 if (asus_ec_bank_switch(bank, NULL)) {
1241 dev_warn(dev, "EC bank switch to %d failed",
1242 bank);
1243 break;
1244 }
1245 }
1246 for (ireg = 0; ireg < ec->nr_registers; ireg++) {
1247 reg_bank = register_bank(ec->registers[ireg]);
1248 if (reg_bank != bank) {
1249 continue;
1250 }
1251 ec_read(register_index(ec->registers[ireg]),
1252 ec->read_buffer + ireg);
1253 }
1254 }
1255
1256 status = asus_ec_bank_switch(prev_bank, NULL);
1257 return status;
1258}
1259
1260static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data)
1261{
1262 if (is_sensor_data_signed(si)) {
1263 switch (si->addr.components.size) {
1264 case 1:
1265 return (s8)*data;
1266 case 2:
1267 return (s16)get_unaligned_be16(data);
1268 case 4:
1269 return (s32)get_unaligned_be32(data);
1270 default:
1271 return 0;
1272 }
1273 } else {
1274 switch (si->addr.components.size) {
1275 case 1:
1276 return *data;
1277 case 2:
1278 return get_unaligned_be16(data);
1279 case 4:
1280 return get_unaligned_be32(data);
1281 default:
1282 return 0;
1283 }
1284 }
1285}
1286
1287static void update_sensor_values(struct ec_sensors_data *ec, u8 *data)
1288{
1289 const struct ec_sensor_info *si;
1290 struct ec_sensor *s, *sensor_end;
1291
1292 sensor_end = ec->sensors + ec->nr_sensors;
1293 for (s = ec->sensors; s != sensor_end; s++) {
1294 si = ec->sensors_info + s->info_index;
1295 s->cached_value = get_sensor_value(si, data);
1296 data += si->addr.components.size;
1297 }
1298}
1299
1300static int update_ec_sensors(const struct device *dev,
1301 struct ec_sensors_data *ec)
1302{
1303 int status;
1304
1305 if (!ec->lock_data.lock(&ec->lock_data)) {
1306 dev_warn(dev, "Failed to acquire mutex");
1307 return -EBUSY;
1308 }
1309
1310 status = asus_ec_block_read(dev, ec);
1311
1312 if (!status) {
1313 update_sensor_values(ec, ec->read_buffer);
1314 }
1315
1316 if (!ec->lock_data.unlock(&ec->lock_data))
1317 dev_err(dev, "Failed to release mutex");
1318
1319 return status;
1320}
1321
1322static long scale_sensor_value(s32 value, int data_type)
1323{
1324 switch (data_type) {
1325 case hwmon_curr:
1326 case hwmon_temp:
1327 return value * MILLI;
1328 default:
1329 return value;
1330 }
1331}
1332
1333static int get_cached_value_or_update(const struct device *dev,
1334 int sensor_index,
1335 struct ec_sensors_data *state, s32 *value)
1336{
1337 if (time_after64(get_jiffies_64(), state->next_update)) {
1338 if (update_ec_sensors(dev, state)) {
1339 dev_err(dev, "update_ec_sensors() failure\n");
1340 return -EIO;
1341 }
1342 state->next_update = get_jiffies_64() + HZ;
1343 }
1344
1345 *value = state->sensors[sensor_index].cached_value;
1346 return 0;
1347}
1348
1349static bool is_blank_temperature_value(s32 value)
1350{
1351 size_t i;
1352
1353 for (i = 0; i < ARRAY_SIZE(temperature_blank_values); ++i) {
1354 if (value == temperature_blank_values[i])
1355 return true;
1356 }
1357 return false;
1358}
1359
1360/*
1361 * Now follow the functions that implement the hwmon interface
1362 */
1363
1364static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
1365 u32 attr, int channel, long *val)
1366{
1367 const struct ec_sensor_info *sensor_info;
1368 enum ec_sensors ec_sensor;
1369 int ret;
1370 s32 value = 0;
1371
1372 struct ec_sensors_data *state = dev_get_drvdata(dev);
1373 int sidx = find_ec_sensor_index(state, type, channel);
1374
1375 if (sidx < 0) {
1376 return sidx;
1377 }
1378
1379 ret = get_cached_value_or_update(dev, sidx, state, &value);
1380 if (ret)
1381 return ret;
1382
1383 sensor_info = get_sensor_info(state, sidx);
1384 if (sensor_info->type == hwmon_temp) {
1385 ec_sensor = get_ec_sensor_type(state, sidx);
1386 if ((environment_temp_sensors & BIT(ec_sensor)) &&
1387 is_blank_temperature_value(value))
1388 return -ENODATA;
1389 }
1390 *val = scale_sensor_value(value, sensor_info->type);
1391
1392 return 0;
1393}
1394
1395static int asus_ec_hwmon_read_string(struct device *dev,
1396 enum hwmon_sensor_types type, u32 attr,
1397 int channel, const char **str)
1398{
1399 struct ec_sensors_data *state = dev_get_drvdata(dev);
1400 int sensor_index = find_ec_sensor_index(state, type, channel);
1401
1402 if (sensor_index < 0)
1403 return sensor_index;
1404
1405 *str = get_sensor_info(state, sensor_index)->label;
1406
1407 return 0;
1408}
1409
1410static umode_t asus_ec_hwmon_is_visible(const void *drvdata,
1411 enum hwmon_sensor_types type, u32 attr,
1412 int channel)
1413{
1414 const struct ec_sensors_data *state = drvdata;
1415
1416 return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0;
1417}
1418
1419static int
1420asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan,
1421 struct device *dev, int num,
1422 enum hwmon_sensor_types type, u32 config)
1423{
1424 int i;
1425 u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL);
1426
1427 if (!cfg)
1428 return -ENOMEM;
1429
1430 asus_ec_hwmon_chan->type = type;
1431 asus_ec_hwmon_chan->config = cfg;
1432 for (i = 0; i < num; i++, cfg++)
1433 *cfg = config;
1434
1435 return 0;
1436}
1437
1438static const struct hwmon_ops asus_ec_hwmon_ops = {
1439 .is_visible = asus_ec_hwmon_is_visible,
1440 .read = asus_ec_hwmon_read,
1441 .read_string = asus_ec_hwmon_read_string,
1442};
1443
1444static struct hwmon_chip_info asus_ec_chip_info = {
1445 .ops = &asus_ec_hwmon_ops,
1446};
1447
1448static const struct ec_board_info *get_board_info(void)
1449{
1450 const struct dmi_system_id *dmi_entry;
1451
1452 dmi_entry = dmi_first_match(dmi_table);
1453 return dmi_entry ? dmi_entry->driver_data : NULL;
1454}
1455
1456static int asus_ec_probe(struct platform_device *pdev)
1457{
1458 const struct hwmon_channel_info **ptr_asus_ec_ci;
1459 int nr_count[hwmon_max] = { 0 }, nr_types = 0;
1460 struct hwmon_channel_info *asus_ec_hwmon_chan;
1461 const struct ec_board_info *pboard_info;
1462 const struct hwmon_chip_info *chip_info;
1463 struct device *dev = &pdev->dev;
1464 struct ec_sensors_data *ec_data;
1465 const struct ec_sensor_info *si;
1466 enum hwmon_sensor_types type;
1467 struct device *hwdev;
1468 unsigned int i;
1469 int status;
1470
1471 pboard_info = get_board_info();
1472 if (!pboard_info)
1473 return -ENODEV;
1474
1475 ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data),
1476 GFP_KERNEL);
1477 if (!ec_data)
1478 return -ENOMEM;
1479
1480 ec_data->next_update = INITIAL_JIFFIES;
1481 dev_set_drvdata(dev, ec_data);
1482 ec_data->board_info = pboard_info;
1483
1484 switch (ec_data->board_info->family) {
1485 case family_amd_400_series:
1486 ec_data->sensors_info = sensors_family_amd_400;
1487 break;
1488 case family_amd_500_series:
1489 ec_data->sensors_info = sensors_family_amd_500;
1490 break;
1491 case family_amd_600_series:
1492 ec_data->sensors_info = sensors_family_amd_600;
1493 break;
1494 case family_amd_800_series:
1495 ec_data->sensors_info = sensors_family_amd_800;
1496 break;
1497 case family_amd_trx_50:
1498 ec_data->sensors_info = sensors_family_amd_trx_50;
1499 break;
1500 case family_amd_wrx_90:
1501 ec_data->sensors_info = sensors_family_amd_wrx_90;
1502 break;
1503 case family_intel_200_series:
1504 ec_data->sensors_info = sensors_family_intel_200;
1505 break;
1506 case family_intel_300_series:
1507 ec_data->sensors_info = sensors_family_intel_300;
1508 break;
1509 case family_intel_400_series:
1510 ec_data->sensors_info = sensors_family_intel_400;
1511 break;
1512 case family_intel_600_series:
1513 ec_data->sensors_info = sensors_family_intel_600;
1514 break;
1515 case family_intel_700_series:
1516 ec_data->sensors_info = sensors_family_intel_700;
1517 break;
1518 default:
1519 dev_err(dev, "Unknown board family: %d",
1520 ec_data->board_info->family);
1521 return -EINVAL;
1522 }
1523
1524 ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors);
1525 ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors,
1526 sizeof(struct ec_sensor), GFP_KERNEL);
1527 if (!ec_data->sensors)
1528 return -ENOMEM;
1529
1530 status = setup_lock_data(dev);
1531 if (status) {
1532 dev_err(dev, "Failed to setup state/EC locking: %d", status);
1533 return status;
1534 }
1535
1536 setup_sensor_data(ec_data);
1537 ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers,
1538 sizeof(u16), GFP_KERNEL);
1539 ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers,
1540 sizeof(u8), GFP_KERNEL);
1541
1542 if (!ec_data->registers || !ec_data->read_buffer)
1543 return -ENOMEM;
1544
1545 fill_ec_registers(ec_data);
1546
1547 for (i = 0; i < ec_data->nr_sensors; ++i) {
1548 si = get_sensor_info(ec_data, i);
1549 if (!nr_count[si->type])
1550 ++nr_types;
1551 ++nr_count[si->type];
1552 }
1553
1554 if (nr_count[hwmon_temp])
1555 nr_count[hwmon_chip]++, nr_types++;
1556
1557 asus_ec_hwmon_chan = devm_kcalloc(
1558 dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL);
1559 if (!asus_ec_hwmon_chan)
1560 return -ENOMEM;
1561
1562 ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1,
1563 sizeof(*ptr_asus_ec_ci), GFP_KERNEL);
1564 if (!ptr_asus_ec_ci)
1565 return -ENOMEM;
1566
1567 asus_ec_chip_info.info = ptr_asus_ec_ci;
1568 chip_info = &asus_ec_chip_info;
1569
1570 for (type = 0; type < hwmon_max; ++type) {
1571 if (!nr_count[type])
1572 continue;
1573
1574 status = asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev,
1575 nr_count[type], type,
1576 hwmon_attributes[type]);
1577 if (status)
1578 return status;
1579 *ptr_asus_ec_ci++ = asus_ec_hwmon_chan++;
1580 }
1581
1582 dev_info(dev, "board has %d EC sensors that span %d registers",
1583 ec_data->nr_sensors, ec_data->nr_registers);
1584
1585 hwdev = devm_hwmon_device_register_with_info(dev, "asusec",
1586 ec_data, chip_info, NULL);
1587
1588 return PTR_ERR_OR_ZERO(hwdev);
1589}
1590
1591MODULE_DEVICE_TABLE(dmi, dmi_table);
1592
1593static struct platform_driver asus_ec_sensors_platform_driver = {
1594 .driver = {
1595 .name = "asus-ec-sensors",
1596 },
1597 .probe = asus_ec_probe,
1598};
1599
1600static struct platform_device *asus_ec_sensors_platform_device;
1601
1602static int __init asus_ec_init(void)
1603{
1604 asus_ec_sensors_platform_device =
1605 platform_create_bundle(&asus_ec_sensors_platform_driver,
1606 asus_ec_probe, NULL, 0, NULL, 0);
1607
1608 if (IS_ERR(asus_ec_sensors_platform_device))
1609 return PTR_ERR(asus_ec_sensors_platform_device);
1610
1611 return 0;
1612}
1613
1614static void __exit asus_ec_exit(void)
1615{
1616 platform_device_unregister(asus_ec_sensors_platform_device);
1617 platform_driver_unregister(&asus_ec_sensors_platform_driver);
1618}
1619
1620module_init(asus_ec_init);
1621module_exit(asus_ec_exit);
1622
1623module_param_named(mutex_path, mutex_path_override, charp, 0);
1624MODULE_PARM_DESC(mutex_path,
1625 "Override ACPI mutex path used to guard access to hardware");
1626
1627MODULE_AUTHOR("Eugene Shalygin <[email protected]>");
1628MODULE_DESCRIPTION(
1629 "HWMON driver for sensors accessible via ACPI EC in ASUS motherboards");
1630MODULE_LICENSE("GPL");