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1// SPDX-License-Identifier: GPL-2.0-or-later
2/***************************************************************************
3 * Copyright (C) 2006 by Hans Edgington <[email protected]> *
4 * Copyright (C) 2007-2011 Hans de Goede <[email protected]> *
5 * *
6 ***************************************************************************/
7
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/slab.h>
13#include <linux/jiffies.h>
14#include <linux/platform_device.h>
15#include <linux/hwmon.h>
16#include <linux/hwmon-sysfs.h>
17#include <linux/err.h>
18#include <linux/mutex.h>
19#include <linux/io.h>
20#include <linux/acpi.h>
21
22#define DRVNAME "f71882fg"
23
24#define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
25#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
26#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
27#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
28
29#define SIO_REG_LDSEL 0x07 /* Logical device select */
30#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
31#define SIO_REG_DEVREV 0x22 /* Device revision */
32#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
33#define SIO_REG_ENABLE 0x30 /* Logical device enable */
34#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
35
36#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
37#define SIO_F71808E_ID 0x0901 /* Chipset ID */
38#define SIO_F71808A_ID 0x1001 /* Chipset ID */
39#define SIO_F71858_ID 0x0507 /* Chipset ID */
40#define SIO_F71862_ID 0x0601 /* Chipset ID */
41#define SIO_F71868_ID 0x1106 /* Chipset ID */
42#define SIO_F71869_ID 0x0814 /* Chipset ID */
43#define SIO_F71869A_ID 0x1007 /* Chipset ID */
44#define SIO_F71882_ID 0x0541 /* Chipset ID */
45#define SIO_F71889_ID 0x0723 /* Chipset ID */
46#define SIO_F71889E_ID 0x0909 /* Chipset ID */
47#define SIO_F71889A_ID 0x1005 /* Chipset ID */
48#define SIO_F8000_ID 0x0581 /* Chipset ID */
49#define SIO_F81768D_ID 0x1210 /* Chipset ID */
50#define SIO_F81865_ID 0x0704 /* Chipset ID */
51#define SIO_F81866_ID 0x1010 /* Chipset ID */
52#define SIO_F71858AD_ID 0x0903 /* Chipset ID */
53#define SIO_F81966_ID 0x1502 /* Chipset ID */
54#define SIO_F81968_ID 0x1806 /* Chipset ID */
55
56#define REGION_LENGTH 8
57#define ADDR_REG_OFFSET 5
58#define DATA_REG_OFFSET 6
59
60#define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
61#define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
62#define F71882FG_REG_IN(nr) (0x20 + (nr))
63#define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
64
65#define F81866_REG_IN_STATUS 0x16 /* F81866 only */
66#define F81866_REG_IN_BEEP 0x17 /* F81866 only */
67#define F81866_REG_IN1_HIGH 0x3a /* F81866 only */
68
69#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
70#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
71#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
72#define F71882FG_REG_FAN_STATUS 0x92
73#define F71882FG_REG_FAN_BEEP 0x93
74
75#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
76#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
77#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
78#define F71882FG_REG_TEMP_STATUS 0x62
79#define F71882FG_REG_TEMP_BEEP 0x63
80#define F71882FG_REG_TEMP_CONFIG 0x69
81#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
82#define F71882FG_REG_TEMP_TYPE 0x6B
83#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
84
85#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
86#define F71882FG_REG_PWM_TYPE 0x94
87#define F71882FG_REG_PWM_ENABLE 0x96
88
89#define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
90
91#define F71882FG_REG_FAN_FAULT_T 0x9F
92#define F71882FG_FAN_NEG_TEMP_EN 0x20
93#define F71882FG_FAN_PROG_SEL 0x80
94
95#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
96#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
97#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
98
99#define F71882FG_REG_START 0x01
100
101#define F71882FG_MAX_INS 11
102
103#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
104
105static unsigned short force_id;
106module_param(force_id, ushort, 0);
107MODULE_PARM_DESC(force_id, "Override the detected device ID");
108
109enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a,
110 f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f,
111 f81866a};
112
113static const char *const f71882fg_names[] = {
114 "f71808e",
115 "f71808a",
116 "f71858fg",
117 "f71862fg",
118 "f71868a",
119 "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
120 "f71869a",
121 "f71882fg",
122 "f71889fg", /* f81801u too, same id */
123 "f71889ed",
124 "f71889a",
125 "f8000",
126 "f81768d",
127 "f81865f",
128 "f81866a",
129};
130
131static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
132 [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 },
133 [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 },
134 [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
135 [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
136 [f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
137 [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
138 [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
139 [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
140 [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
141 [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
142 [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
143 [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
144 [f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
145 [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
146 [f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
147};
148
149static const char f71882fg_has_in1_alarm[] = {
150 [f71808e] = 0,
151 [f71808a] = 0,
152 [f71858fg] = 0,
153 [f71862fg] = 0,
154 [f71868a] = 0,
155 [f71869] = 0,
156 [f71869a] = 0,
157 [f71882fg] = 1,
158 [f71889fg] = 1,
159 [f71889ed] = 1,
160 [f71889a] = 1,
161 [f8000] = 0,
162 [f81768d] = 1,
163 [f81865f] = 1,
164 [f81866a] = 1,
165};
166
167static const char f71882fg_fan_has_beep[] = {
168 [f71808e] = 0,
169 [f71808a] = 0,
170 [f71858fg] = 0,
171 [f71862fg] = 1,
172 [f71868a] = 1,
173 [f71869] = 1,
174 [f71869a] = 1,
175 [f71882fg] = 1,
176 [f71889fg] = 1,
177 [f71889ed] = 1,
178 [f71889a] = 1,
179 [f8000] = 0,
180 [f81768d] = 1,
181 [f81865f] = 1,
182 [f81866a] = 1,
183};
184
185static const char f71882fg_nr_fans[] = {
186 [f71808e] = 3,
187 [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
188 [f71858fg] = 3,
189 [f71862fg] = 3,
190 [f71868a] = 3,
191 [f71869] = 3,
192 [f71869a] = 3,
193 [f71882fg] = 4,
194 [f71889fg] = 3,
195 [f71889ed] = 3,
196 [f71889a] = 3,
197 [f8000] = 3, /* +1 fan which is monitor only */
198 [f81768d] = 3,
199 [f81865f] = 2,
200 [f81866a] = 3,
201};
202
203static const char f71882fg_temp_has_beep[] = {
204 [f71808e] = 0,
205 [f71808a] = 1,
206 [f71858fg] = 0,
207 [f71862fg] = 1,
208 [f71868a] = 1,
209 [f71869] = 1,
210 [f71869a] = 1,
211 [f71882fg] = 1,
212 [f71889fg] = 1,
213 [f71889ed] = 1,
214 [f71889a] = 1,
215 [f8000] = 0,
216 [f81768d] = 1,
217 [f81865f] = 1,
218 [f81866a] = 1,
219};
220
221static const char f71882fg_nr_temps[] = {
222 [f71808e] = 2,
223 [f71808a] = 2,
224 [f71858fg] = 3,
225 [f71862fg] = 3,
226 [f71868a] = 3,
227 [f71869] = 3,
228 [f71869a] = 3,
229 [f71882fg] = 3,
230 [f71889fg] = 3,
231 [f71889ed] = 3,
232 [f71889a] = 3,
233 [f8000] = 3,
234 [f81768d] = 3,
235 [f81865f] = 2,
236 [f81866a] = 3,
237};
238
239static struct platform_device *f71882fg_pdev;
240
241struct f71882fg_sio_data {
242 enum chips type;
243};
244
245struct f71882fg_data {
246 unsigned short addr;
247 enum chips type;
248 struct device *hwmon_dev;
249
250 struct mutex update_lock;
251 int temp_start; /* temp numbering start (0 or 1) */
252 bool valid; /* true if following fields are valid */
253 char auto_point_temp_signed;
254 unsigned long last_updated; /* In jiffies */
255 unsigned long last_limits; /* In jiffies */
256
257 /* Register Values */
258 u8 in[F71882FG_MAX_INS];
259 u8 in1_max;
260 u8 in_status;
261 u8 in_beep;
262 u16 fan[4];
263 u16 fan_target[4];
264 u16 fan_full_speed[4];
265 u8 fan_status;
266 u8 fan_beep;
267 /*
268 * Note: all models have max 3 temperature channels, but on some
269 * they are addressed as 0-2 and on others as 1-3, so for coding
270 * convenience we reserve space for 4 channels
271 */
272 u16 temp[4];
273 u8 temp_ovt[4];
274 u8 temp_high[4];
275 u8 temp_hyst[2]; /* 2 hysts stored per reg */
276 u8 temp_type[4];
277 u8 temp_status;
278 u8 temp_beep;
279 u8 temp_diode_open;
280 u8 temp_config;
281 u8 pwm[4];
282 u8 pwm_enable;
283 u8 pwm_auto_point_hyst[2];
284 u8 pwm_auto_point_mapping[4];
285 u8 pwm_auto_point_pwm[4][5];
286 s8 pwm_auto_point_temp[4][4];
287};
288
289static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
290{
291 u8 val;
292
293 outb(reg, data->addr + ADDR_REG_OFFSET);
294 val = inb(data->addr + DATA_REG_OFFSET);
295
296 return val;
297}
298
299static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
300{
301 u16 val;
302
303 val = f71882fg_read8(data, reg) << 8;
304 val |= f71882fg_read8(data, reg + 1);
305
306 return val;
307}
308
309static inline int fan_from_reg(u16 reg)
310{
311 return reg ? (1500000 / reg) : 0;
312}
313
314static inline u16 fan_to_reg(int fan)
315{
316 return fan ? (1500000 / fan) : 0;
317}
318
319static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
320{
321 outb(reg, data->addr + ADDR_REG_OFFSET);
322 outb(val, data->addr + DATA_REG_OFFSET);
323}
324
325static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
326{
327 f71882fg_write8(data, reg, val >> 8);
328 f71882fg_write8(data, reg + 1, val & 0xff);
329}
330
331static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
332{
333 if (data->type == f71858fg)
334 return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
335 else
336 return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
337}
338
339static struct f71882fg_data *f71882fg_update_device(struct device *dev)
340{
341 struct f71882fg_data *data = dev_get_drvdata(dev);
342 int nr_fans = f71882fg_nr_fans[data->type];
343 int nr_temps = f71882fg_nr_temps[data->type];
344 int nr, reg, point;
345
346 mutex_lock(&data->update_lock);
347
348 /* Update once every 60 seconds */
349 if (time_after(jiffies, data->last_limits + 60 * HZ) ||
350 !data->valid) {
351 if (f71882fg_has_in1_alarm[data->type]) {
352 if (data->type == f81866a) {
353 data->in1_max =
354 f71882fg_read8(data,
355 F81866_REG_IN1_HIGH);
356 data->in_beep =
357 f71882fg_read8(data,
358 F81866_REG_IN_BEEP);
359 } else {
360 data->in1_max =
361 f71882fg_read8(data,
362 F71882FG_REG_IN1_HIGH);
363 data->in_beep =
364 f71882fg_read8(data,
365 F71882FG_REG_IN_BEEP);
366 }
367 }
368
369 /* Get High & boundary temps*/
370 for (nr = data->temp_start; nr < nr_temps + data->temp_start;
371 nr++) {
372 data->temp_ovt[nr] = f71882fg_read8(data,
373 F71882FG_REG_TEMP_OVT(nr));
374 data->temp_high[nr] = f71882fg_read8(data,
375 F71882FG_REG_TEMP_HIGH(nr));
376 }
377
378 if (data->type != f8000) {
379 data->temp_hyst[0] = f71882fg_read8(data,
380 F71882FG_REG_TEMP_HYST(0));
381 data->temp_hyst[1] = f71882fg_read8(data,
382 F71882FG_REG_TEMP_HYST(1));
383 }
384 /* All but the f71858fg / f8000 have this register */
385 if ((data->type != f71858fg) && (data->type != f8000)) {
386 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
387 data->temp_type[1] = (reg & 0x02) ? 2 : 4;
388 data->temp_type[2] = (reg & 0x04) ? 2 : 4;
389 data->temp_type[3] = (reg & 0x08) ? 2 : 4;
390 }
391
392 if (f71882fg_fan_has_beep[data->type])
393 data->fan_beep = f71882fg_read8(data,
394 F71882FG_REG_FAN_BEEP);
395
396 if (f71882fg_temp_has_beep[data->type])
397 data->temp_beep = f71882fg_read8(data,
398 F71882FG_REG_TEMP_BEEP);
399
400 data->pwm_enable = f71882fg_read8(data,
401 F71882FG_REG_PWM_ENABLE);
402 data->pwm_auto_point_hyst[0] =
403 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
404 data->pwm_auto_point_hyst[1] =
405 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
406
407 for (nr = 0; nr < nr_fans; nr++) {
408 data->pwm_auto_point_mapping[nr] =
409 f71882fg_read8(data,
410 F71882FG_REG_POINT_MAPPING(nr));
411
412 switch (data->type) {
413 default:
414 for (point = 0; point < 5; point++) {
415 data->pwm_auto_point_pwm[nr][point] =
416 f71882fg_read8(data,
417 F71882FG_REG_POINT_PWM
418 (nr, point));
419 }
420 for (point = 0; point < 4; point++) {
421 data->pwm_auto_point_temp[nr][point] =
422 f71882fg_read8(data,
423 F71882FG_REG_POINT_TEMP
424 (nr, point));
425 }
426 break;
427 case f71808e:
428 case f71869:
429 data->pwm_auto_point_pwm[nr][0] =
430 f71882fg_read8(data,
431 F71882FG_REG_POINT_PWM(nr, 0));
432 fallthrough;
433 case f71862fg:
434 data->pwm_auto_point_pwm[nr][1] =
435 f71882fg_read8(data,
436 F71882FG_REG_POINT_PWM
437 (nr, 1));
438 data->pwm_auto_point_pwm[nr][4] =
439 f71882fg_read8(data,
440 F71882FG_REG_POINT_PWM
441 (nr, 4));
442 data->pwm_auto_point_temp[nr][0] =
443 f71882fg_read8(data,
444 F71882FG_REG_POINT_TEMP
445 (nr, 0));
446 data->pwm_auto_point_temp[nr][3] =
447 f71882fg_read8(data,
448 F71882FG_REG_POINT_TEMP
449 (nr, 3));
450 break;
451 }
452 }
453 data->last_limits = jiffies;
454 }
455
456 /* Update every second */
457 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
458 data->temp_status = f71882fg_read8(data,
459 F71882FG_REG_TEMP_STATUS);
460 data->temp_diode_open = f71882fg_read8(data,
461 F71882FG_REG_TEMP_DIODE_OPEN);
462 for (nr = data->temp_start; nr < nr_temps + data->temp_start;
463 nr++)
464 data->temp[nr] = f71882fg_read_temp(data, nr);
465
466 data->fan_status = f71882fg_read8(data,
467 F71882FG_REG_FAN_STATUS);
468 for (nr = 0; nr < nr_fans; nr++) {
469 data->fan[nr] = f71882fg_read16(data,
470 F71882FG_REG_FAN(nr));
471 data->fan_target[nr] =
472 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
473 data->fan_full_speed[nr] =
474 f71882fg_read16(data,
475 F71882FG_REG_FAN_FULL_SPEED(nr));
476 data->pwm[nr] =
477 f71882fg_read8(data, F71882FG_REG_PWM(nr));
478 }
479 /* Some models have 1 more fan with limited capabilities */
480 if (data->type == f71808a) {
481 data->fan[2] = f71882fg_read16(data,
482 F71882FG_REG_FAN(2));
483 data->pwm[2] = f71882fg_read8(data,
484 F71882FG_REG_PWM(2));
485 }
486 if (data->type == f8000)
487 data->fan[3] = f71882fg_read16(data,
488 F71882FG_REG_FAN(3));
489
490 if (f71882fg_has_in1_alarm[data->type]) {
491 if (data->type == f81866a)
492 data->in_status = f71882fg_read8(data,
493 F81866_REG_IN_STATUS);
494
495 else
496 data->in_status = f71882fg_read8(data,
497 F71882FG_REG_IN_STATUS);
498 }
499
500 for (nr = 0; nr < F71882FG_MAX_INS; nr++)
501 if (f71882fg_has_in[data->type][nr])
502 data->in[nr] = f71882fg_read8(data,
503 F71882FG_REG_IN(nr));
504
505 data->last_updated = jiffies;
506 data->valid = true;
507 }
508
509 mutex_unlock(&data->update_lock);
510
511 return data;
512}
513
514static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
515 char *buf)
516{
517 struct f71882fg_data *data = dev_get_drvdata(dev);
518 return sprintf(buf, "%s\n", f71882fg_names[data->type]);
519}
520
521static DEVICE_ATTR_RO(name);
522
523static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
524 char *buf)
525{
526 struct f71882fg_data *data = f71882fg_update_device(dev);
527 int nr = to_sensor_dev_attr_2(devattr)->index;
528 int sign, temp;
529
530 if (data->type == f71858fg) {
531 /* TEMP_TABLE_SEL 1 or 3 ? */
532 if (data->temp_config & 1) {
533 sign = data->temp[nr] & 0x0001;
534 temp = (data->temp[nr] >> 5) & 0x7ff;
535 } else {
536 sign = data->temp[nr] & 0x8000;
537 temp = (data->temp[nr] >> 5) & 0x3ff;
538 }
539 temp *= 125;
540 if (sign)
541 temp -= 128000;
542 } else {
543 temp = ((s8)data->temp[nr]) * 1000;
544 }
545
546 return sprintf(buf, "%d\n", temp);
547}
548
549static ssize_t show_temp_max(struct device *dev, struct device_attribute
550 *devattr, char *buf)
551{
552 struct f71882fg_data *data = f71882fg_update_device(dev);
553 int nr = to_sensor_dev_attr_2(devattr)->index;
554
555 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
556}
557
558static ssize_t store_temp_max(struct device *dev, struct device_attribute
559 *devattr, const char *buf, size_t count)
560{
561 struct f71882fg_data *data = dev_get_drvdata(dev);
562 int err, nr = to_sensor_dev_attr_2(devattr)->index;
563 long val;
564
565 err = kstrtol(buf, 10, &val);
566 if (err)
567 return err;
568
569 val /= 1000;
570 val = clamp_val(val, 0, 255);
571
572 mutex_lock(&data->update_lock);
573 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
574 data->temp_high[nr] = val;
575 mutex_unlock(&data->update_lock);
576
577 return count;
578}
579
580static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
581 *devattr, char *buf)
582{
583 struct f71882fg_data *data = f71882fg_update_device(dev);
584 int nr = to_sensor_dev_attr_2(devattr)->index;
585 int temp_max_hyst;
586
587 mutex_lock(&data->update_lock);
588 if (nr & 1)
589 temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
590 else
591 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
592 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
593 mutex_unlock(&data->update_lock);
594
595 return sprintf(buf, "%d\n", temp_max_hyst);
596}
597
598static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
599 *devattr, const char *buf, size_t count)
600{
601 struct f71882fg_data *data = dev_get_drvdata(dev);
602 int err, nr = to_sensor_dev_attr_2(devattr)->index;
603 ssize_t ret = count;
604 u8 reg;
605 long val;
606
607 err = kstrtol(buf, 10, &val);
608 if (err)
609 return err;
610
611 val /= 1000;
612
613 mutex_lock(&data->update_lock);
614
615 /* convert abs to relative and check */
616 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
617 val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
618 val = data->temp_high[nr] - val;
619
620 /* convert value to register contents */
621 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
622 if (nr & 1)
623 reg = (reg & 0x0f) | (val << 4);
624 else
625 reg = (reg & 0xf0) | val;
626 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
627 data->temp_hyst[nr / 2] = reg;
628
629 mutex_unlock(&data->update_lock);
630 return ret;
631}
632
633static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
634 *devattr, char *buf)
635{
636 struct f71882fg_data *data = f71882fg_update_device(dev);
637 int nr = to_sensor_dev_attr_2(devattr)->index;
638
639 if (data->temp_status & (1 << nr))
640 return sprintf(buf, "1\n");
641 else
642 return sprintf(buf, "0\n");
643}
644
645static ssize_t show_temp_crit(struct device *dev, struct device_attribute
646 *devattr, char *buf)
647{
648 struct f71882fg_data *data = f71882fg_update_device(dev);
649 int nr = to_sensor_dev_attr_2(devattr)->index;
650
651 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
652}
653
654static ssize_t store_temp_crit(struct device *dev, struct device_attribute
655 *devattr, const char *buf, size_t count)
656{
657 struct f71882fg_data *data = dev_get_drvdata(dev);
658 int err, nr = to_sensor_dev_attr_2(devattr)->index;
659 long val;
660
661 err = kstrtol(buf, 10, &val);
662 if (err)
663 return err;
664
665 val /= 1000;
666 val = clamp_val(val, 0, 255);
667
668 mutex_lock(&data->update_lock);
669 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
670 data->temp_ovt[nr] = val;
671 mutex_unlock(&data->update_lock);
672
673 return count;
674}
675
676static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
677 *devattr, char *buf)
678{
679 struct f71882fg_data *data = f71882fg_update_device(dev);
680 int nr = to_sensor_dev_attr_2(devattr)->index;
681 int temp_crit_hyst;
682
683 mutex_lock(&data->update_lock);
684 if (nr & 1)
685 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
686 else
687 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
688 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
689 mutex_unlock(&data->update_lock);
690
691 return sprintf(buf, "%d\n", temp_crit_hyst);
692}
693
694static ssize_t show_temp_fault(struct device *dev, struct device_attribute
695 *devattr, char *buf)
696{
697 struct f71882fg_data *data = f71882fg_update_device(dev);
698 int nr = to_sensor_dev_attr_2(devattr)->index;
699
700 if (data->temp_diode_open & (1 << nr))
701 return sprintf(buf, "1\n");
702 else
703 return sprintf(buf, "0\n");
704}
705
706/*
707 * Temp attr for the f71858fg, the f71858fg is special as it has its
708 * temperature indexes start at 0 (the others start at 1)
709 */
710static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
711 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
712 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
713 store_temp_max, 0, 0),
714 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
715 store_temp_max_hyst, 0, 0),
716 SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
717 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
718 store_temp_crit, 0, 0),
719 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
720 0, 0),
721 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
722 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
723 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
724 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
725 store_temp_max, 0, 1),
726 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
727 store_temp_max_hyst, 0, 1),
728 SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
729 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
730 store_temp_crit, 0, 1),
731 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
732 0, 1),
733 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
734 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
735 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
736 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
737 store_temp_max, 0, 2),
738 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
739 store_temp_max_hyst, 0, 2),
740 SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
741 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
742 store_temp_crit, 0, 2),
743 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
744 0, 2),
745 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
746 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
747};
748
749static ssize_t show_temp_type(struct device *dev, struct device_attribute
750 *devattr, char *buf)
751{
752 struct f71882fg_data *data = f71882fg_update_device(dev);
753 int nr = to_sensor_dev_attr_2(devattr)->index;
754
755 return sprintf(buf, "%d\n", data->temp_type[nr]);
756}
757
758/* Temp attr for the standard models */
759static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
760 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
761 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
762 store_temp_max, 0, 1),
763 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
764 store_temp_max_hyst, 0, 1),
765 /*
766 * Should really be temp1_max_alarm, but older versions did not handle
767 * the max and crit alarms separately and lm_sensors v2 depends on the
768 * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
769 */
770 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
771 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
772 store_temp_crit, 0, 1),
773 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
774 0, 1),
775 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
776 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
777 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
778}, {
779 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
780 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
781 store_temp_max, 0, 2),
782 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
783 store_temp_max_hyst, 0, 2),
784 /* Should be temp2_max_alarm, see temp1_alarm note */
785 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
786 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
787 store_temp_crit, 0, 2),
788 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
789 0, 2),
790 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
791 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
792 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
793}, {
794 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
795 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
796 store_temp_max, 0, 3),
797 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
798 store_temp_max_hyst, 0, 3),
799 /* Should be temp3_max_alarm, see temp1_alarm note */
800 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
801 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
802 store_temp_crit, 0, 3),
803 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
804 0, 3),
805 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
806 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
807 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
808} };
809
810static ssize_t show_temp_beep(struct device *dev, struct device_attribute
811 *devattr, char *buf)
812{
813 struct f71882fg_data *data = f71882fg_update_device(dev);
814 int nr = to_sensor_dev_attr_2(devattr)->index;
815
816 if (data->temp_beep & (1 << nr))
817 return sprintf(buf, "1\n");
818 else
819 return sprintf(buf, "0\n");
820}
821
822static ssize_t store_temp_beep(struct device *dev, struct device_attribute
823 *devattr, const char *buf, size_t count)
824{
825 struct f71882fg_data *data = dev_get_drvdata(dev);
826 int err, nr = to_sensor_dev_attr_2(devattr)->index;
827 unsigned long val;
828
829 err = kstrtoul(buf, 10, &val);
830 if (err)
831 return err;
832
833 mutex_lock(&data->update_lock);
834 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
835 if (val)
836 data->temp_beep |= 1 << nr;
837 else
838 data->temp_beep &= ~(1 << nr);
839
840 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
841 mutex_unlock(&data->update_lock);
842
843 return count;
844}
845
846/* Temp attr for models which can beep on temp alarm */
847static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
848 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
849 store_temp_beep, 0, 1),
850 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
851 store_temp_beep, 0, 5),
852}, {
853 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
854 store_temp_beep, 0, 2),
855 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
856 store_temp_beep, 0, 6),
857}, {
858 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
859 store_temp_beep, 0, 3),
860 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
861 store_temp_beep, 0, 7),
862} };
863
864static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { {
865 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
866 store_temp_beep, 0, 0),
867 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
868 store_temp_beep, 0, 4),
869}, {
870 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
871 store_temp_beep, 0, 1),
872 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
873 store_temp_beep, 0, 5),
874}, {
875 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
876 store_temp_beep, 0, 2),
877 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
878 store_temp_beep, 0, 6),
879} };
880
881/*
882 * Temp attr for the f8000
883 * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
884 * is used as hysteresis value to clear alarms
885 * Also like the f71858fg its temperature indexes start at 0
886 */
887static struct sensor_device_attribute_2 f8000_temp_attr[] = {
888 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
889 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
890 store_temp_crit, 0, 0),
891 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
892 store_temp_max, 0, 0),
893 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
894 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
895 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
896 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
897 store_temp_crit, 0, 1),
898 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
899 store_temp_max, 0, 1),
900 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
901 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
902 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
903 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
904 store_temp_crit, 0, 2),
905 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
906 store_temp_max, 0, 2),
907 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
908 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
909};
910
911static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
912 char *buf)
913{
914 struct f71882fg_data *data = f71882fg_update_device(dev);
915 int nr = to_sensor_dev_attr_2(devattr)->index;
916
917 return sprintf(buf, "%d\n", data->in[nr] * 8);
918}
919
920/* in attr for all models */
921static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
922 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
923 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
924 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
925 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
926 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
927 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
928 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
929 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
930 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
931 SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9),
932 SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10),
933};
934
935static ssize_t show_in_max(struct device *dev, struct device_attribute
936 *devattr, char *buf)
937{
938 struct f71882fg_data *data = f71882fg_update_device(dev);
939
940 return sprintf(buf, "%d\n", data->in1_max * 8);
941}
942
943static ssize_t store_in_max(struct device *dev, struct device_attribute
944 *devattr, const char *buf, size_t count)
945{
946 struct f71882fg_data *data = dev_get_drvdata(dev);
947 int err;
948 long val;
949
950 err = kstrtol(buf, 10, &val);
951 if (err)
952 return err;
953
954 val /= 8;
955 val = clamp_val(val, 0, 255);
956
957 mutex_lock(&data->update_lock);
958 if (data->type == f81866a)
959 f71882fg_write8(data, F81866_REG_IN1_HIGH, val);
960 else
961 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
962 data->in1_max = val;
963 mutex_unlock(&data->update_lock);
964
965 return count;
966}
967
968static ssize_t show_in_beep(struct device *dev, struct device_attribute
969 *devattr, char *buf)
970{
971 struct f71882fg_data *data = f71882fg_update_device(dev);
972 int nr = to_sensor_dev_attr_2(devattr)->index;
973
974 if (data->in_beep & (1 << nr))
975 return sprintf(buf, "1\n");
976 else
977 return sprintf(buf, "0\n");
978}
979
980static ssize_t store_in_beep(struct device *dev, struct device_attribute
981 *devattr, const char *buf, size_t count)
982{
983 struct f71882fg_data *data = dev_get_drvdata(dev);
984 int err, nr = to_sensor_dev_attr_2(devattr)->index;
985 unsigned long val;
986
987 err = kstrtoul(buf, 10, &val);
988 if (err)
989 return err;
990
991 mutex_lock(&data->update_lock);
992 if (data->type == f81866a)
993 data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP);
994 else
995 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
996
997 if (val)
998 data->in_beep |= 1 << nr;
999 else
1000 data->in_beep &= ~(1 << nr);
1001
1002 if (data->type == f81866a)
1003 f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep);
1004 else
1005 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
1006 mutex_unlock(&data->update_lock);
1007
1008 return count;
1009}
1010
1011static ssize_t show_in_alarm(struct device *dev, struct device_attribute
1012 *devattr, char *buf)
1013{
1014 struct f71882fg_data *data = f71882fg_update_device(dev);
1015 int nr = to_sensor_dev_attr_2(devattr)->index;
1016
1017 if (data->in_status & (1 << nr))
1018 return sprintf(buf, "1\n");
1019 else
1020 return sprintf(buf, "0\n");
1021}
1022
1023/* For models with in1 alarm capability */
1024static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
1025 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
1026 0, 1),
1027 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
1028 0, 1),
1029 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
1030};
1031
1032static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
1033 char *buf)
1034{
1035 struct f71882fg_data *data = f71882fg_update_device(dev);
1036 int nr = to_sensor_dev_attr_2(devattr)->index;
1037 int speed = fan_from_reg(data->fan[nr]);
1038
1039 if (speed == FAN_MIN_DETECT)
1040 speed = 0;
1041
1042 return sprintf(buf, "%d\n", speed);
1043}
1044
1045static ssize_t show_fan_full_speed(struct device *dev,
1046 struct device_attribute *devattr, char *buf)
1047{
1048 struct f71882fg_data *data = f71882fg_update_device(dev);
1049 int nr = to_sensor_dev_attr_2(devattr)->index;
1050 int speed = fan_from_reg(data->fan_full_speed[nr]);
1051 return sprintf(buf, "%d\n", speed);
1052}
1053
1054static ssize_t store_fan_full_speed(struct device *dev,
1055 struct device_attribute *devattr,
1056 const char *buf, size_t count)
1057{
1058 struct f71882fg_data *data = dev_get_drvdata(dev);
1059 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1060 long val;
1061
1062 err = kstrtol(buf, 10, &val);
1063 if (err)
1064 return err;
1065
1066 val = clamp_val(val, 23, 1500000);
1067 val = fan_to_reg(val);
1068
1069 mutex_lock(&data->update_lock);
1070 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
1071 data->fan_full_speed[nr] = val;
1072 mutex_unlock(&data->update_lock);
1073
1074 return count;
1075}
1076
1077static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
1078 *devattr, char *buf)
1079{
1080 struct f71882fg_data *data = f71882fg_update_device(dev);
1081 int nr = to_sensor_dev_attr_2(devattr)->index;
1082
1083 if (data->fan_status & (1 << nr))
1084 return sprintf(buf, "1\n");
1085 else
1086 return sprintf(buf, "0\n");
1087}
1088
1089static ssize_t show_pwm(struct device *dev,
1090 struct device_attribute *devattr, char *buf)
1091{
1092 struct f71882fg_data *data = f71882fg_update_device(dev);
1093 int val, nr = to_sensor_dev_attr_2(devattr)->index;
1094 mutex_lock(&data->update_lock);
1095 if (data->pwm_enable & (1 << (2 * nr)))
1096 /* PWM mode */
1097 val = data->pwm[nr];
1098 else {
1099 /* RPM mode */
1100 if (fan_from_reg(data->fan_full_speed[nr]))
1101 val = 255 * fan_from_reg(data->fan_target[nr])
1102 / fan_from_reg(data->fan_full_speed[nr]);
1103 else
1104 val = 0;
1105 }
1106 mutex_unlock(&data->update_lock);
1107 return sprintf(buf, "%d\n", val);
1108}
1109
1110static ssize_t store_pwm(struct device *dev,
1111 struct device_attribute *devattr, const char *buf,
1112 size_t count)
1113{
1114 struct f71882fg_data *data = dev_get_drvdata(dev);
1115 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1116 long val;
1117
1118 err = kstrtol(buf, 10, &val);
1119 if (err)
1120 return err;
1121
1122 val = clamp_val(val, 0, 255);
1123
1124 mutex_lock(&data->update_lock);
1125 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1126 if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
1127 (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
1128 count = -EROFS;
1129 goto leave;
1130 }
1131 if (data->pwm_enable & (1 << (2 * nr))) {
1132 /* PWM mode */
1133 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1134 data->pwm[nr] = val;
1135 } else {
1136 /* RPM mode */
1137 int target, full_speed;
1138 full_speed = f71882fg_read16(data,
1139 F71882FG_REG_FAN_FULL_SPEED(nr));
1140 target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
1141 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
1142 data->fan_target[nr] = target;
1143 data->fan_full_speed[nr] = full_speed;
1144 }
1145leave:
1146 mutex_unlock(&data->update_lock);
1147
1148 return count;
1149}
1150
1151static ssize_t show_pwm_enable(struct device *dev,
1152 struct device_attribute *devattr, char *buf)
1153{
1154 int result = 0;
1155 struct f71882fg_data *data = f71882fg_update_device(dev);
1156 int nr = to_sensor_dev_attr_2(devattr)->index;
1157
1158 switch ((data->pwm_enable >> 2 * nr) & 3) {
1159 case 0:
1160 case 1:
1161 result = 2; /* Normal auto mode */
1162 break;
1163 case 2:
1164 result = 1; /* Manual mode */
1165 break;
1166 case 3:
1167 if (data->type == f8000)
1168 result = 3; /* Thermostat mode */
1169 else
1170 result = 1; /* Manual mode */
1171 break;
1172 }
1173
1174 return sprintf(buf, "%d\n", result);
1175}
1176
1177static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1178 *devattr, const char *buf, size_t count)
1179{
1180 struct f71882fg_data *data = dev_get_drvdata(dev);
1181 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1182 long val;
1183
1184 err = kstrtol(buf, 10, &val);
1185 if (err)
1186 return err;
1187
1188 /* Special case for F8000 pwm channel 3 which only does auto mode */
1189 if (data->type == f8000 && nr == 2 && val != 2)
1190 return -EINVAL;
1191
1192 mutex_lock(&data->update_lock);
1193 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1194 /* Special case for F8000 auto PWM mode / Thermostat mode */
1195 if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
1196 switch (val) {
1197 case 2:
1198 data->pwm_enable &= ~(2 << (2 * nr));
1199 break; /* Normal auto mode */
1200 case 3:
1201 data->pwm_enable |= 2 << (2 * nr);
1202 break; /* Thermostat mode */
1203 default:
1204 count = -EINVAL;
1205 goto leave;
1206 }
1207 } else {
1208 switch (val) {
1209 case 1:
1210 /* The f71858fg does not support manual RPM mode */
1211 if (data->type == f71858fg &&
1212 ((data->pwm_enable >> (2 * nr)) & 1)) {
1213 count = -EINVAL;
1214 goto leave;
1215 }
1216 data->pwm_enable |= 2 << (2 * nr);
1217 break; /* Manual */
1218 case 2:
1219 data->pwm_enable &= ~(2 << (2 * nr));
1220 break; /* Normal auto mode */
1221 default:
1222 count = -EINVAL;
1223 goto leave;
1224 }
1225 }
1226 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
1227leave:
1228 mutex_unlock(&data->update_lock);
1229
1230 return count;
1231}
1232
1233static ssize_t show_pwm_interpolate(struct device *dev,
1234 struct device_attribute *devattr, char *buf)
1235{
1236 int result;
1237 struct f71882fg_data *data = f71882fg_update_device(dev);
1238 int nr = to_sensor_dev_attr_2(devattr)->index;
1239
1240 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
1241
1242 return sprintf(buf, "%d\n", result);
1243}
1244
1245static ssize_t store_pwm_interpolate(struct device *dev,
1246 struct device_attribute *devattr,
1247 const char *buf, size_t count)
1248{
1249 struct f71882fg_data *data = dev_get_drvdata(dev);
1250 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1251 unsigned long val;
1252
1253 err = kstrtoul(buf, 10, &val);
1254 if (err)
1255 return err;
1256
1257 mutex_lock(&data->update_lock);
1258 data->pwm_auto_point_mapping[nr] =
1259 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
1260 if (val)
1261 val = data->pwm_auto_point_mapping[nr] | (1 << 4);
1262 else
1263 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
1264 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1265 data->pwm_auto_point_mapping[nr] = val;
1266 mutex_unlock(&data->update_lock);
1267
1268 return count;
1269}
1270
1271/* Fan / PWM attr common to all models */
1272static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
1273 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
1274 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
1275 show_fan_full_speed,
1276 store_fan_full_speed, 0, 0),
1277 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
1278 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
1279 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1280 store_pwm_enable, 0, 0),
1281 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
1282 show_pwm_interpolate, store_pwm_interpolate, 0, 0),
1283}, {
1284 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
1285 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
1286 show_fan_full_speed,
1287 store_fan_full_speed, 0, 1),
1288 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
1289 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
1290 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1291 store_pwm_enable, 0, 1),
1292 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
1293 show_pwm_interpolate, store_pwm_interpolate, 0, 1),
1294}, {
1295 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
1296 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
1297 show_fan_full_speed,
1298 store_fan_full_speed, 0, 2),
1299 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
1300 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
1301 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1302 store_pwm_enable, 0, 2),
1303 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
1304 show_pwm_interpolate, store_pwm_interpolate, 0, 2),
1305}, {
1306 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
1307 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
1308 show_fan_full_speed,
1309 store_fan_full_speed, 0, 3),
1310 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
1311 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
1312 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1313 store_pwm_enable, 0, 3),
1314 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
1315 show_pwm_interpolate, store_pwm_interpolate, 0, 3),
1316} };
1317
1318static ssize_t show_simple_pwm(struct device *dev,
1319 struct device_attribute *devattr, char *buf)
1320{
1321 struct f71882fg_data *data = f71882fg_update_device(dev);
1322 int val, nr = to_sensor_dev_attr_2(devattr)->index;
1323
1324 val = data->pwm[nr];
1325 return sprintf(buf, "%d\n", val);
1326}
1327
1328static ssize_t store_simple_pwm(struct device *dev,
1329 struct device_attribute *devattr,
1330 const char *buf, size_t count)
1331{
1332 struct f71882fg_data *data = dev_get_drvdata(dev);
1333 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1334 long val;
1335
1336 err = kstrtol(buf, 10, &val);
1337 if (err)
1338 return err;
1339
1340 val = clamp_val(val, 0, 255);
1341
1342 mutex_lock(&data->update_lock);
1343 f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1344 data->pwm[nr] = val;
1345 mutex_unlock(&data->update_lock);
1346
1347 return count;
1348}
1349
1350/* Attr for the third fan of the f71808a, which only has manual pwm */
1351static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
1352 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
1353 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
1354 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
1355 show_simple_pwm, store_simple_pwm, 0, 2),
1356};
1357
1358static ssize_t show_fan_beep(struct device *dev, struct device_attribute
1359 *devattr, char *buf)
1360{
1361 struct f71882fg_data *data = f71882fg_update_device(dev);
1362 int nr = to_sensor_dev_attr_2(devattr)->index;
1363
1364 if (data->fan_beep & (1 << nr))
1365 return sprintf(buf, "1\n");
1366 else
1367 return sprintf(buf, "0\n");
1368}
1369
1370static ssize_t store_fan_beep(struct device *dev, struct device_attribute
1371 *devattr, const char *buf, size_t count)
1372{
1373 struct f71882fg_data *data = dev_get_drvdata(dev);
1374 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1375 unsigned long val;
1376
1377 err = kstrtoul(buf, 10, &val);
1378 if (err)
1379 return err;
1380
1381 mutex_lock(&data->update_lock);
1382 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
1383 if (val)
1384 data->fan_beep |= 1 << nr;
1385 else
1386 data->fan_beep &= ~(1 << nr);
1387
1388 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
1389 mutex_unlock(&data->update_lock);
1390
1391 return count;
1392}
1393
1394/* Attr for models which can beep on Fan alarm */
1395static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
1396 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
1397 store_fan_beep, 0, 0),
1398 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
1399 store_fan_beep, 0, 1),
1400 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
1401 store_fan_beep, 0, 2),
1402 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
1403 store_fan_beep, 0, 3),
1404};
1405
1406static ssize_t show_pwm_auto_point_channel(struct device *dev,
1407 struct device_attribute *devattr,
1408 char *buf)
1409{
1410 int result;
1411 struct f71882fg_data *data = f71882fg_update_device(dev);
1412 int nr = to_sensor_dev_attr_2(devattr)->index;
1413
1414 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
1415 data->temp_start);
1416
1417 return sprintf(buf, "%d\n", result);
1418}
1419
1420static ssize_t store_pwm_auto_point_channel(struct device *dev,
1421 struct device_attribute *devattr,
1422 const char *buf, size_t count)
1423{
1424 struct f71882fg_data *data = dev_get_drvdata(dev);
1425 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1426 long val;
1427
1428 err = kstrtol(buf, 10, &val);
1429 if (err)
1430 return err;
1431
1432 switch (val) {
1433 case 1:
1434 val = 0;
1435 break;
1436 case 2:
1437 val = 1;
1438 break;
1439 case 4:
1440 val = 2;
1441 break;
1442 default:
1443 return -EINVAL;
1444 }
1445 val += data->temp_start;
1446 mutex_lock(&data->update_lock);
1447 data->pwm_auto_point_mapping[nr] =
1448 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
1449 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
1450 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
1451 data->pwm_auto_point_mapping[nr] = val;
1452 mutex_unlock(&data->update_lock);
1453
1454 return count;
1455}
1456
1457static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1458 struct device_attribute *devattr,
1459 char *buf)
1460{
1461 int result;
1462 struct f71882fg_data *data = f71882fg_update_device(dev);
1463 int pwm = to_sensor_dev_attr_2(devattr)->index;
1464 int point = to_sensor_dev_attr_2(devattr)->nr;
1465
1466 mutex_lock(&data->update_lock);
1467 if (data->pwm_enable & (1 << (2 * pwm))) {
1468 /* PWM mode */
1469 result = data->pwm_auto_point_pwm[pwm][point];
1470 } else {
1471 /* RPM mode */
1472 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1473 }
1474 mutex_unlock(&data->update_lock);
1475
1476 return sprintf(buf, "%d\n", result);
1477}
1478
1479static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1480 struct device_attribute *devattr,
1481 const char *buf, size_t count)
1482{
1483 struct f71882fg_data *data = dev_get_drvdata(dev);
1484 int err, pwm = to_sensor_dev_attr_2(devattr)->index;
1485 int point = to_sensor_dev_attr_2(devattr)->nr;
1486 long val;
1487
1488 err = kstrtol(buf, 10, &val);
1489 if (err)
1490 return err;
1491
1492 val = clamp_val(val, 0, 255);
1493
1494 mutex_lock(&data->update_lock);
1495 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1496 if (data->pwm_enable & (1 << (2 * pwm))) {
1497 /* PWM mode */
1498 } else {
1499 /* RPM mode */
1500 if (val < 29) /* Prevent negative numbers */
1501 val = 255;
1502 else
1503 val = (255 - val) * 32 / val;
1504 }
1505 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
1506 data->pwm_auto_point_pwm[pwm][point] = val;
1507 mutex_unlock(&data->update_lock);
1508
1509 return count;
1510}
1511
1512static ssize_t show_pwm_auto_point_temp(struct device *dev,
1513 struct device_attribute *devattr,
1514 char *buf)
1515{
1516 int result;
1517 struct f71882fg_data *data = f71882fg_update_device(dev);
1518 int pwm = to_sensor_dev_attr_2(devattr)->index;
1519 int point = to_sensor_dev_attr_2(devattr)->nr;
1520
1521 result = data->pwm_auto_point_temp[pwm][point];
1522 return sprintf(buf, "%d\n", 1000 * result);
1523}
1524
1525static ssize_t store_pwm_auto_point_temp(struct device *dev,
1526 struct device_attribute *devattr,
1527 const char *buf, size_t count)
1528{
1529 struct f71882fg_data *data = dev_get_drvdata(dev);
1530 int err, pwm = to_sensor_dev_attr_2(devattr)->index;
1531 int point = to_sensor_dev_attr_2(devattr)->nr;
1532 long val;
1533
1534 err = kstrtol(buf, 10, &val);
1535 if (err)
1536 return err;
1537
1538 val /= 1000;
1539
1540 if (data->auto_point_temp_signed)
1541 val = clamp_val(val, -128, 127);
1542 else
1543 val = clamp_val(val, 0, 127);
1544
1545 mutex_lock(&data->update_lock);
1546 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
1547 data->pwm_auto_point_temp[pwm][point] = val;
1548 mutex_unlock(&data->update_lock);
1549
1550 return count;
1551}
1552
1553static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
1554 struct device_attribute *devattr,
1555 char *buf)
1556{
1557 int result = 0;
1558 struct f71882fg_data *data = f71882fg_update_device(dev);
1559 int nr = to_sensor_dev_attr_2(devattr)->index;
1560 int point = to_sensor_dev_attr_2(devattr)->nr;
1561
1562 mutex_lock(&data->update_lock);
1563 if (nr & 1)
1564 result = data->pwm_auto_point_hyst[nr / 2] >> 4;
1565 else
1566 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
1567 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
1568 mutex_unlock(&data->update_lock);
1569
1570 return sprintf(buf, "%d\n", result);
1571}
1572
1573static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
1574 struct device_attribute *devattr,
1575 const char *buf, size_t count)
1576{
1577 struct f71882fg_data *data = dev_get_drvdata(dev);
1578 int err, nr = to_sensor_dev_attr_2(devattr)->index;
1579 int point = to_sensor_dev_attr_2(devattr)->nr;
1580 u8 reg;
1581 long val;
1582
1583 err = kstrtol(buf, 10, &val);
1584 if (err)
1585 return err;
1586
1587 val /= 1000;
1588
1589 mutex_lock(&data->update_lock);
1590 data->pwm_auto_point_temp[nr][point] =
1591 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
1592 val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
1593 data->pwm_auto_point_temp[nr][point]);
1594 val = data->pwm_auto_point_temp[nr][point] - val;
1595
1596 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
1597 if (nr & 1)
1598 reg = (reg & 0x0f) | (val << 4);
1599 else
1600 reg = (reg & 0xf0) | val;
1601
1602 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
1603 data->pwm_auto_point_hyst[nr / 2] = reg;
1604 mutex_unlock(&data->update_lock);
1605
1606 return count;
1607}
1608
1609/*
1610 * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
1611 * standard models
1612 */
1613static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
1614 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
1615 show_pwm_auto_point_channel,
1616 store_pwm_auto_point_channel, 0, 0),
1617 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
1618 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1619 1, 0),
1620 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
1621 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1622 4, 0),
1623 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
1624 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1625 0, 0),
1626 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
1627 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1628 3, 0),
1629 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1630 show_pwm_auto_point_temp_hyst,
1631 store_pwm_auto_point_temp_hyst,
1632 0, 0),
1633 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
1634 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1635}, {
1636 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1637 show_pwm_auto_point_channel,
1638 store_pwm_auto_point_channel, 0, 1),
1639 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1640 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1641 1, 1),
1642 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1643 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1644 4, 1),
1645 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
1646 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1647 0, 1),
1648 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
1649 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1650 3, 1),
1651 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1652 show_pwm_auto_point_temp_hyst,
1653 store_pwm_auto_point_temp_hyst,
1654 0, 1),
1655 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
1656 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1657}, {
1658 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1659 show_pwm_auto_point_channel,
1660 store_pwm_auto_point_channel, 0, 2),
1661 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1662 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1663 1, 2),
1664 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1665 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1666 4, 2),
1667 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
1668 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1669 0, 2),
1670 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
1671 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1672 3, 2),
1673 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1674 show_pwm_auto_point_temp_hyst,
1675 store_pwm_auto_point_temp_hyst,
1676 0, 2),
1677 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
1678 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1679} };
1680
1681/*
1682 * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
1683 * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
1684 * programmed instead of being hardcoded to 0xff
1685 */
1686static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
1687 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
1688 show_pwm_auto_point_channel,
1689 store_pwm_auto_point_channel, 0, 0),
1690 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
1691 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1692 0, 0),
1693 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
1694 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1695 1, 0),
1696 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
1697 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1698 4, 0),
1699 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
1700 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1701 0, 0),
1702 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
1703 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1704 3, 0),
1705 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1706 show_pwm_auto_point_temp_hyst,
1707 store_pwm_auto_point_temp_hyst,
1708 0, 0),
1709 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
1710 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1711}, {
1712 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1713 show_pwm_auto_point_channel,
1714 store_pwm_auto_point_channel, 0, 1),
1715 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1716 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1717 0, 1),
1718 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1719 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1720 1, 1),
1721 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
1722 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1723 4, 1),
1724 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
1725 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1726 0, 1),
1727 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
1728 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1729 3, 1),
1730 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1731 show_pwm_auto_point_temp_hyst,
1732 store_pwm_auto_point_temp_hyst,
1733 0, 1),
1734 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
1735 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1736}, {
1737 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1738 show_pwm_auto_point_channel,
1739 store_pwm_auto_point_channel, 0, 2),
1740 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1741 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1742 0, 2),
1743 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1744 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1745 1, 2),
1746 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
1747 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1748 4, 2),
1749 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
1750 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1751 0, 2),
1752 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
1753 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1754 3, 2),
1755 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1756 show_pwm_auto_point_temp_hyst,
1757 store_pwm_auto_point_temp_hyst,
1758 0, 2),
1759 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
1760 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1761} };
1762
1763/* PWM attr for the standard models */
1764static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
1765 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
1766 show_pwm_auto_point_channel,
1767 store_pwm_auto_point_channel, 0, 0),
1768 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
1769 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1770 0, 0),
1771 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
1772 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1773 1, 0),
1774 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
1775 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1776 2, 0),
1777 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
1778 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1779 3, 0),
1780 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
1781 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1782 4, 0),
1783 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
1784 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1785 0, 0),
1786 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
1787 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1788 1, 0),
1789 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
1790 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1791 2, 0),
1792 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
1793 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1794 3, 0),
1795 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1796 show_pwm_auto_point_temp_hyst,
1797 store_pwm_auto_point_temp_hyst,
1798 0, 0),
1799 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
1800 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
1801 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
1802 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
1803 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
1804 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1805}, {
1806 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1807 show_pwm_auto_point_channel,
1808 store_pwm_auto_point_channel, 0, 1),
1809 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1810 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1811 0, 1),
1812 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1813 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1814 1, 1),
1815 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
1816 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1817 2, 1),
1818 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
1819 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1820 3, 1),
1821 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
1822 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1823 4, 1),
1824 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
1825 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1826 0, 1),
1827 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
1828 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1829 1, 1),
1830 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
1831 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1832 2, 1),
1833 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
1834 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1835 3, 1),
1836 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1837 show_pwm_auto_point_temp_hyst,
1838 store_pwm_auto_point_temp_hyst,
1839 0, 1),
1840 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
1841 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
1842 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
1843 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
1844 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
1845 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1846}, {
1847 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1848 show_pwm_auto_point_channel,
1849 store_pwm_auto_point_channel, 0, 2),
1850 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1851 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1852 0, 2),
1853 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1854 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1855 1, 2),
1856 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
1857 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1858 2, 2),
1859 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
1860 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1861 3, 2),
1862 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
1863 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1864 4, 2),
1865 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
1866 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1867 0, 2),
1868 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
1869 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1870 1, 2),
1871 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
1872 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1873 2, 2),
1874 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
1875 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1876 3, 2),
1877 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1878 show_pwm_auto_point_temp_hyst,
1879 store_pwm_auto_point_temp_hyst,
1880 0, 2),
1881 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
1882 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
1883 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
1884 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
1885 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
1886 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1887}, {
1888 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
1889 show_pwm_auto_point_channel,
1890 store_pwm_auto_point_channel, 0, 3),
1891 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
1892 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1893 0, 3),
1894 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
1895 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1896 1, 3),
1897 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
1898 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1899 2, 3),
1900 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
1901 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1902 3, 3),
1903 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
1904 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1905 4, 3),
1906 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
1907 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1908 0, 3),
1909 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
1910 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1911 1, 3),
1912 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
1913 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1914 2, 3),
1915 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
1916 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1917 3, 3),
1918 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1919 show_pwm_auto_point_temp_hyst,
1920 store_pwm_auto_point_temp_hyst,
1921 0, 3),
1922 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
1923 show_pwm_auto_point_temp_hyst, NULL, 1, 3),
1924 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
1925 show_pwm_auto_point_temp_hyst, NULL, 2, 3),
1926 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
1927 show_pwm_auto_point_temp_hyst, NULL, 3, 3),
1928} };
1929
1930/* Fan attr specific to the f8000 (4th fan input can only measure speed) */
1931static struct sensor_device_attribute_2 f8000_fan_attr[] = {
1932 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
1933};
1934
1935/*
1936 * PWM attr for the f8000, zones mapped to temp instead of to pwm!
1937 * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
1938 * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
1939 */
1940static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
1941 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
1942 show_pwm_auto_point_channel,
1943 store_pwm_auto_point_channel, 0, 0),
1944 SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
1945 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1946 0, 2),
1947 SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
1948 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1949 1, 2),
1950 SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
1951 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1952 2, 2),
1953 SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
1954 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1955 3, 2),
1956 SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
1957 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1958 4, 2),
1959 SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
1960 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1961 0, 2),
1962 SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
1963 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1964 1, 2),
1965 SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
1966 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1967 2, 2),
1968 SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
1969 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1970 3, 2),
1971 SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1972 show_pwm_auto_point_temp_hyst,
1973 store_pwm_auto_point_temp_hyst,
1974 0, 2),
1975 SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
1976 show_pwm_auto_point_temp_hyst, NULL, 1, 2),
1977 SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
1978 show_pwm_auto_point_temp_hyst, NULL, 2, 2),
1979 SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
1980 show_pwm_auto_point_temp_hyst, NULL, 3, 2),
1981}, {
1982 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
1983 show_pwm_auto_point_channel,
1984 store_pwm_auto_point_channel, 0, 1),
1985 SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
1986 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1987 0, 0),
1988 SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
1989 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1990 1, 0),
1991 SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
1992 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1993 2, 0),
1994 SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
1995 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1996 3, 0),
1997 SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
1998 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1999 4, 0),
2000 SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
2001 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2002 0, 0),
2003 SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
2004 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2005 1, 0),
2006 SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
2007 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2008 2, 0),
2009 SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
2010 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2011 3, 0),
2012 SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
2013 show_pwm_auto_point_temp_hyst,
2014 store_pwm_auto_point_temp_hyst,
2015 0, 0),
2016 SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
2017 show_pwm_auto_point_temp_hyst, NULL, 1, 0),
2018 SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
2019 show_pwm_auto_point_temp_hyst, NULL, 2, 0),
2020 SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
2021 show_pwm_auto_point_temp_hyst, NULL, 3, 0),
2022}, {
2023 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
2024 show_pwm_auto_point_channel,
2025 store_pwm_auto_point_channel, 0, 2),
2026 SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
2027 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2028 0, 1),
2029 SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
2030 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2031 1, 1),
2032 SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
2033 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2034 2, 1),
2035 SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
2036 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2037 3, 1),
2038 SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
2039 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
2040 4, 1),
2041 SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
2042 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2043 0, 1),
2044 SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
2045 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2046 1, 1),
2047 SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
2048 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2049 2, 1),
2050 SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
2051 show_pwm_auto_point_temp, store_pwm_auto_point_temp,
2052 3, 1),
2053 SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
2054 show_pwm_auto_point_temp_hyst,
2055 store_pwm_auto_point_temp_hyst,
2056 0, 1),
2057 SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
2058 show_pwm_auto_point_temp_hyst, NULL, 1, 1),
2059 SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
2060 show_pwm_auto_point_temp_hyst, NULL, 2, 1),
2061 SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
2062 show_pwm_auto_point_temp_hyst, NULL, 3, 1),
2063} };
2064
2065/* Super I/O functions */
2066static inline int superio_inb(int base, int reg)
2067{
2068 outb(reg, base);
2069 return inb(base + 1);
2070}
2071
2072static int superio_inw(int base, int reg)
2073{
2074 int val;
2075 val = superio_inb(base, reg) << 8;
2076 val |= superio_inb(base, reg + 1);
2077 return val;
2078}
2079
2080static inline int superio_enter(int base)
2081{
2082 /* Don't step on other drivers' I/O space by accident */
2083 if (!request_muxed_region(base, 2, DRVNAME)) {
2084 pr_err("I/O address 0x%04x already in use\n", base);
2085 return -EBUSY;
2086 }
2087
2088 /* according to the datasheet the key must be send twice! */
2089 outb(SIO_UNLOCK_KEY, base);
2090 outb(SIO_UNLOCK_KEY, base);
2091
2092 return 0;
2093}
2094
2095static inline void superio_select(int base, int ld)
2096{
2097 outb(SIO_REG_LDSEL, base);
2098 outb(ld, base + 1);
2099}
2100
2101static inline void superio_exit(int base)
2102{
2103 outb(SIO_LOCK_KEY, base);
2104 release_region(base, 2);
2105}
2106
2107static int f71882fg_create_sysfs_files(struct platform_device *pdev,
2108 struct sensor_device_attribute_2 *attr, int count)
2109{
2110 int err, i;
2111
2112 for (i = 0; i < count; i++) {
2113 err = device_create_file(&pdev->dev, &attr[i].dev_attr);
2114 if (err)
2115 return err;
2116 }
2117 return 0;
2118}
2119
2120static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
2121 struct sensor_device_attribute_2 *attr, int count)
2122{
2123 int i;
2124
2125 for (i = 0; i < count; i++)
2126 device_remove_file(&pdev->dev, &attr[i].dev_attr);
2127}
2128
2129static int f71882fg_create_fan_sysfs_files(
2130 struct platform_device *pdev, int idx)
2131{
2132 struct f71882fg_data *data = platform_get_drvdata(pdev);
2133 int err;
2134
2135 /* Sanity check the pwm setting */
2136 err = 0;
2137 switch (data->type) {
2138 case f71858fg:
2139 if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
2140 err = 1;
2141 break;
2142 case f71862fg:
2143 if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
2144 err = 1;
2145 break;
2146 case f8000:
2147 if (idx == 2)
2148 err = data->pwm_enable & 0x20;
2149 break;
2150 default:
2151 break;
2152 }
2153 if (err) {
2154 dev_err(&pdev->dev,
2155 "Invalid (reserved) pwm settings: 0x%02x, "
2156 "skipping fan %d\n",
2157 (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
2158 return 0; /* This is a non fatal condition */
2159 }
2160
2161 err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
2162 ARRAY_SIZE(fxxxx_fan_attr[0]));
2163 if (err)
2164 return err;
2165
2166 if (f71882fg_fan_has_beep[data->type]) {
2167 err = f71882fg_create_sysfs_files(pdev,
2168 &fxxxx_fan_beep_attr[idx],
2169 1);
2170 if (err)
2171 return err;
2172 }
2173
2174 dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
2175 (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
2176
2177 /* Check for unsupported auto pwm settings */
2178 switch (data->type) {
2179 case f71808e:
2180 case f71808a:
2181 case f71869:
2182 case f71869a:
2183 case f71889fg:
2184 case f71889ed:
2185 case f71889a:
2186 data->pwm_auto_point_mapping[idx] =
2187 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
2188 if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
2189 (data->pwm_auto_point_mapping[idx] & 3) == 0) {
2190 dev_warn(&pdev->dev,
2191 "Auto pwm controlled by raw digital "
2192 "data, disabling pwm auto_point "
2193 "sysfs attributes for fan %d\n", idx + 1);
2194 return 0; /* This is a non fatal condition */
2195 }
2196 break;
2197 default:
2198 break;
2199 }
2200
2201 switch (data->type) {
2202 case f71862fg:
2203 err = f71882fg_create_sysfs_files(pdev,
2204 &f71862fg_auto_pwm_attr[idx][0],
2205 ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
2206 break;
2207 case f71808e:
2208 case f71869:
2209 err = f71882fg_create_sysfs_files(pdev,
2210 &f71869_auto_pwm_attr[idx][0],
2211 ARRAY_SIZE(f71869_auto_pwm_attr[0]));
2212 break;
2213 case f8000:
2214 err = f71882fg_create_sysfs_files(pdev,
2215 &f8000_auto_pwm_attr[idx][0],
2216 ARRAY_SIZE(f8000_auto_pwm_attr[0]));
2217 break;
2218 default:
2219 err = f71882fg_create_sysfs_files(pdev,
2220 &fxxxx_auto_pwm_attr[idx][0],
2221 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
2222 }
2223
2224 return err;
2225}
2226
2227static void f71882fg_remove(struct platform_device *pdev)
2228{
2229 struct f71882fg_data *data = platform_get_drvdata(pdev);
2230 int nr_fans = f71882fg_nr_fans[data->type];
2231 int nr_temps = f71882fg_nr_temps[data->type];
2232 int i;
2233 u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
2234
2235 if (data->hwmon_dev)
2236 hwmon_device_unregister(data->hwmon_dev);
2237
2238 device_remove_file(&pdev->dev, &dev_attr_name);
2239
2240 if (start_reg & 0x01) {
2241 switch (data->type) {
2242 case f71858fg:
2243 if (data->temp_config & 0x10)
2244 f71882fg_remove_sysfs_files(pdev,
2245 f8000_temp_attr,
2246 ARRAY_SIZE(f8000_temp_attr));
2247 else
2248 f71882fg_remove_sysfs_files(pdev,
2249 f71858fg_temp_attr,
2250 ARRAY_SIZE(f71858fg_temp_attr));
2251 break;
2252 case f8000:
2253 f71882fg_remove_sysfs_files(pdev,
2254 f8000_temp_attr,
2255 ARRAY_SIZE(f8000_temp_attr));
2256 break;
2257 case f81866a:
2258 f71882fg_remove_sysfs_files(pdev,
2259 f71858fg_temp_attr,
2260 ARRAY_SIZE(f71858fg_temp_attr));
2261 break;
2262 default:
2263 f71882fg_remove_sysfs_files(pdev,
2264 &fxxxx_temp_attr[0][0],
2265 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
2266 }
2267 if (f71882fg_temp_has_beep[data->type]) {
2268 if (data->type == f81866a)
2269 f71882fg_remove_sysfs_files(pdev,
2270 &f81866_temp_beep_attr[0][0],
2271 ARRAY_SIZE(f81866_temp_beep_attr[0])
2272 * nr_temps);
2273 else
2274 f71882fg_remove_sysfs_files(pdev,
2275 &fxxxx_temp_beep_attr[0][0],
2276 ARRAY_SIZE(fxxxx_temp_beep_attr[0])
2277 * nr_temps);
2278 }
2279
2280 for (i = 0; i < F71882FG_MAX_INS; i++) {
2281 if (f71882fg_has_in[data->type][i]) {
2282 device_remove_file(&pdev->dev,
2283 &fxxxx_in_attr[i].dev_attr);
2284 }
2285 }
2286 if (f71882fg_has_in1_alarm[data->type]) {
2287 f71882fg_remove_sysfs_files(pdev,
2288 fxxxx_in1_alarm_attr,
2289 ARRAY_SIZE(fxxxx_in1_alarm_attr));
2290 }
2291 }
2292
2293 if (start_reg & 0x02) {
2294 f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
2295 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
2296
2297 if (f71882fg_fan_has_beep[data->type]) {
2298 f71882fg_remove_sysfs_files(pdev,
2299 fxxxx_fan_beep_attr, nr_fans);
2300 }
2301
2302 switch (data->type) {
2303 case f71808a:
2304 f71882fg_remove_sysfs_files(pdev,
2305 &fxxxx_auto_pwm_attr[0][0],
2306 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2307 f71882fg_remove_sysfs_files(pdev,
2308 f71808a_fan3_attr,
2309 ARRAY_SIZE(f71808a_fan3_attr));
2310 break;
2311 case f71862fg:
2312 f71882fg_remove_sysfs_files(pdev,
2313 &f71862fg_auto_pwm_attr[0][0],
2314 ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
2315 nr_fans);
2316 break;
2317 case f71808e:
2318 case f71869:
2319 f71882fg_remove_sysfs_files(pdev,
2320 &f71869_auto_pwm_attr[0][0],
2321 ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
2322 break;
2323 case f8000:
2324 f71882fg_remove_sysfs_files(pdev,
2325 f8000_fan_attr,
2326 ARRAY_SIZE(f8000_fan_attr));
2327 f71882fg_remove_sysfs_files(pdev,
2328 &f8000_auto_pwm_attr[0][0],
2329 ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
2330 break;
2331 default:
2332 f71882fg_remove_sysfs_files(pdev,
2333 &fxxxx_auto_pwm_attr[0][0],
2334 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2335 }
2336 }
2337}
2338
2339static int f71882fg_probe(struct platform_device *pdev)
2340{
2341 struct f71882fg_data *data;
2342 struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2343 int nr_fans = f71882fg_nr_fans[sio_data->type];
2344 int nr_temps = f71882fg_nr_temps[sio_data->type];
2345 int err, i;
2346 int size;
2347 u8 start_reg, reg;
2348
2349 data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
2350 GFP_KERNEL);
2351 if (!data)
2352 return -ENOMEM;
2353
2354 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
2355 data->type = sio_data->type;
2356 data->temp_start =
2357 (data->type == f71858fg || data->type == f8000 ||
2358 data->type == f81866a) ? 0 : 1;
2359 mutex_init(&data->update_lock);
2360 platform_set_drvdata(pdev, data);
2361
2362 start_reg = f71882fg_read8(data, F71882FG_REG_START);
2363 if (start_reg & 0x04) {
2364 dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
2365 return -ENODEV;
2366 }
2367 if (!(start_reg & 0x03)) {
2368 dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
2369 return -ENODEV;
2370 }
2371
2372 /* Register sysfs interface files */
2373 err = device_create_file(&pdev->dev, &dev_attr_name);
2374 if (err)
2375 goto exit_unregister_sysfs;
2376
2377 if (start_reg & 0x01) {
2378 switch (data->type) {
2379 case f71858fg:
2380 data->temp_config =
2381 f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
2382 if (data->temp_config & 0x10)
2383 /*
2384 * The f71858fg temperature alarms behave as
2385 * the f8000 alarms in this mode
2386 */
2387 err = f71882fg_create_sysfs_files(pdev,
2388 f8000_temp_attr,
2389 ARRAY_SIZE(f8000_temp_attr));
2390 else
2391 err = f71882fg_create_sysfs_files(pdev,
2392 f71858fg_temp_attr,
2393 ARRAY_SIZE(f71858fg_temp_attr));
2394 break;
2395 case f8000:
2396 err = f71882fg_create_sysfs_files(pdev,
2397 f8000_temp_attr,
2398 ARRAY_SIZE(f8000_temp_attr));
2399 break;
2400 case f81866a:
2401 err = f71882fg_create_sysfs_files(pdev,
2402 f71858fg_temp_attr,
2403 ARRAY_SIZE(f71858fg_temp_attr));
2404 break;
2405 default:
2406 err = f71882fg_create_sysfs_files(pdev,
2407 &fxxxx_temp_attr[0][0],
2408 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
2409 }
2410 if (err)
2411 goto exit_unregister_sysfs;
2412
2413 if (f71882fg_temp_has_beep[data->type]) {
2414 if (data->type == f81866a) {
2415 size = ARRAY_SIZE(f81866_temp_beep_attr[0]);
2416 err = f71882fg_create_sysfs_files(pdev,
2417 &f81866_temp_beep_attr[0][0],
2418 size * nr_temps);
2419
2420 } else {
2421 size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]);
2422 err = f71882fg_create_sysfs_files(pdev,
2423 &fxxxx_temp_beep_attr[0][0],
2424 size * nr_temps);
2425 }
2426 if (err)
2427 goto exit_unregister_sysfs;
2428 }
2429
2430 for (i = 0; i < F71882FG_MAX_INS; i++) {
2431 if (f71882fg_has_in[data->type][i]) {
2432 err = device_create_file(&pdev->dev,
2433 &fxxxx_in_attr[i].dev_attr);
2434 if (err)
2435 goto exit_unregister_sysfs;
2436 }
2437 }
2438 if (f71882fg_has_in1_alarm[data->type]) {
2439 err = f71882fg_create_sysfs_files(pdev,
2440 fxxxx_in1_alarm_attr,
2441 ARRAY_SIZE(fxxxx_in1_alarm_attr));
2442 if (err)
2443 goto exit_unregister_sysfs;
2444 }
2445 }
2446
2447 if (start_reg & 0x02) {
2448 switch (data->type) {
2449 case f71808e:
2450 case f71808a:
2451 case f71869:
2452 case f71869a:
2453 /* These always have signed auto point temps */
2454 data->auto_point_temp_signed = 1;
2455 fallthrough; /* to select correct fan/pwm reg bank! */
2456 case f71889fg:
2457 case f71889ed:
2458 case f71889a:
2459 reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
2460 if (reg & F71882FG_FAN_NEG_TEMP_EN)
2461 data->auto_point_temp_signed = 1;
2462 /* Ensure banked pwm registers point to right bank */
2463 reg &= ~F71882FG_FAN_PROG_SEL;
2464 f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
2465 break;
2466 default:
2467 break;
2468 }
2469
2470 data->pwm_enable =
2471 f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
2472
2473 for (i = 0; i < nr_fans; i++) {
2474 err = f71882fg_create_fan_sysfs_files(pdev, i);
2475 if (err)
2476 goto exit_unregister_sysfs;
2477 }
2478
2479 /* Some types have 1 extra fan with limited functionality */
2480 switch (data->type) {
2481 case f71808a:
2482 err = f71882fg_create_sysfs_files(pdev,
2483 f71808a_fan3_attr,
2484 ARRAY_SIZE(f71808a_fan3_attr));
2485 break;
2486 case f8000:
2487 err = f71882fg_create_sysfs_files(pdev,
2488 f8000_fan_attr,
2489 ARRAY_SIZE(f8000_fan_attr));
2490 break;
2491 default:
2492 break;
2493 }
2494 if (err)
2495 goto exit_unregister_sysfs;
2496 }
2497
2498 data->hwmon_dev = hwmon_device_register(&pdev->dev);
2499 if (IS_ERR(data->hwmon_dev)) {
2500 err = PTR_ERR(data->hwmon_dev);
2501 data->hwmon_dev = NULL;
2502 goto exit_unregister_sysfs;
2503 }
2504
2505 return 0;
2506
2507exit_unregister_sysfs:
2508 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
2509 return err; /* f71882fg_remove() also frees our data */
2510}
2511
2512static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
2513{
2514 u16 devid;
2515 unsigned short address;
2516 int err = superio_enter(sioaddr);
2517 if (err)
2518 return err;
2519
2520 devid = superio_inw(sioaddr, SIO_REG_MANID);
2521 if (devid != SIO_FINTEK_ID) {
2522 pr_debug("Not a Fintek device\n");
2523 err = -ENODEV;
2524 goto exit;
2525 }
2526
2527 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
2528 switch (devid) {
2529 case SIO_F71808E_ID:
2530 sio_data->type = f71808e;
2531 break;
2532 case SIO_F71808A_ID:
2533 sio_data->type = f71808a;
2534 break;
2535 case SIO_F71858_ID:
2536 case SIO_F71858AD_ID:
2537 sio_data->type = f71858fg;
2538 break;
2539 case SIO_F71862_ID:
2540 sio_data->type = f71862fg;
2541 break;
2542 case SIO_F71868_ID:
2543 sio_data->type = f71868a;
2544 break;
2545 case SIO_F71869_ID:
2546 sio_data->type = f71869;
2547 break;
2548 case SIO_F71869A_ID:
2549 sio_data->type = f71869a;
2550 break;
2551 case SIO_F71882_ID:
2552 sio_data->type = f71882fg;
2553 break;
2554 case SIO_F71889_ID:
2555 sio_data->type = f71889fg;
2556 break;
2557 case SIO_F71889E_ID:
2558 sio_data->type = f71889ed;
2559 break;
2560 case SIO_F71889A_ID:
2561 sio_data->type = f71889a;
2562 break;
2563 case SIO_F8000_ID:
2564 sio_data->type = f8000;
2565 break;
2566 case SIO_F81768D_ID:
2567 sio_data->type = f81768d;
2568 break;
2569 case SIO_F81865_ID:
2570 sio_data->type = f81865f;
2571 break;
2572 case SIO_F81866_ID:
2573 case SIO_F81966_ID:
2574 case SIO_F81968_ID:
2575 sio_data->type = f81866a;
2576 break;
2577 default:
2578 pr_info("Unsupported Fintek device: %04x\n",
2579 (unsigned int)devid);
2580 err = -ENODEV;
2581 goto exit;
2582 }
2583
2584 if (sio_data->type == f71858fg)
2585 superio_select(sioaddr, SIO_F71858FG_LD_HWM);
2586 else
2587 superio_select(sioaddr, SIO_F71882FG_LD_HWM);
2588
2589 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
2590 pr_warn("Device not activated\n");
2591 err = -ENODEV;
2592 goto exit;
2593 }
2594
2595 address = superio_inw(sioaddr, SIO_REG_ADDR);
2596 if (address == 0) {
2597 pr_warn("Base address not set\n");
2598 err = -ENODEV;
2599 goto exit;
2600 }
2601 address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
2602
2603 err = address;
2604 pr_info("Found %s chip at %#x, revision %d, devid: %04x\n",
2605 f71882fg_names[sio_data->type], (unsigned int)address,
2606 (int)superio_inb(sioaddr, SIO_REG_DEVREV), devid);
2607exit:
2608 superio_exit(sioaddr);
2609 return err;
2610}
2611
2612static int __init f71882fg_device_add(int address,
2613 const struct f71882fg_sio_data *sio_data)
2614{
2615 struct resource res = {
2616 .start = address,
2617 .end = address + REGION_LENGTH - 1,
2618 .flags = IORESOURCE_IO,
2619 };
2620 int err;
2621
2622 f71882fg_pdev = platform_device_alloc(DRVNAME, address);
2623 if (!f71882fg_pdev)
2624 return -ENOMEM;
2625
2626 res.name = f71882fg_pdev->name;
2627 err = acpi_check_resource_conflict(&res);
2628 if (err)
2629 goto exit_device_put;
2630
2631 err = platform_device_add_resources(f71882fg_pdev, &res, 1);
2632 if (err) {
2633 pr_err("Device resource addition failed\n");
2634 goto exit_device_put;
2635 }
2636
2637 err = platform_device_add_data(f71882fg_pdev, sio_data,
2638 sizeof(struct f71882fg_sio_data));
2639 if (err) {
2640 pr_err("Platform data allocation failed\n");
2641 goto exit_device_put;
2642 }
2643
2644 err = platform_device_add(f71882fg_pdev);
2645 if (err) {
2646 pr_err("Device addition failed\n");
2647 goto exit_device_put;
2648 }
2649
2650 return 0;
2651
2652exit_device_put:
2653 platform_device_put(f71882fg_pdev);
2654
2655 return err;
2656}
2657
2658static struct platform_driver f71882fg_driver = {
2659 .driver = {
2660 .name = DRVNAME,
2661 },
2662 .probe = f71882fg_probe,
2663 .remove = f71882fg_remove,
2664};
2665
2666static int __init f71882fg_init(void)
2667{
2668 int err;
2669 int address;
2670 struct f71882fg_sio_data sio_data;
2671
2672 memset(&sio_data, 0, sizeof(sio_data));
2673
2674 address = f71882fg_find(0x2e, &sio_data);
2675 if (address < 0)
2676 address = f71882fg_find(0x4e, &sio_data);
2677 if (address < 0)
2678 return address;
2679
2680 err = platform_driver_register(&f71882fg_driver);
2681 if (err)
2682 return err;
2683
2684 err = f71882fg_device_add(address, &sio_data);
2685 if (err)
2686 goto exit_driver;
2687
2688 return 0;
2689
2690exit_driver:
2691 platform_driver_unregister(&f71882fg_driver);
2692 return err;
2693}
2694
2695static void __exit f71882fg_exit(void)
2696{
2697 platform_device_unregister(f71882fg_pdev);
2698 platform_driver_unregister(&f71882fg_driver);
2699}
2700
2701MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
2702MODULE_AUTHOR("Hans Edgington, Hans de Goede <[email protected]>");
2703MODULE_LICENSE("GPL");
2704
2705module_init(f71882fg_init);
2706module_exit(f71882fg_exit);