linux - drivers/i3c/master.c

4051 lines · 105.3 KiB

1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* Copyright (C) 2018 Cadence Design Systems Inc.
4	*
5	* Author: Boris Brezillon <[email protected]>
6	*/
7
8	#include <dt-bindings/i3c/i3c.h>
9	#include <linux/acpi.h>
10	#include <linux/atomic.h>
11	#include <linux/bitmap.h>
12	#include <linux/bug.h>
13	#include <linux/delay.h>
14	#include <linux/device.h>
15	#include <linux/dma-mapping.h>
16	#include <linux/err.h>
17	#include <linux/export.h>
18	#include <linux/i2c.h>
19	#include <linux/kernel.h>
20	#include <linux/list.h>
21	#include <linux/of.h>
22	#include <linux/of_device.h>
23	#include <linux/pm_runtime.h>
24	#include <linux/property.h>
25	#include <linux/slab.h>
26	#include <linux/spinlock.h>
27	#include <linux/workqueue.h>
28
29	#include "internals.h"
30
31	static DEFINE_IDR(i3c_bus_idr);
32	static DEFINE_MUTEX(i3c_core_lock);
33	static int __i3c_first_dynamic_bus_num;
34	static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
35
36	/**
37	* i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
38	* @bus: I3C bus to take the lock on
39	*
40	* This function takes the bus lock so that no other operations can occur on
41	* the bus. This is needed for all kind of bus maintenance operation, like
42	* - enabling/disabling slave events
43	* - re-triggering DAA
44	* - changing the dynamic address of a device
45	* - relinquishing mastership
46	* - ...
47	*
48	* The reason for this kind of locking is that we don't want drivers and core
49	* logic to rely on I3C device information that could be changed behind their
50	* back.
51	*/
52	static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
53	{
54	down_write(&bus->lock);
55	}
56
57	/**
58	* i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
59	* operation
60	* @bus: I3C bus to release the lock on
61	*
62	* Should be called when the bus maintenance operation is done. See
63	* i3c_bus_maintenance_lock() for more details on what these maintenance
64	* operations are.
65	*/
66	static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
67	{
68	up_write(&bus->lock);
69	}
70
71	/**
72	* i3c_bus_normaluse_lock - Lock the bus for a normal operation
73	* @bus: I3C bus to take the lock on
74	*
75	* This function takes the bus lock for any operation that is not a maintenance
76	* operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
77	* maintenance operations). Basically all communications with I3C devices are
78	* normal operations (HDR, SDR transfers or CCC commands that do not change bus
79	* state or I3C dynamic address).
80	*
81	* Note that this lock is not guaranteeing serialization of normal operations.
82	* In other words, transfer requests passed to the I3C master can be submitted
83	* in parallel and I3C master drivers have to use their own locking to make
84	* sure two different communications are not inter-mixed, or access to the
85	* output/input queue is not done while the engine is busy.
86	*/
87	void i3c_bus_normaluse_lock(struct i3c_bus *bus)
88	{
89	down_read(&bus->lock);
90	}
91
92	/**
93	* i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
94	* @bus: I3C bus to release the lock on
95	*
96	* Should be called when a normal operation is done. See
97	* i3c_bus_normaluse_lock() for more details on what these normal operations
98	* are.
99	*/
100	void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
101	{
102	up_read(&bus->lock);
103	}
104
105	static struct i3c_master_controller dev_to_i3cmaster(struct device dev)
106	{
107	return container_of(dev, struct i3c_master_controller, dev);
108	}
109
110	static int __must_check i3c_master_rpm_get(struct i3c_master_controller *master)
111	{
112	int ret = master->rpm_allowed ? pm_runtime_resume_and_get(master->dev.parent) : 0;
113
114	if (ret < 0) {
115	dev_err(master->dev.parent, "runtime resume failed, error %d\n", ret);
116	return ret;
117	}
118	return 0;
119	}
120
121	static void i3c_master_rpm_put(struct i3c_master_controller *master)
122	{
123	if (master->rpm_allowed)
124	pm_runtime_put_autosuspend(master->dev.parent);
125	}
126
127	int i3c_bus_rpm_get(struct i3c_bus *bus)
128	{
129	return i3c_master_rpm_get(i3c_bus_to_i3c_master(bus));
130	}
131
132	void i3c_bus_rpm_put(struct i3c_bus *bus)
133	{
134	i3c_master_rpm_put(i3c_bus_to_i3c_master(bus));
135	}
136
137	bool i3c_bus_rpm_ibi_allowed(struct i3c_bus *bus)
138	{
139	return i3c_bus_to_i3c_master(bus)->rpm_ibi_allowed;
140	}
141
142	static const struct device_type i3c_device_type;
143
144	static struct i3c_bus dev_to_i3cbus(struct device dev)
145	{
146	struct i3c_master_controller *master;
147
148	if (dev->type == &i3c_device_type)
149	return dev_to_i3cdev(dev)->bus;
150
151	master = dev_to_i3cmaster(dev);
152
153	return &master->bus;
154	}
155
156	static struct i3c_dev_desc dev_to_i3cdesc(struct device dev)
157	{
158	struct i3c_master_controller *master;
159
160	if (dev->type == &i3c_device_type)
161	return dev_to_i3cdev(dev)->desc;
162
163	master = dev_to_i3cmaster(dev);
164
165	return master->this;
166	}
167
168	static ssize_t bcr_show(struct device *dev,
169	struct device_attribute *da,
170	char *buf)
171	{
172	struct i3c_bus *bus = dev_to_i3cbus(dev);
173	struct i3c_dev_desc *desc;
174	ssize_t ret;
175
176	i3c_bus_normaluse_lock(bus);
177	desc = dev_to_i3cdesc(dev);
178	ret = sysfs_emit(buf, "0x%02x\n", desc->info.bcr);
179	i3c_bus_normaluse_unlock(bus);
180
181	return ret;
182	}
183	static DEVICE_ATTR_RO(bcr);
184
185	static ssize_t dcr_show(struct device *dev,
186	struct device_attribute *da,
187	char *buf)
188	{
189	struct i3c_bus *bus = dev_to_i3cbus(dev);
190	struct i3c_dev_desc *desc;
191	ssize_t ret;
192
193	i3c_bus_normaluse_lock(bus);
194	desc = dev_to_i3cdesc(dev);
195	ret = sysfs_emit(buf, "0x%02x\n", desc->info.dcr);
196	i3c_bus_normaluse_unlock(bus);
197
198	return ret;
199	}
200	static DEVICE_ATTR_RO(dcr);
201
202	static ssize_t pid_show(struct device *dev,
203	struct device_attribute *da,
204	char *buf)
205	{
206	struct i3c_bus *bus = dev_to_i3cbus(dev);
207	struct i3c_dev_desc *desc;
208	ssize_t ret;
209
210	i3c_bus_normaluse_lock(bus);
211	desc = dev_to_i3cdesc(dev);
212	ret = sysfs_emit(buf, "%llx\n", desc->info.pid);
213	i3c_bus_normaluse_unlock(bus);
214
215	return ret;
216	}
217	static DEVICE_ATTR_RO(pid);
218
219	static ssize_t dynamic_address_show(struct device *dev,
220	struct device_attribute *da,
221	char *buf)
222	{
223	struct i3c_bus *bus = dev_to_i3cbus(dev);
224	struct i3c_dev_desc *desc;
225	ssize_t ret;
226
227	i3c_bus_normaluse_lock(bus);
228	desc = dev_to_i3cdesc(dev);
229	ret = sysfs_emit(buf, "%02x\n", desc->info.dyn_addr);
230	i3c_bus_normaluse_unlock(bus);
231
232	return ret;
233	}
234	static DEVICE_ATTR_RO(dynamic_address);
235
236	static const char * const hdrcap_strings[] = {
237	"hdr-ddr", "hdr-tsp", "hdr-tsl",
238	};
239
240	static ssize_t hdrcap_show(struct device *dev,
241	struct device_attribute *da,
242	char *buf)
243	{
244	struct i3c_bus *bus = dev_to_i3cbus(dev);
245	struct i3c_dev_desc *desc;
246	ssize_t offset = 0, ret;
247	unsigned long caps;
248	int mode;
249
250	i3c_bus_normaluse_lock(bus);
251	desc = dev_to_i3cdesc(dev);
252	caps = desc->info.hdr_cap;
253	for_each_set_bit(mode, &caps, 8) {
254	if (mode >= ARRAY_SIZE(hdrcap_strings))
255	break;
256
257	if (!hdrcap_strings[mode])
258	continue;
259
260	ret = sysfs_emit_at(buf, offset, offset ? " %s" : "%s",
261	hdrcap_strings[mode]);
262	if (ret < 0)
263	goto out;
264
265	offset += ret;
266	}
267
268	ret = sysfs_emit_at(buf, offset, "\n");
269	if (ret < 0)
270	goto out;
271
272	ret = offset + ret;
273
274	out:
275	i3c_bus_normaluse_unlock(bus);
276
277	return ret;
278	}
279	static DEVICE_ATTR_RO(hdrcap);
280
281	static ssize_t modalias_show(struct device *dev,
282	struct device_attribute da, char buf)
283	{
284	struct i3c_device *i3c = dev_to_i3cdev(dev);
285	struct i3c_device_info devinfo;
286	u16 manuf, part, ext;
287
288	i3c_device_get_info(i3c, &devinfo);
289	manuf = I3C_PID_MANUF_ID(devinfo.pid);
290	part = I3C_PID_PART_ID(devinfo.pid);
291	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
292
293	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
294	return sysfs_emit(buf, "i3c:dcr%02Xmanuf%04X\n", devinfo.dcr,
295	manuf);
296
297	return sysfs_emit(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X\n",
298	devinfo.dcr, manuf, part, ext);
299	}
300	static DEVICE_ATTR_RO(modalias);
301
302	static struct attribute *i3c_device_attrs[] = {
303	&dev_attr_bcr.attr,
304	&dev_attr_dcr.attr,
305	&dev_attr_pid.attr,
306	&dev_attr_dynamic_address.attr,
307	&dev_attr_hdrcap.attr,
308	&dev_attr_modalias.attr,
309	NULL,
310	};
311	ATTRIBUTE_GROUPS(i3c_device);
312
313	static int i3c_device_uevent(const struct device dev, struct kobj_uevent_env env)
314	{
315	const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
316	struct i3c_device_info devinfo;
317	u16 manuf, part, ext;
318
319	i3c_device_get_info(i3cdev, &devinfo);
320	manuf = I3C_PID_MANUF_ID(devinfo.pid);
321	part = I3C_PID_PART_ID(devinfo.pid);
322	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
323
324	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
325	return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
326	devinfo.dcr, manuf);
327
328	return add_uevent_var(env,
329	"MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
330	devinfo.dcr, manuf, part, ext);
331	}
332
333	static const struct device_type i3c_device_type = {
334	.groups = i3c_device_groups,
335	.uevent = i3c_device_uevent,
336	};
337
338	static int i3c_device_match(struct device dev, const struct device_driver drv)
339	{
340	struct i3c_device *i3cdev;
341	const struct i3c_driver *i3cdrv;
342	u8 static_addr_method = 0;
343
344	if (dev->type != &i3c_device_type)
345	return 0;
346
347	i3cdev = dev_to_i3cdev(dev);
348	i3cdrv = drv_to_i3cdrv(drv);
349
350	i3c_bus_normaluse_lock(i3cdev->bus);
351	if (i3cdev->desc->boardinfo)
352	static_addr_method = i3cdev->desc->boardinfo->static_addr_method;
353	i3c_bus_normaluse_unlock(i3cdev->bus);
354
355	/*
356	* SETAASA-based devices need not always have a matching ID since
357	* it is not mandatory for such devices to implement deviceinfo
358	* CCC commands. Allow them to register through DT or ACPI.
359	*/
360	if (i3cdrv->id_table && i3c_device_match_id(i3cdev, i3cdrv->id_table))
361	return 1;
362
363	if (static_addr_method & I3C_ADDR_METHOD_SETAASA) {
364	if (of_driver_match_device(dev, drv))
365	return 1;
366	if (acpi_driver_match_device(dev, drv))
367	return 1;
368	}
369
370	return 0;
371	}
372
373	static int i3c_device_probe(struct device *dev)
374	{
375	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
376	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
377
378	return driver->probe(i3cdev);
379	}
380
381	static void i3c_device_remove(struct device *dev)
382	{
383	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
384	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
385
386	if (driver->remove)
387	driver->remove(i3cdev);
388	}
389
390	static enum i3c_addr_slot_status
391	i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask)
392	{
393	unsigned long status;
394	int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
395
396	if (addr > I2C_MAX_ADDR)
397	return I3C_ADDR_SLOT_RSVD;
398
399	status = bus->addrslots[bitpos / BITS_PER_LONG];
400	status >>= bitpos % BITS_PER_LONG;
401
402	return status & mask;
403	}
404
405	static enum i3c_addr_slot_status
406	i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
407	{
408	return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK);
409	}
410
411	static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr,
412	enum i3c_addr_slot_status status, u32 mask)
413	{
414	int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
415	unsigned long *ptr;
416
417	if (addr > I2C_MAX_ADDR)
418	return;
419
420	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
421	*ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG));
422	*ptr \|= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG);
423	}
424
425	static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
426	enum i3c_addr_slot_status status)
427	{
428	i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK);
429	}
430
431	static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
432	{
433	enum i3c_addr_slot_status status;
434
435	status = i3c_bus_get_addr_slot_status(bus, addr);
436
437	return status == I3C_ADDR_SLOT_FREE;
438	}
439
440	/*
441	* ┌────┬─────────────┬───┬─────────┬───┐
442	* │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐
443	* └────┴─────────────┴───┴─────────┴───┘ │
444	* ┌─────────────────────────────────────────┘
445	* │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐
446	* └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│
447	* └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘
448	* Some master controllers (such as HCI) need to prepare the entire above transaction before
449	* sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated
450	* before knowing the target device's UID information.
451	*
452	* However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is
453	* typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI
454	* priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is
455	* not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with
456	* the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise,
457	* if the "init_dyn_addr" is already in use by another I3C device, the target device will not be
458	* able to switch to its desired address.
459	*
460	* If the previous step fails, fallback returning one of the remaining unassigned address,
461	* regardless of its state in the desired list.
462	*/
463	static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
464	{
465	enum i3c_addr_slot_status status;
466	u8 addr;
467
468	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
469	status = i3c_bus_get_addr_slot_status_mask(bus, addr,
470	I3C_ADDR_SLOT_EXT_STATUS_MASK);
471	if (status == I3C_ADDR_SLOT_FREE)
472	return addr;
473	}
474
475	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
476	status = i3c_bus_get_addr_slot_status_mask(bus, addr,
477	I3C_ADDR_SLOT_STATUS_MASK);
478	if (status == I3C_ADDR_SLOT_FREE)
479	return addr;
480	}
481
482	return -ENOMEM;
483	}
484
485	static void i3c_bus_init_addrslots(struct i3c_bus *bus)
486	{
487	int i;
488
489	/* Addresses 0 to 7 are reserved. */
490	for (i = 0; i < 8; i++)
491	i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
492
493	/*
494	* Reserve broadcast address and all addresses that might collide
495	* with the broadcast address when facing a single bit error.
496	*/
497	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
498	I3C_ADDR_SLOT_RSVD);
499	for (i = 0; i < 7; i++)
500	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
501	I3C_ADDR_SLOT_RSVD);
502	}
503
504	static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
505	{
506	mutex_lock(&i3c_core_lock);
507	idr_remove(&i3c_bus_idr, i3cbus->id);
508	mutex_unlock(&i3c_core_lock);
509	}
510
511	static int i3c_bus_init(struct i3c_bus i3cbus, struct fwnode_handle fwnode)
512	{
513	int ret, start, end, id = -1;
514
515	init_rwsem(&i3cbus->lock);
516	INIT_LIST_HEAD(&i3cbus->devs.i2c);
517	INIT_LIST_HEAD(&i3cbus->devs.i3c);
518	i3c_bus_init_addrslots(i3cbus);
519	i3cbus->mode = I3C_BUS_MODE_PURE;
520
521	if (fwnode && is_of_node(fwnode))
522	id = of_alias_get_id(to_of_node(fwnode), "i3c");
523
524	mutex_lock(&i3c_core_lock);
525	if (id >= 0) {
526	start = id;
527	end = start + 1;
528	} else {
529	start = __i3c_first_dynamic_bus_num;
530	end = 0;
531	}
532
533	ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
534	mutex_unlock(&i3c_core_lock);
535
536	if (ret < 0)
537	return ret;
538
539	i3cbus->id = ret;
540
541	return 0;
542	}
543
544	void i3c_for_each_bus_locked(int (fn)(struct i3c_bus bus, void *data),
545	void *data)
546	{
547	struct i3c_bus *bus;
548	int id;
549
550	mutex_lock(&i3c_core_lock);
551	idr_for_each_entry(&i3c_bus_idr, bus, id)
552	fn(bus, data);
553	mutex_unlock(&i3c_core_lock);
554	}
555	EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
556
557	int i3c_register_notifier(struct notifier_block *nb)
558	{
559	return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
560	}
561	EXPORT_SYMBOL_GPL(i3c_register_notifier);
562
563	int i3c_unregister_notifier(struct notifier_block *nb)
564	{
565	return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
566	}
567	EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
568
569	static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
570	{
571	blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
572	}
573
574	static const char * const i3c_bus_mode_strings[] = {
575	[I3C_BUS_MODE_PURE] = "pure",
576	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
577	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
578	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
579	};
580
581	static ssize_t mode_show(struct device *dev,
582	struct device_attribute *da,
583	char *buf)
584	{
585	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
586	ssize_t ret;
587
588	i3c_bus_normaluse_lock(i3cbus);
589	if (i3cbus->mode < 0 \|\|
590	i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) \|\|
591	!i3c_bus_mode_strings[i3cbus->mode])
592	ret = sysfs_emit(buf, "unknown\n");
593	else
594	ret = sysfs_emit(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
595	i3c_bus_normaluse_unlock(i3cbus);
596
597	return ret;
598	}
599	static DEVICE_ATTR_RO(mode);
600
601	static ssize_t current_master_show(struct device *dev,
602	struct device_attribute *da,
603	char *buf)
604	{
605	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
606	ssize_t ret;
607
608	i3c_bus_normaluse_lock(i3cbus);
609	ret = sysfs_emit(buf, "%d-%llx\n", i3cbus->id,
610	i3cbus->cur_master->info.pid);
611	i3c_bus_normaluse_unlock(i3cbus);
612
613	return ret;
614	}
615	static DEVICE_ATTR_RO(current_master);
616
617	static ssize_t i3c_scl_frequency_show(struct device *dev,
618	struct device_attribute *da,
619	char *buf)
620	{
621	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
622	ssize_t ret;
623
624	i3c_bus_normaluse_lock(i3cbus);
625	ret = sysfs_emit(buf, "%ld\n", i3cbus->scl_rate.i3c);
626	i3c_bus_normaluse_unlock(i3cbus);
627
628	return ret;
629	}
630	static DEVICE_ATTR_RO(i3c_scl_frequency);
631
632	static ssize_t i2c_scl_frequency_show(struct device *dev,
633	struct device_attribute *da,
634	char *buf)
635	{
636	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
637	ssize_t ret;
638
639	i3c_bus_normaluse_lock(i3cbus);
640	ret = sysfs_emit(buf, "%ld\n", i3cbus->scl_rate.i2c);
641	i3c_bus_normaluse_unlock(i3cbus);
642
643	return ret;
644	}
645	static DEVICE_ATTR_RO(i2c_scl_frequency);
646
647	static void i3c_master_hj_work_fn(struct work_struct *work)
648	{
649	struct i3c_master_controller master = container_of(work, typeof(master), hj_work);
650
651	if (!master->shutting_down)
652	i3c_master_do_daa(master);
653	}
654
655	static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
656	{
657	int ret;
658
659	if (!master \|\| !master->ops)
660	return -EINVAL;
661
662	if (!master->ops->enable_hotjoin \|\| !master->ops->disable_hotjoin)
663	return -EINVAL;
664
665	if (enable \|\| master->rpm_ibi_allowed) {
666	ret = i3c_master_rpm_get(master);
667	if (ret)
668	return ret;
669	}
670
671	i3c_bus_maintenance_lock(&master->bus);
672
673	if (master->shutting_down)
674	ret = -ENODEV;
675	else if (enable)
676	ret = master->ops->enable_hotjoin(master);
677	else
678	ret = master->ops->disable_hotjoin(master);
679
680	if (!ret)
681	master->hotjoin = enable;
682
683	i3c_bus_maintenance_unlock(&master->bus);
684
685	if ((enable && ret) \|\| (!enable && !ret) \|\| master->rpm_ibi_allowed)
686	i3c_master_rpm_put(master);
687
688	return ret;
689	}
690
691	static ssize_t hotjoin_store(struct device dev, struct device_attribute attr,
692	const char *buf, size_t count)
693	{
694	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
695	int ret;
696	bool res;
697
698	if (!i3cbus->cur_master)
699	return -EINVAL;
700
701	if (kstrtobool(buf, &res))
702	return -EINVAL;
703
704	ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
705	if (ret)
706	return ret;
707
708	return count;
709	}
710
711	/*
712	* i3c_master_enable_hotjoin - Enable hotjoin
713	* @master: I3C master object
714	*
715	* Return: a 0 in case of success, an negative error code otherwise.
716	*/
717	int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
718	{
719	return i3c_set_hotjoin(master, true);
720	}
721	EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
722
723	/*
724	* i3c_master_disable_hotjoin - Disable hotjoin
725	* @master: I3C master object
726	*
727	* Return: a 0 in case of success, an negative error code otherwise.
728	*/
729	int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
730	{
731	return i3c_set_hotjoin(master, false);
732	}
733	EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
734
735	/**
736	* i3c_master_queue_hotjoin - Queue DAA processing after a Hot-Join event
737	* @master: I3C master object
738	*
739	* Queue the hot-join worker on the master's workqueue.
740	*/
741	void i3c_master_queue_hotjoin(struct i3c_master_controller *master)
742	{
743	queue_work(master->wq, &master->hj_work);
744	}
745	EXPORT_SYMBOL_GPL(i3c_master_queue_hotjoin);
746
747	static ssize_t hotjoin_show(struct device dev, struct device_attribute da, char *buf)
748	{
749	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
750	ssize_t ret;
751
752	i3c_bus_normaluse_lock(i3cbus);
753	ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
754	i3c_bus_normaluse_unlock(i3cbus);
755
756	return ret;
757	}
758
759	static DEVICE_ATTR_RW(hotjoin);
760
761	static ssize_t dev_nack_retry_count_show(struct device *dev,
762	struct device_attribute attr, char buf)
763	{
764	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
765	ssize_t ret;
766
767	i3c_bus_normaluse_lock(i3cbus);
768	ret = sysfs_emit(buf, "%u\n", dev_to_i3cmaster(dev)->dev_nack_retry_count);
769	i3c_bus_normaluse_unlock(i3cbus);
770
771	return ret;
772	}
773
774	static ssize_t dev_nack_retry_count_store(struct device *dev,
775	struct device_attribute *attr,
776	const char *buf, size_t count)
777	{
778	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
779	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
780	unsigned int val;
781	int ret;
782
783	ret = kstrtouint(buf, 0, &val);
784	if (ret)
785	return ret;
786
787	ret = i3c_master_rpm_get(master);
788	if (ret)
789	return ret;
790
791	i3c_bus_maintenance_lock(i3cbus);
792	ret = master->ops->set_dev_nack_retry(master, val);
793	if (!ret)
794	master->dev_nack_retry_count = val;
795	i3c_bus_maintenance_unlock(i3cbus);
796
797	i3c_master_rpm_put(master);
798
799	return ret ?: count;
800	}
801
802	static DEVICE_ATTR_RW(dev_nack_retry_count);
803
804	static ssize_t do_daa_store(struct device *dev,
805	struct device_attribute *attr,
806	const char *buf, size_t count)
807	{
808	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
809	bool val;
810	int ret;
811
812	if (kstrtobool(buf, &val))
813	return -EINVAL;
814
815	if (!val)
816	return -EINVAL;
817
818	if (!master->init_done)
819	return -EAGAIN;
820
821	ret = i3c_master_do_daa(master);
822	if (ret)
823	return ret;
824
825	return count;
826	}
827
828	static DEVICE_ATTR_WO(do_daa);
829
830	static struct attribute *i3c_masterdev_attrs[] = {
831	&dev_attr_mode.attr,
832	&dev_attr_current_master.attr,
833	&dev_attr_i3c_scl_frequency.attr,
834	&dev_attr_i2c_scl_frequency.attr,
835	&dev_attr_bcr.attr,
836	&dev_attr_dcr.attr,
837	&dev_attr_pid.attr,
838	&dev_attr_dynamic_address.attr,
839	&dev_attr_hdrcap.attr,
840	&dev_attr_hotjoin.attr,
841	&dev_attr_do_daa.attr,
842	NULL,
843	};
844	ATTRIBUTE_GROUPS(i3c_masterdev);
845
846	static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
847	{
848	kfree(dev);
849	}
850
851	static void i3c_masterdev_release(struct device *dev)
852	{
853	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
854	struct i3c_bus *bus = dev_to_i3cbus(dev);
855
856	if (master->wq)
857	destroy_workqueue(master->wq);
858
859	WARN_ON(!list_empty(&bus->devs.i2c) \|\| !list_empty(&bus->devs.i3c));
860	i3c_bus_cleanup(bus);
861
862	fwnode_handle_put(dev->fwnode);
863
864	i3c_master_free_i3c_dev(master->this);
865	}
866
867	static const struct device_type i3c_masterdev_type = {
868	.groups = i3c_masterdev_groups,
869	};
870
871	static void i3c_master_shutdown(struct i3c_master_controller *master)
872	{
873	i3c_bus_maintenance_lock(&master->bus);
874	master->shutting_down = true;
875	i3c_bus_maintenance_unlock(&master->bus);
876
877	cancel_work_sync(&master->hj_work);
878	cancel_work_sync(&master->reg_work);
879	}
880
881	static void i3c_device_shutdown(struct device *dev)
882	{
883	if (dev->type == &i3c_masterdev_type)
884	i3c_master_shutdown(dev_to_i3cmaster(dev));
885	}
886
887	const struct bus_type i3c_bus_type = {
888	.name = "i3c",
889	.match = i3c_device_match,
890	.probe = i3c_device_probe,
891	.remove = i3c_device_remove,
892	.shutdown = i3c_device_shutdown,
893	};
894	EXPORT_SYMBOL_GPL(i3c_bus_type);
895
896	static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
897	unsigned long max_i2c_scl_rate)
898	{
899	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
900
901	i3cbus->mode = mode;
902
903	switch (i3cbus->mode) {
904	case I3C_BUS_MODE_PURE:
905	if (!i3cbus->scl_rate.i3c)
906	i3cbus->scl_rate.i3c = I3C_BUS_I3C_SCL_TYP_RATE;
907	break;
908	case I3C_BUS_MODE_MIXED_FAST:
909	case I3C_BUS_MODE_MIXED_LIMITED:
910	if (!i3cbus->scl_rate.i3c)
911	i3cbus->scl_rate.i3c = I3C_BUS_I3C_SCL_TYP_RATE;
912	if (!i3cbus->scl_rate.i2c)
913	i3cbus->scl_rate.i2c = max_i2c_scl_rate;
914	break;
915	case I3C_BUS_MODE_MIXED_SLOW:
916	if (!i3cbus->scl_rate.i2c)
917	i3cbus->scl_rate.i2c = max_i2c_scl_rate;
918	if (!i3cbus->scl_rate.i3c \|\|
919	i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
920	i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
921	break;
922	default:
923	return -EINVAL;
924	}
925
926	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
927	i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
928
929	/*
930	* I3C/I2C frequency may have been overridden, check that user-provided
931	* values are not exceeding max possible frequency.
932	*/
933	if (i3cbus->scl_rate.i3c > I3C_BUS_I3C_SCL_MAX_RATE \|\|
934	i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE)
935	return -EINVAL;
936
937	return 0;
938	}
939
940	static struct i3c_master_controller *
941	i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
942	{
943	return container_of(adap, struct i3c_master_controller, i2c);
944	}
945
946	static struct i2c_adapter *
947	i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
948	{
949	return &master->i2c;
950	}
951
952	static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
953	{
954	kfree(dev);
955	}
956
957	static struct i2c_dev_desc *
958	i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
959	u16 addr, u8 lvr)
960	{
961	struct i2c_dev_desc *dev;
962
963	dev = kzalloc_obj(*dev);
964	if (!dev)
965	return ERR_PTR(-ENOMEM);
966
967	dev->common.master = master;
968	dev->addr = addr;
969	dev->lvr = lvr;
970
971	return dev;
972	}
973
974	static void i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest dest, u8 addr,
975	u16 payloadlen)
976	{
977	dest->addr = addr;
978	dest->payload.len = payloadlen;
979	dest->payload.actual_len = 0;
980	dest->payload.optional_bytes = 0;
981	if (payloadlen)
982	dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
983	else
984	dest->payload.data = NULL;
985
986	return dest->payload.data;
987	}
988
989	static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
990	{
991	kfree(dest->payload.data);
992	}
993
994	static void i3c_ccc_cmd_init_retries(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
995	struct i3c_ccc_cmd_dest *dests,
996	unsigned int ndests, unsigned int retries)
997	{
998	cmd->rnw = rnw ? 1 : 0;
999	cmd->id = id;
1000	cmd->dests = dests;
1001	cmd->ndests = ndests;
1002	cmd->retries = retries;
1003	cmd->err = I3C_ERROR_UNKNOWN;
1004	}
1005
1006	static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
1007	struct i3c_ccc_cmd_dest *dests,
1008	unsigned int ndests)
1009	{
1010	i3c_ccc_cmd_init_retries(cmd, rnw, id, dests, ndests,
1011	rnw ? I3C_CCC_RETRIES : 0);
1012	}
1013
1014	static int i3c_ccc_validate_payload_len(struct i3c_ccc_cmd *cmd)
1015	{
1016	unsigned int i;
1017
1018	if (!cmd->rnw)
1019	return 0;
1020
1021	for (i = 0; i < cmd->ndests; i++) {
1022	struct i3c_ccc_cmd_payload *p = &cmd->dests[i].payload;
1023	u16 min_len;
1024
1025	if (p->optional_bytes > p->len)
1026	return -EINVAL;
1027
1028	if (p->actual_len > p->len)
1029	return -EIO;
1030
1031	if (!p->len)
1032	continue;
1033
1034	min_len = p->len - p->optional_bytes;
1035	if (p->actual_len < min_len)
1036	return -EIO;
1037	}
1038
1039	return 0;
1040	}
1041
1042	/**
1043	* i3c_master_send_ccc_cmd_locked() - send a CCC (Common Command Codes)
1044	* @master: master used to send frames on the bus
1045	* @cmd: command to send
1046	*
1047	* Return: 0 in case of success, or a negative error code otherwise.
1048	* I3C Mx error codes are stored in cmd->err.
1049	*/
1050	static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
1051	struct i3c_ccc_cmd *cmd)
1052	{
1053	unsigned int attempt, max_attempts;
1054	int ret;
1055
1056	if (!cmd \|\| !master)
1057	return -EINVAL;
1058
1059	if (WARN_ON(master->init_done &&
1060	!rwsem_is_locked(&master->bus.lock)))
1061	return -EINVAL;
1062
1063	if (!master->ops->send_ccc_cmd)
1064	return -EOPNOTSUPP;
1065
1066	if ((cmd->rnw \|\| (cmd->id & I3C_CCC_DIRECT)) &&
1067	(!cmd->dests \|\| !cmd->ndests))
1068	return -EINVAL;
1069
1070	if (master->ops->supports_ccc_cmd &&
1071	!master->ops->supports_ccc_cmd(master, cmd))
1072	return -EOPNOTSUPP;
1073
1074	max_attempts = cmd->retries + 1;
1075	ret = -EIO;
1076	for (attempt = 0; attempt < max_attempts; attempt++) {
1077	unsigned int i;
1078
1079	if (cmd->rnw)
1080	for (i = 0; i < cmd->ndests; i++)
1081	cmd->dests[i].payload.actual_len = 0;
1082
1083	cmd->err = I3C_ERROR_UNKNOWN;
1084	ret = master->ops->send_ccc_cmd(master, cmd);
1085	if (!ret && cmd->err == I3C_ERROR_UNKNOWN)
1086	break;
1087	}
1088
1089	if (!ret)
1090	ret = i3c_ccc_validate_payload_len(cmd);
1091
1092	return ret;
1093	}
1094
1095	static struct i2c_dev_desc *
1096	i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
1097	u16 addr)
1098	{
1099	struct i2c_dev_desc *dev;
1100
1101	i3c_bus_for_each_i2cdev(&master->bus, dev) {
1102	if (dev->addr == addr)
1103	return dev;
1104	}
1105
1106	return NULL;
1107	}
1108
1109	/**
1110	* i3c_master_get_free_addr() - get a free address on the bus
1111	* @master: I3C master object
1112	* @start_addr: where to start searching
1113	*
1114	* This function must be called with the bus lock held in write mode.
1115	*
1116	* Return: the first free address starting at @start_addr (included) or -ENOMEM
1117	* if there's no more address available.
1118	*/
1119	int i3c_master_get_free_addr(struct i3c_master_controller *master,
1120	u8 start_addr)
1121	{
1122	return i3c_bus_get_free_addr(&master->bus, start_addr);
1123	}
1124	EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
1125
1126	static void i3c_device_release(struct device *dev)
1127	{
1128	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
1129
1130	WARN_ON(i3cdev->desc);
1131
1132	fwnode_handle_put(dev->fwnode);
1133	kfree(i3cdev);
1134	}
1135
1136	static struct i3c_dev_desc *
1137	i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
1138	const struct i3c_device_info *info)
1139	{
1140	struct i3c_dev_desc *dev;
1141
1142	dev = kzalloc_obj(*dev);
1143	if (!dev)
1144	return ERR_PTR(-ENOMEM);
1145
1146	dev->common.master = master;
1147	dev->info = *info;
1148	mutex_init(&dev->ibi_lock);
1149
1150	return dev;
1151	}
1152
1153	static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
1154	u8 addr)
1155	{
1156	enum i3c_addr_slot_status addrstat;
1157	struct i3c_ccc_cmd_dest dest;
1158	struct i3c_ccc_cmd cmd;
1159	int ret;
1160
1161	if (!master)
1162	return -EINVAL;
1163
1164	addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
1165	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
1166	return -EINVAL;
1167
1168	i3c_ccc_cmd_dest_init(&dest, addr, 0);
1169	i3c_ccc_cmd_init(&cmd, false,
1170	I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
1171	&dest, 1);
1172	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1173	i3c_ccc_cmd_dest_cleanup(&dest);
1174
1175	/* No active devices on the bus. */
1176	if (ret && cmd.err == I3C_ERROR_M2)
1177	ret = 0;
1178
1179	return ret;
1180	}
1181
1182	/**
1183	* i3c_master_setaasa_locked() - start a SETAASA procedure (Set All Addresses to Static Address)
1184	* @master: I3C master object
1185	*
1186	* Send a SETAASA CCC command to set all attached I3C devices' dynamic addresses to
1187	* their static address.
1188	*
1189	* This function must be called with the bus lock held in write mode.
1190	*
1191	* First, the SETHID CCC command is sent, followed by the SETAASA CCC.
1192	*
1193	* Return: 0 in case of success, a positive I3C error code if the error is
1194	* one of the official Mx error codes, and a negative error code otherwise.
1195	*/
1196	static int i3c_master_setaasa_locked(struct i3c_master_controller *master)
1197	{
1198	struct i3c_ccc_cmd_dest dest;
1199	struct i3c_ccc_cmd cmd;
1200	int ret;
1201
1202	/*
1203	* Send SETHID CCC command. Though it is a standard CCC command specified
1204	* in JESD300-5, we are not defining a separate macro to be explicit that
1205	* the value falls under the vendor specific range.
1206	*/
1207	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
1208	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_VENDOR(0, true), &dest, 1);
1209	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1210	i3c_ccc_cmd_dest_cleanup(&dest);
1211	if (ret && cmd.err == I3C_ERROR_M2)
1212	ret = 0;
1213	if (ret)
1214	return ret;
1215
1216	/* Send SETAASA CCC command */
1217	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
1218	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_SETAASA, &dest, 1);
1219	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1220	i3c_ccc_cmd_dest_cleanup(&dest);
1221	if (ret && cmd.err == I3C_ERROR_M2)
1222	ret = 0;
1223
1224	return ret;
1225	}
1226
1227	/**
1228	* i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
1229	* procedure
1230	* @master: master used to send frames on the bus
1231	*
1232	* Send a ENTDAA CCC command to start a DAA procedure.
1233	*
1234	* Note that this function only sends the ENTDAA CCC command, all the logic
1235	* behind dynamic address assignment has to be handled in the I3C master
1236	* driver.
1237	*
1238	* This function must be called with the bus lock held in write mode.
1239	*
1240	* Return: 0 in case of success, or a negative error code otherwise.
1241	*/
1242	int i3c_master_entdaa_locked(struct i3c_master_controller *master)
1243	{
1244	struct i3c_ccc_cmd_dest dest;
1245	struct i3c_ccc_cmd cmd;
1246	int ret;
1247
1248	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
1249	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
1250	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1251	i3c_ccc_cmd_dest_cleanup(&dest);
1252
1253	/* No active devices need an address. */
1254	if (ret && cmd.err == I3C_ERROR_M2)
1255	ret = 0;
1256
1257	return ret;
1258	}
1259	EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
1260
1261	/**
1262	* i3c_master_enec_disec_locked() - send an ENEC or DISEC CCC command
1263	* @master: master used to send frames on the bus
1264	* @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1265	* @enable: true to send ENEC, false to send DISEC
1266	* @evts: events to enable or disable
1267	* @suppress_m2: if true, treat an M2 (NACK) error from the CCC as success
1268	*
1269	* Send an ENEC or DISEC CCC command to enable or disable some or all events
1270	* coming from a specific slave, or all devices if @addr is
1271	* %I3C_BROADCAST_ADDR.
1272	*
1273	* When @suppress_m2 is true, a NACK of the broadcast (which can happen when
1274	* no devices are present on the bus) is not reported as an error. This is
1275	* useful for callers that want to configure event reporting unconditionally,
1276	* regardless of whether any devices are currently on the bus.
1277	*
1278	* This function must be called with the bus lock held in write mode.
1279	*
1280	* Return: 0 in case of success, or a negative error code otherwise.
1281	*/
1282	int i3c_master_enec_disec_locked(struct i3c_master_controller *master, u8 addr,
1283	bool enable, u8 evts, bool suppress_m2)
1284	{
1285	struct i3c_ccc_events *events;
1286	struct i3c_ccc_cmd_dest dest;
1287	struct i3c_ccc_cmd cmd;
1288	int ret;
1289
1290	events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
1291	if (!events)
1292	return -ENOMEM;
1293
1294	events->events = evts;
1295	i3c_ccc_cmd_init(&cmd, false,
1296	enable ?
1297	I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
1298	I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
1299	&dest, 1);
1300	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1301	i3c_ccc_cmd_dest_cleanup(&dest);
1302
1303	if (suppress_m2 && ret && cmd.err == I3C_ERROR_M2)
1304	ret = 0;
1305
1306	return ret;
1307	}
1308	EXPORT_SYMBOL_GPL(i3c_master_enec_disec_locked);
1309
1310	/**
1311	* i3c_master_disec_locked() - send a DISEC CCC command
1312	* @master: master used to send frames on the bus
1313	* @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1314	* @evts: events to disable
1315	*
1316	* Send a DISEC CCC command to disable some or all events coming from a
1317	* specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1318	*
1319	* This function must be called with the bus lock held in write mode.
1320	*
1321	* Return: 0 in case of success, or a negative error code otherwise.
1322	*/
1323	int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
1324	u8 evts)
1325	{
1326	return i3c_master_enec_disec_locked(master, addr, false, evts, false);
1327	}
1328	EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
1329
1330	/**
1331	* i3c_master_enec_locked() - send an ENEC CCC command
1332	* @master: master used to send frames on the bus
1333	* @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1334	* @evts: events to disable
1335	*
1336	* Sends an ENEC CCC command to enable some or all events coming from a
1337	* specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1338	*
1339	* This function must be called with the bus lock held in write mode.
1340	*
1341	* Return: 0 in case of success, or a negative error code otherwise.
1342	*/
1343	int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
1344	u8 evts)
1345	{
1346	return i3c_master_enec_disec_locked(master, addr, true, evts, false);
1347	}
1348	EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
1349
1350	/**
1351	* i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1352	* @master: master used to send frames on the bus
1353	*
1354	* Send a DEFSLVS CCC command containing all the devices known to the @master.
1355	* This is useful when you have secondary masters on the bus to propagate
1356	* device information.
1357	*
1358	* This should be called after all I3C devices have been discovered (in other
1359	* words, after the DAA procedure has finished) and instantiated in
1360	* &i3c_master_controller_ops->bus_init().
1361	* It should also be called if a master ACKed an Hot-Join request and assigned
1362	* a dynamic address to the device joining the bus.
1363	*
1364	* This function must be called with the bus lock held in write mode.
1365	*
1366	* Return: 0 in case of success, or a negative error code otherwise.
1367	*/
1368	int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1369	{
1370	struct i3c_ccc_defslvs *defslvs;
1371	struct i3c_ccc_dev_desc *desc;
1372	struct i3c_ccc_cmd_dest dest;
1373	struct i3c_dev_desc *i3cdev;
1374	struct i2c_dev_desc *i2cdev;
1375	struct i3c_ccc_cmd cmd;
1376	struct i3c_bus *bus;
1377	bool send = false;
1378	int ndevs = 0, ret;
1379
1380	if (!master)
1381	return -EINVAL;
1382
1383	bus = i3c_master_get_bus(master);
1384	i3c_bus_for_each_i3cdev(bus, i3cdev) {
1385	ndevs++;
1386
1387	if (i3cdev == master->this)
1388	continue;
1389
1390	if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1391	I3C_BCR_I3C_MASTER)
1392	send = true;
1393	}
1394
1395	/* No other master on the bus, skip DEFSLVS. */
1396	if (!send)
1397	return 0;
1398
1399	i3c_bus_for_each_i2cdev(bus, i2cdev)
1400	ndevs++;
1401
1402	defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
1403	struct_size(defslvs, slaves,
1404	ndevs - 1));
1405	if (!defslvs)
1406	return -ENOMEM;
1407
1408	defslvs->count = ndevs;
1409	defslvs->master.bcr = master->this->info.bcr;
1410	defslvs->master.dcr = master->this->info.dcr;
1411	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1412	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1413
1414	desc = defslvs->slaves;
1415	i3c_bus_for_each_i2cdev(bus, i2cdev) {
1416	desc->lvr = i2cdev->lvr;
1417	desc->static_addr = i2cdev->addr << 1;
1418	desc++;
1419	}
1420
1421	i3c_bus_for_each_i3cdev(bus, i3cdev) {
1422	/* Skip the I3C dev representing this master. */
1423	if (i3cdev == master->this)
1424	continue;
1425
1426	desc->bcr = i3cdev->info.bcr;
1427	desc->dcr = i3cdev->info.dcr;
1428	desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1429	desc->static_addr = i3cdev->info.static_addr << 1;
1430	desc++;
1431	}
1432
1433	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1434	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1435	i3c_ccc_cmd_dest_cleanup(&dest);
1436
1437	return ret;
1438	}
1439	EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1440
1441	static int i3c_master_setda_locked(struct i3c_master_controller *master,
1442	u8 oldaddr, u8 newaddr, bool setdasa)
1443	{
1444	struct i3c_ccc_cmd_dest dest;
1445	struct i3c_ccc_setda *setda;
1446	struct i3c_ccc_cmd cmd;
1447	int ret;
1448
1449	if (!oldaddr \|\| !newaddr)
1450	return -EINVAL;
1451
1452	setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1453	if (!setda)
1454	return -ENOMEM;
1455
1456	setda->addr = newaddr << 1;
1457	i3c_ccc_cmd_init(&cmd, false,
1458	setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1459	&dest, 1);
1460	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1461	i3c_ccc_cmd_dest_cleanup(&dest);
1462
1463	return ret;
1464	}
1465
1466	static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1467	u8 static_addr, u8 dyn_addr)
1468	{
1469	return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1470	}
1471
1472	static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1473	u8 oldaddr, u8 newaddr)
1474	{
1475	return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1476	}
1477
1478	static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1479	struct i3c_device_info *info)
1480	{
1481	struct i3c_ccc_cmd_dest dest;
1482	struct i3c_ccc_mrl *mrl;
1483	struct i3c_ccc_cmd cmd;
1484	int ret;
1485
1486	mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1487	if (!mrl)
1488	return -ENOMEM;
1489
1490	/*
1491	* GETMRL returns 2 bytes (max read length) when the device does not
1492	* advertise IBI payload, or 2 or 3 bytes when it does (the optional
1493	* third byte is max IBI length). Use optional_bytes to allow either
1494	* length when IBI payload is supported.
1495	*/
1496	if (info->bcr & I3C_BCR_IBI_PAYLOAD)
1497	dest.payload.optional_bytes = 1;
1498	else
1499	dest.payload.len -= 1;
1500
1501	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1502	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1503	if (ret)
1504	goto out;
1505
1506	switch (dest.payload.actual_len) {
1507	case 3:
1508	info->max_ibi_len = mrl->ibi_len;
1509	fallthrough;
1510	case 2:
1511	info->max_read_len = be16_to_cpu(mrl->read_len);
1512	break;
1513	default:
1514	ret = -EIO;
1515	goto out;
1516	}
1517
1518	out:
1519	i3c_ccc_cmd_dest_cleanup(&dest);
1520
1521	return ret;
1522	}
1523
1524	static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1525	struct i3c_device_info *info)
1526	{
1527	struct i3c_ccc_cmd_dest dest;
1528	struct i3c_ccc_mwl *mwl;
1529	struct i3c_ccc_cmd cmd;
1530	int ret;
1531
1532	mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1533	if (!mwl)
1534	return -ENOMEM;
1535
1536	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1537	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1538	if (ret)
1539	goto out;
1540
1541	if (dest.payload.actual_len != sizeof(*mwl)) {
1542	ret = -EIO;
1543	goto out;
1544	}
1545
1546	info->max_write_len = be16_to_cpu(mwl->len);
1547
1548	out:
1549	i3c_ccc_cmd_dest_cleanup(&dest);
1550
1551	return ret;
1552	}
1553
1554	static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1555	struct i3c_device_info *info)
1556	{
1557	struct i3c_ccc_getmxds *getmaxds;
1558	struct i3c_ccc_cmd_dest dest;
1559	struct i3c_ccc_cmd cmd;
1560	int ret;
1561
1562	getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1563	sizeof(*getmaxds));
1564	if (!getmaxds)
1565	return -ENOMEM;
1566
1567	dest.payload.optional_bytes = 3;
1568
1569	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1570	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1571	if (ret) {
1572	/*
1573	* optional_bytes = 3 accepts a 2-byte response on the first
1574	* attempt, so this fallback runs only when the 5-byte request
1575	* fails rather than returning a short read.
1576	*/
1577	dest.payload.len -= 3;
1578	dest.payload.optional_bytes = 0;
1579	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1580	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1581	if (ret)
1582	goto out;
1583	}
1584
1585	if (dest.payload.actual_len != 2 && dest.payload.actual_len != 5) {
1586	ret = -EIO;
1587	goto out;
1588	}
1589
1590	info->max_read_ds = getmaxds->maxrd;
1591	info->max_write_ds = getmaxds->maxwr;
1592	if (dest.payload.actual_len == 5)
1593	info->max_read_turnaround = getmaxds->maxrdturn[0] \|
1594	((u32)getmaxds->maxrdturn[1] << 8) \|
1595	((u32)getmaxds->maxrdturn[2] << 16);
1596
1597	out:
1598	i3c_ccc_cmd_dest_cleanup(&dest);
1599
1600	return ret;
1601	}
1602
1603	static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1604	struct i3c_device_info *info)
1605	{
1606	struct i3c_ccc_gethdrcap *gethdrcap;
1607	struct i3c_ccc_cmd_dest dest;
1608	struct i3c_ccc_cmd cmd;
1609	int ret;
1610
1611	gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1612	sizeof(*gethdrcap));
1613	if (!gethdrcap)
1614	return -ENOMEM;
1615
1616	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1617	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1618	if (ret)
1619	goto out;
1620
1621	if (dest.payload.actual_len != 1) {
1622	ret = -EIO;
1623	goto out;
1624	}
1625
1626	info->hdr_cap = gethdrcap->modes;
1627
1628	out:
1629	i3c_ccc_cmd_dest_cleanup(&dest);
1630
1631	return ret;
1632	}
1633
1634	static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1635	struct i3c_device_info *info)
1636	{
1637	struct i3c_ccc_getpid *getpid;
1638	struct i3c_ccc_cmd_dest dest;
1639	struct i3c_ccc_cmd cmd;
1640	int ret, i;
1641
1642	getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1643	if (!getpid)
1644	return -ENOMEM;
1645
1646	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1647	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1648	if (ret)
1649	goto out;
1650
1651	info->pid = 0;
1652	for (i = 0; i < sizeof(getpid->pid); i++) {
1653	int sft = (sizeof(getpid->pid) - i - 1) * 8;
1654
1655	info->pid \|= (u64)getpid->pid[i] << sft;
1656	}
1657
1658	out:
1659	i3c_ccc_cmd_dest_cleanup(&dest);
1660
1661	return ret;
1662	}
1663
1664	static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1665	struct i3c_device_info *info)
1666	{
1667	struct i3c_ccc_getbcr *getbcr;
1668	struct i3c_ccc_cmd_dest dest;
1669	struct i3c_ccc_cmd cmd;
1670	int ret;
1671
1672	getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1673	if (!getbcr)
1674	return -ENOMEM;
1675
1676	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1677	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1678	if (ret)
1679	goto out;
1680
1681	info->bcr = getbcr->bcr;
1682
1683	out:
1684	i3c_ccc_cmd_dest_cleanup(&dest);
1685
1686	return ret;
1687	}
1688
1689	static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1690	struct i3c_device_info *info)
1691	{
1692	struct i3c_ccc_getdcr *getdcr;
1693	struct i3c_ccc_cmd_dest dest;
1694	struct i3c_ccc_cmd cmd;
1695	int ret;
1696
1697	getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1698	if (!getdcr)
1699	return -ENOMEM;
1700
1701	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1702	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1703	if (ret)
1704	goto out;
1705
1706	info->dcr = getdcr->dcr;
1707
1708	out:
1709	i3c_ccc_cmd_dest_cleanup(&dest);
1710
1711	return ret;
1712	}
1713
1714	static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1715	{
1716	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1717	enum i3c_addr_slot_status slot_status;
1718	int ret;
1719
1720	if (!dev->info.dyn_addr)
1721	return -EINVAL;
1722
1723	slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1724	dev->info.dyn_addr);
1725	if (slot_status == I3C_ADDR_SLOT_RSVD \|\|
1726	slot_status == I3C_ADDR_SLOT_I2C_DEV)
1727	return -EINVAL;
1728
1729	ret = i3c_master_getpid_locked(master, &dev->info);
1730	if (ret)
1731	return ret;
1732
1733	ret = i3c_master_getbcr_locked(master, &dev->info);
1734	if (ret)
1735	return ret;
1736
1737	ret = i3c_master_getdcr_locked(master, &dev->info);
1738	if (ret)
1739	return ret;
1740
1741	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1742	ret = i3c_master_getmxds_locked(master, &dev->info);
1743	if (ret)
1744	return ret;
1745	}
1746
1747	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1748	dev->info.max_ibi_len = 1;
1749
1750	i3c_master_getmrl_locked(master, &dev->info);
1751	i3c_master_getmwl_locked(master, &dev->info);
1752
1753	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1754	ret = i3c_master_gethdrcap_locked(master, &dev->info);
1755	if (ret && ret != -EOPNOTSUPP)
1756	return ret;
1757	}
1758
1759	return 0;
1760	}
1761
1762	static int i3c_master_getstatus_locked(struct i3c_master_controller *master,
1763	u8 addr, u16 *status)
1764	{
1765	struct i3c_ccc_getstatus *getstatus;
1766	struct i3c_ccc_cmd_dest dest;
1767	struct i3c_ccc_cmd cmd;
1768	int ret;
1769
1770	getstatus = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*getstatus));
1771	if (!getstatus)
1772	return -ENOMEM;
1773
1774	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETSTATUS, &dest, 1);
1775	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1776	if (ret)
1777	goto out;
1778
1779	if (dest.payload.len != sizeof(*getstatus)) {
1780	ret = -EIO;
1781	goto out;
1782	}
1783
1784	if (status)
1785	*status = be16_to_cpu(getstatus->status);
1786	out:
1787	i3c_ccc_cmd_dest_cleanup(&dest);
1788
1789	return ret;
1790	}
1791
1792	/* Values are chosen to give the device plenty of opportunities to respond */
1793	#define I3C_DEV_PROBE_INITIAL_DELAY_US 20
1794	#define I3C_DEV_PROBE_DELAY_FACTOR 2
1795	#define I3C_DEV_PROBE_CNT 5
1796
1797	static bool i3c_master_i3c_dev_present(struct i3c_master_controller *master, unsigned int addr)
1798	{
1799	int delay = I3C_DEV_PROBE_INITIAL_DELAY_US;
1800
1801	for (int i = 0; i < I3C_DEV_PROBE_CNT; i++) {
1802	if (i) {
1803	fsleep(delay);
1804	delay *= I3C_DEV_PROBE_DELAY_FACTOR;
1805	}
1806	if (!i3c_master_getstatus_locked(master, addr, NULL))
1807	return true;
1808	}
1809
1810	return false;
1811	}
1812
1813	static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1814	{
1815	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1816
1817	if (dev->info.static_addr)
1818	i3c_bus_set_addr_slot_status(&master->bus,
1819	dev->info.static_addr,
1820	I3C_ADDR_SLOT_FREE);
1821
1822	if (dev->info.dyn_addr)
1823	i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1824	I3C_ADDR_SLOT_FREE);
1825
1826	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1827	i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr,
1828	I3C_ADDR_SLOT_FREE);
1829	}
1830
1831	static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1832	{
1833	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1834	enum i3c_addr_slot_status status;
1835
1836	if (!dev->info.static_addr && !dev->info.dyn_addr)
1837	return 0;
1838
1839	if (dev->info.static_addr) {
1840	status = i3c_bus_get_addr_slot_status(&master->bus,
1841	dev->info.static_addr);
1842	/* Since static address and assigned dynamic address can be
1843	* equal, allow this case to pass.
1844	*/
1845	if (status != I3C_ADDR_SLOT_FREE &&
1846	dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1847	return -EBUSY;
1848
1849	i3c_bus_set_addr_slot_status(&master->bus,
1850	dev->info.static_addr,
1851	I3C_ADDR_SLOT_I3C_DEV);
1852	}
1853
1854	/*
1855	* ->init_dyn_addr should have been reserved before that, so, if we're
1856	* trying to apply a pre-reserved dynamic address, we should not try
1857	* to reserve the address slot a second time.
1858	*/
1859	if (dev->info.dyn_addr &&
1860	(!dev->boardinfo \|\|
1861	dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1862	status = i3c_bus_get_addr_slot_status(&master->bus,
1863	dev->info.dyn_addr);
1864	if (status != I3C_ADDR_SLOT_FREE)
1865	goto err_release_static_addr;
1866
1867	i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1868	I3C_ADDR_SLOT_I3C_DEV);
1869	}
1870
1871	return 0;
1872
1873	err_release_static_addr:
1874	if (dev->info.static_addr)
1875	i3c_bus_set_addr_slot_status(&master->bus,
1876	dev->info.static_addr,
1877	I3C_ADDR_SLOT_FREE);
1878
1879	return -EBUSY;
1880	}
1881
1882	static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1883	struct i3c_dev_desc *dev)
1884	{
1885	int ret;
1886
1887	/*
1888	* We don't attach devices to the controller until they are
1889	* addressable on the bus.
1890	*/
1891	if (!dev->info.static_addr && !dev->info.dyn_addr)
1892	return 0;
1893
1894	ret = i3c_master_get_i3c_addrs(dev);
1895	if (ret)
1896	return ret;
1897
1898	/* Do not attach the master device itself. */
1899	if (master->this != dev && master->ops->attach_i3c_dev) {
1900	ret = master->ops->attach_i3c_dev(dev);
1901	if (ret) {
1902	i3c_master_put_i3c_addrs(dev);
1903	return ret;
1904	}
1905	}
1906
1907	list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1908
1909	return 0;
1910	}
1911
1912	/**
1913	* i3c_master_reattach_i3c_dev_locked() - reattach an I3C device with a new address
1914	* @dev: I3C device descriptor to reattach
1915	* @old_dyn_addr: previous dynamic address of the device
1916	*
1917	* This function reattaches an existing I3C device to the bus when its dynamic
1918	* address has changed. It updates the bus address slot status accordingly:
1919	* - Marks the new dynamic address as occupied by an I3C device.
1920	* - Frees the old dynamic address slot if applicable.
1921	*
1922	* This function must be called with the bus lock held in write mode.
1923	*
1924	* Return: 0 on success, or a negative error code if reattachment fails
1925	* (e.g. -EBUSY if the new address slot is not free).
1926	*/
1927	int i3c_master_reattach_i3c_dev_locked(struct i3c_dev_desc *dev,
1928	u8 old_dyn_addr)
1929	{
1930	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1931	int ret;
1932
1933	if (dev->info.dyn_addr != old_dyn_addr) {
1934	i3c_bus_set_addr_slot_status(&master->bus,
1935	dev->info.dyn_addr,
1936	I3C_ADDR_SLOT_I3C_DEV);
1937	if (old_dyn_addr)
1938	i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1939	I3C_ADDR_SLOT_FREE);
1940	}
1941
1942	if (master->ops->reattach_i3c_dev) {
1943	ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1944	if (ret) {
1945	i3c_master_put_i3c_addrs(dev);
1946	return ret;
1947	}
1948	}
1949
1950	return 0;
1951	}
1952	EXPORT_SYMBOL_GPL(i3c_master_reattach_i3c_dev_locked);
1953
1954	static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1955	{
1956	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1957
1958	/* Do not detach the master device itself. */
1959	if (master->this != dev && master->ops->detach_i3c_dev)
1960	master->ops->detach_i3c_dev(dev);
1961
1962	i3c_master_put_i3c_addrs(dev);
1963	list_del(&dev->common.node);
1964	}
1965
1966	static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1967	struct i2c_dev_desc *dev)
1968	{
1969	int ret;
1970
1971	if (master->ops->attach_i2c_dev) {
1972	ret = master->ops->attach_i2c_dev(dev);
1973	if (ret)
1974	return ret;
1975	}
1976
1977	list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1978
1979	return 0;
1980	}
1981
1982	static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1983	{
1984	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1985
1986	list_del(&dev->common.node);
1987
1988	if (master->ops->detach_i2c_dev)
1989	master->ops->detach_i2c_dev(dev);
1990	}
1991
1992	static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1993	struct i3c_dev_boardinfo *boardinfo)
1994	{
1995	struct i3c_device_info info = {
1996	.static_addr = boardinfo->static_addr,
1997	.pid = boardinfo->pid,
1998	};
1999	struct i3c_dev_desc *i3cdev;
2000	int ret;
2001
2002	i3cdev = i3c_master_alloc_i3c_dev(master, &info);
2003	if (IS_ERR(i3cdev)) {
2004	ret = -ENOMEM;
2005	goto err_reserve_addr;
2006	}
2007
2008	i3cdev->boardinfo = boardinfo;
2009
2010	ret = i3c_master_attach_i3c_dev(master, i3cdev);
2011	if (ret)
2012	goto err_free_dev;
2013
2014	/*
2015	* For devices using SETAASA instead of ENTDAA, the address is statically
2016	* assigned. Update the dynamic address to the provided static address.
2017	* Reattach the I3C device after updating the dynamic address with the same
2018	* static address. It is not mandatory for such devices to implement CCC
2019	* commands like GETPID, GETDCR etc. Hence, we can return after reattaching.
2020	*/
2021	if (i3cdev->boardinfo->static_addr_method & I3C_ADDR_METHOD_SETAASA) {
2022	i3cdev->info.dyn_addr = i3cdev->boardinfo->static_addr;
2023	ret = i3c_master_reattach_i3c_dev_locked(i3cdev, 0);
2024	if (ret)
2025	goto err_detach_dev;
2026
2027	return 0;
2028	}
2029
2030	ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
2031	i3cdev->boardinfo->init_dyn_addr);
2032	if (ret)
2033	goto err_detach_dev;
2034
2035	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
2036	ret = i3c_master_reattach_i3c_dev_locked(i3cdev, 0);
2037	if (ret)
2038	goto err_rstdaa;
2039
2040	ret = i3c_master_retrieve_dev_info(i3cdev);
2041	if (ret)
2042	goto err_rstdaa;
2043
2044	return 0;
2045
2046	err_rstdaa:
2047	i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
2048	err_detach_dev:
2049	i3c_master_detach_i3c_dev(i3cdev);
2050	err_free_dev:
2051	i3c_master_free_i3c_dev(i3cdev);
2052	err_reserve_addr:
2053	/*
2054	* A target using SETAASA may still get the static address on the
2055	* SETAASA broadcast even if attach fails here. Keep the address
2056	* reserved so that it is not assigned to another device during DAA.
2057	*/
2058	if (boardinfo->static_addr_method & I3C_ADDR_METHOD_SETAASA)
2059	i3c_bus_set_addr_slot_status(&master->bus,
2060	boardinfo->static_addr,
2061	I3C_ADDR_SLOT_RSVD);
2062
2063	return ret;
2064	}
2065
2066	static void
2067	i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
2068	{
2069	struct i3c_device i3cdev, tmp;
2070	struct i3c_dev_desc *desc;
2071	LIST_HEAD(i3c_unreg_devs);
2072	int ret;
2073
2074	if (!master->init_done)
2075	return;
2076
2077	i3c_bus_maintenance_lock(&master->bus);
2078
2079	if (master->shutting_down) {
2080	i3c_bus_maintenance_unlock(&master->bus);
2081	return;
2082	}
2083
2084	i3c_bus_for_each_i3cdev(&master->bus, desc) {
2085	if (desc->dev \|\| !desc->info.dyn_addr \|\| desc == master->this)
2086	continue;
2087
2088	desc->dev = kzalloc_obj(*desc->dev);
2089	if (!desc->dev)
2090	continue;
2091
2092	desc->dev->bus = &master->bus;
2093	desc->dev->desc = desc;
2094	desc->dev->dev.parent = &master->dev;
2095	desc->dev->dev.type = &i3c_device_type;
2096	desc->dev->dev.bus = &i3c_bus_type;
2097	desc->dev->dev.release = i3c_device_release;
2098
2099	/*
2100	* For devices without PID (e.g., SETAASA devices), use
2101	* static address for naming instead.
2102	*/
2103	if (desc->info.pid)
2104	dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
2105	desc->info.pid);
2106	else
2107	dev_set_name(&desc->dev->dev, "%d-%02x", master->bus.id,
2108	desc->info.static_addr);
2109
2110	if (desc->boardinfo)
2111	device_set_node(&desc->dev->dev, desc->boardinfo->fwnode);
2112
2113	/* If the device has IBI capability, set as wakeup capable */
2114	if (master->ibi_wakeup && (desc->info.bcr & I3C_BCR_IBI_REQ_CAP))
2115	device_set_wakeup_capable(&desc->dev->dev, true);
2116
2117	list_add_tail(&desc->dev->node, &i3c_unreg_devs);
2118	}
2119
2120	i3c_bus_maintenance_unlock(&master->bus);
2121
2122	list_for_each_entry_safe(i3cdev, tmp, &i3c_unreg_devs, node) {
2123	ret = device_register(&i3cdev->dev);
2124	if (ret)
2125	dev_err(&master->dev, "Failed to add I3C device (err = %d)\n", ret);
2126	else
2127	list_del_init(&i3cdev->node);
2128	}
2129
2130	i3c_bus_maintenance_lock(&master->bus);
2131
2132	list_for_each_entry_safe(i3cdev, tmp, &i3c_unreg_devs, node) {
2133	list_del(&i3cdev->node);
2134	desc = i3cdev->desc;
2135	i3cdev->desc = NULL;
2136	put_device(&i3cdev->dev);
2137	desc->dev = NULL;
2138	}
2139
2140	i3c_bus_maintenance_unlock(&master->bus);
2141	}
2142
2143	static void i3c_master_reg_work_fn(struct work_struct *work)
2144	{
2145	struct i3c_master_controller master = container_of(work, typeof(master), reg_work);
2146
2147	i3c_master_register_new_i3c_devs(master);
2148	}
2149
2150	/**
2151	* i3c_master_has_wakeup_enabled_devs() - check if any device can wake the system
2152	* @master: I3C master controller
2153	*
2154	* Iterate over devices on the bus and return true if any device has
2155	* system wakeup enabled and IBI enabled.
2156	*
2157	* Whether a device is enabled for system wakeup is user space policy,
2158	* settable at any time through the device's power/wakeup sysfs attribute,
2159	* so the answer is only stable once user space is frozen. Call this from
2160	* a system suspend callback.
2161	*
2162	* Return: true if any device may wake the system via IBI, false otherwise.
2163	*/
2164	bool i3c_master_has_wakeup_enabled_devs(struct i3c_master_controller *master)
2165	{
2166	struct i3c_dev_desc *desc;
2167	bool wakeup = false;
2168
2169	i3c_bus_normaluse_lock(&master->bus);
2170	i3c_bus_for_each_i3cdev(&master->bus, desc) {
2171	if (!desc->dev \|\| desc == master->this \|\| !device_may_wakeup(&desc->dev->dev))
2172	continue;
2173	guard(mutex)(&desc->ibi_lock);
2174	if (desc->ibi && desc->ibi->enabled) {
2175	wakeup = true;
2176	break;
2177	}
2178	}
2179	i3c_bus_normaluse_unlock(&master->bus);
2180
2181	return wakeup;
2182	}
2183	EXPORT_SYMBOL_GPL(i3c_master_has_wakeup_enabled_devs);
2184
2185	/**
2186	* i3c_master_dma_map_single() - Map buffer for single DMA transfer
2187	* @dev: device object of a device doing DMA
2188	* @buf: destination/source buffer for DMA
2189	* @len: length of transfer
2190	* @force_bounce: true, force to use a bounce buffer,
2191	* false, function will auto check is a bounce buffer required
2192	* @dir: DMA direction
2193	*
2194	* Map buffer for a DMA transfer and allocate a bounce buffer if required.
2195	*
2196	* Return: I3C DMA transfer descriptor or NULL in case of error.
2197	*/
2198	struct i3c_dma i3c_master_dma_map_single(struct device dev, void *buf,
2199	size_t len, bool force_bounce, enum dma_data_direction dir)
2200	{
2201	void *bounce __free(kfree) = NULL;
2202	void *dma_buf = buf;
2203
2204	struct i3c_dma dma_xfer __free(kfree) = kzalloc_obj(dma_xfer);
2205	if (!dma_xfer)
2206	return NULL;
2207
2208	dma_xfer->dev = dev;
2209	dma_xfer->buf = buf;
2210	dma_xfer->dir = dir;
2211	dma_xfer->len = len;
2212	dma_xfer->map_len = len;
2213
2214	if (is_vmalloc_addr(buf))
2215	force_bounce = true;
2216
2217	if (force_bounce) {
2218	dma_xfer->map_len = ALIGN(len, cache_line_size());
2219	if (dir == DMA_FROM_DEVICE)
2220	bounce = kzalloc(dma_xfer->map_len, GFP_KERNEL);
2221	else
2222	bounce = kmemdup(buf, dma_xfer->map_len, GFP_KERNEL);
2223	if (!bounce)
2224	return NULL;
2225	dma_buf = bounce;
2226	}
2227
2228	dma_xfer->addr = dma_map_single(dev, dma_buf, dma_xfer->map_len, dir);
2229	if (dma_mapping_error(dev, dma_xfer->addr))
2230	return NULL;
2231
2232	dma_xfer->bounce_buf = no_free_ptr(bounce);
2233	return no_free_ptr(dma_xfer);
2234	}
2235	EXPORT_SYMBOL_GPL(i3c_master_dma_map_single);
2236
2237	/**
2238	* i3c_master_dma_unmap_single() - Unmap buffer after DMA
2239	* @dma_xfer: DMA transfer and mapping descriptor
2240	*
2241	* Unmap buffer and cleanup DMA transfer descriptor.
2242	*/
2243	void i3c_master_dma_unmap_single(struct i3c_dma *dma_xfer)
2244	{
2245	dma_unmap_single(dma_xfer->dev, dma_xfer->addr,
2246	dma_xfer->map_len, dma_xfer->dir);
2247	if (dma_xfer->bounce_buf) {
2248	if (dma_xfer->dir == DMA_FROM_DEVICE)
2249	memcpy(dma_xfer->buf, dma_xfer->bounce_buf,
2250	dma_xfer->len);
2251	kfree(dma_xfer->bounce_buf);
2252	}
2253	kfree(dma_xfer);
2254	}
2255	EXPORT_SYMBOL_GPL(i3c_master_dma_unmap_single);
2256
2257	/**
2258	* i3c_master_set_info() - set master device information
2259	* @master: master used to send frames on the bus
2260	* @info: I3C device information
2261	*
2262	* Set master device info. This should be called from
2263	* &i3c_master_controller_ops->bus_init().
2264	*
2265	* Not all &i3c_device_info fields are meaningful for a master device.
2266	* Here is a list of fields that should be properly filled:
2267	*
2268	* - &i3c_device_info->dyn_addr
2269	* - &i3c_device_info->bcr
2270	* - &i3c_device_info->dcr
2271	* - &i3c_device_info->pid
2272	* - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
2273	* &i3c_device_info->bcr
2274	*
2275	* This function must be called with the bus lock held in maintenance mode.
2276	*
2277	* Return: 0 if @info contains valid information (not every piece of
2278	* information can be checked, but we can at least make sure @info->dyn_addr
2279	* and @info->bcr are correct), -EINVAL otherwise.
2280	*/
2281	int i3c_master_set_info(struct i3c_master_controller *master,
2282	const struct i3c_device_info *info)
2283	{
2284	struct i3c_dev_desc *i3cdev;
2285	int ret;
2286
2287	if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
2288	return -EINVAL;
2289
2290	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
2291	master->secondary)
2292	return -EINVAL;
2293
2294	if (master->this)
2295	return -EINVAL;
2296
2297	i3cdev = i3c_master_alloc_i3c_dev(master, info);
2298	if (IS_ERR(i3cdev))
2299	return PTR_ERR(i3cdev);
2300
2301	master->this = i3cdev;
2302	master->bus.cur_master = master->this;
2303
2304	ret = i3c_master_attach_i3c_dev(master, i3cdev);
2305	if (ret)
2306	goto err_free_dev;
2307
2308	return 0;
2309
2310	err_free_dev:
2311	master->bus.cur_master = NULL;
2312	master->this = NULL;
2313	i3c_master_free_i3c_dev(i3cdev);
2314
2315	return ret;
2316	}
2317	EXPORT_SYMBOL_GPL(i3c_master_set_info);
2318
2319	static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
2320	{
2321	struct i3c_dev_desc i3cdev, i3ctmp;
2322	struct i2c_dev_desc i2cdev, i2ctmp;
2323
2324	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
2325	common.node) {
2326	i3c_master_detach_i3c_dev(i3cdev);
2327
2328	if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
2329	i3c_bus_set_addr_slot_status(&master->bus,
2330	i3cdev->boardinfo->init_dyn_addr,
2331	I3C_ADDR_SLOT_FREE);
2332
2333	if (i3cdev != master->this)
2334	i3c_master_free_i3c_dev(i3cdev);
2335	}
2336
2337	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
2338	common.node) {
2339	i3c_master_detach_i2c_dev(i2cdev);
2340	i3c_bus_set_addr_slot_status(&master->bus,
2341	i2cdev->addr,
2342	I3C_ADDR_SLOT_FREE);
2343	i3c_master_free_i2c_dev(i2cdev);
2344	}
2345	}
2346
2347	/**
2348	* i3c_master_bus_init() - initialize an I3C bus
2349	* @master: main master initializing the bus
2350	*
2351	* This function is following all initialisation steps described in the I3C
2352	* specification:
2353	*
2354	* 1. Attach I2C devs to the master so that the master can fill its internal
2355	* device table appropriately
2356	*
2357	* 2. Call &i3c_master_controller_ops->bus_init() method to initialize
2358	* the master controller. That's usually where the bus mode is selected
2359	* (pure bus or mixed fast/slow bus)
2360	*
2361	* 3. Instruct all devices on the bus to drop their dynamic address. This is
2362	* particularly important when the bus was previously configured by someone
2363	* else (for example the bootloader)
2364	*
2365	* 4. Disable all slave events.
2366	*
2367	* 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
2368	* also have static_addr, try to pre-assign dynamic addresses requested by
2369	* the FW with SETDASA and attach corresponding statically defined I3C
2370	* devices to the master.
2371	*
2372	* 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
2373	* remaining I3C devices
2374	*
2375	* Once this is done, all I3C and I2C devices should be usable.
2376	*
2377	* Return: a 0 in case of success, an negative error code otherwise.
2378	*/
2379	static int i3c_master_bus_init(struct i3c_master_controller *master)
2380	{
2381	enum i3c_addr_slot_status status;
2382	struct i2c_dev_boardinfo *i2cboardinfo;
2383	struct i3c_dev_boardinfo *i3cboardinfo;
2384	struct i2c_dev_desc *i2cdev;
2385	int ret;
2386
2387	/*
2388	* First attach all devices with static definitions provided by the
2389	* FW.
2390	*/
2391	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2392	status = i3c_bus_get_addr_slot_status(&master->bus,
2393	i2cboardinfo->base.addr);
2394	if (status != I3C_ADDR_SLOT_FREE) {
2395	ret = -EBUSY;
2396	goto err_detach_devs;
2397	}
2398
2399	i3c_bus_set_addr_slot_status(&master->bus,
2400	i2cboardinfo->base.addr,
2401	I3C_ADDR_SLOT_I2C_DEV);
2402
2403	i2cdev = i3c_master_alloc_i2c_dev(master,
2404	i2cboardinfo->base.addr,
2405	i2cboardinfo->lvr);
2406	if (IS_ERR(i2cdev)) {
2407	ret = PTR_ERR(i2cdev);
2408	goto err_detach_devs;
2409	}
2410
2411	ret = i3c_master_attach_i2c_dev(master, i2cdev);
2412	if (ret) {
2413	i3c_master_free_i2c_dev(i2cdev);
2414	goto err_detach_devs;
2415	}
2416	}
2417
2418	/*
2419	* Now execute the controller specific ->bus_init() routine, which
2420	* might configure its internal logic to match the bus limitations.
2421	*/
2422	ret = master->ops->bus_init(master);
2423	if (ret)
2424	goto err_detach_devs;
2425
2426	/*
2427	* The master device should have been instantiated in ->bus_init(),
2428	* complain if this was not the case.
2429	*/
2430	if (!master->this) {
2431	dev_err(&master->dev,
2432	"master_set_info() was not called in ->bus_init()\n");
2433	ret = -EINVAL;
2434	goto err_bus_cleanup;
2435	}
2436
2437	if (master->ops->set_speed) {
2438	ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
2439	if (ret)
2440	goto err_bus_cleanup;
2441	}
2442
2443	/*
2444	* Reset all dynamic address that may have been assigned before
2445	* (assigned by the bootloader for example).
2446	*/
2447	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
2448	if (ret)
2449	goto err_bus_cleanup;
2450
2451	if (master->ops->set_speed) {
2452	ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
2453	if (ret)
2454	goto err_bus_cleanup;
2455	}
2456
2457	/*
2458	* Disable all slave events before starting DAA. When no active device
2459	* is on the bus, returns Mx error code M2, this error is ignored.
2460	*/
2461	ret = i3c_master_enec_disec_locked(master, I3C_BROADCAST_ADDR, false,
2462	I3C_CCC_EVENT_SIR \| I3C_CCC_EVENT_MR \|
2463	I3C_CCC_EVENT_HJ, true);
2464	if (ret)
2465	goto err_bus_cleanup;
2466
2467	/*
2468	* Reserve init_dyn_addr first, and then try to pre-assign dynamic
2469	* address and retrieve device information if needed.
2470	* In case pre-assign dynamic address fails, setting dynamic address to
2471	* the requested init_dyn_addr is retried after DAA is done in
2472	* i3c_master_add_i3c_dev_locked().
2473	*/
2474	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
2475
2476	/*
2477	* We don't reserve a dynamic address for devices that
2478	* don't explicitly request one.
2479	*/
2480	if (!i3cboardinfo->init_dyn_addr)
2481	continue;
2482
2483	ret = i3c_bus_get_addr_slot_status(&master->bus,
2484	i3cboardinfo->init_dyn_addr);
2485	if (ret != I3C_ADDR_SLOT_FREE) {
2486	ret = -EBUSY;
2487	goto err_rstdaa;
2488	}
2489
2490	/* Do not mark as occupied until real device exist in bus */
2491	i3c_bus_set_addr_slot_status_mask(&master->bus,
2492	i3cboardinfo->init_dyn_addr,
2493	I3C_ADDR_SLOT_EXT_DESIRED,
2494	I3C_ADDR_SLOT_EXT_STATUS_MASK);
2495
2496	/*
2497	* Only try to create/attach devices that have a static
2498	* address. Other devices will be created/attached when
2499	* DAA happens, and the requested dynamic address will
2500	* be set using SETNEWDA once those devices become
2501	* addressable.
2502	*/
2503
2504	if (i3cboardinfo->static_addr)
2505	i3c_master_early_i3c_dev_add(master, i3cboardinfo);
2506	}
2507
2508	/*
2509	* SETAASA is a broadcast CCC. Issue it after SETDASA so that devices
2510	* configured for SETDASA (or supporting both methods) are assigned
2511	* first, matching MIPI DISCO guidance to prefer SETDASA when both are
2512	* available. Targets that already have a dynamic address ignore the
2513	* later SETAASA broadcast.
2514	*/
2515	if (master->addr_method & I3C_ADDR_METHOD_SETAASA) {
2516	ret = i3c_master_setaasa_locked(master);
2517	if (ret)
2518	goto err_rstdaa;
2519	}
2520
2521	ret = i3c_master_do_daa(master);
2522	if (ret)
2523	goto err_rstdaa;
2524
2525	return 0;
2526
2527	err_rstdaa:
2528	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
2529
2530	err_bus_cleanup:
2531	if (master->ops->bus_cleanup)
2532	master->ops->bus_cleanup(master);
2533
2534	err_detach_devs:
2535	i3c_master_detach_free_devs(master);
2536
2537	return ret;
2538	}
2539
2540	static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
2541	{
2542	if (master->ops->bus_cleanup) {
2543	int ret = i3c_master_rpm_get(master);
2544
2545	if (ret) {
2546	dev_err(&master->dev,
2547	"runtime resume error: master bus_cleanup() not done\n");
2548	} else {
2549	master->ops->bus_cleanup(master);
2550	i3c_master_rpm_put(master);
2551	}
2552	}
2553
2554	i3c_master_detach_free_devs(master);
2555	}
2556
2557	static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
2558	{
2559	struct i3c_master_controller *master = i3cdev->common.master;
2560	struct i3c_dev_boardinfo *i3cboardinfo;
2561
2562	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
2563	/*
2564	* For devices without PID (e.g., SETAASA devices), match by
2565	* static address. For devices with PID, match by PID.
2566	*/
2567	if (i3cboardinfo->pid) {
2568	if (i3cdev->info.pid != i3cboardinfo->pid)
2569	continue;
2570	} else {
2571	if (!i3cboardinfo->static_addr \|\|
2572	i3cdev->info.static_addr != i3cboardinfo->static_addr)
2573	continue;
2574	}
2575
2576	i3cdev->boardinfo = i3cboardinfo;
2577	i3cdev->info.static_addr = i3cboardinfo->static_addr;
2578	return;
2579	}
2580	}
2581
2582	static struct i3c_dev_desc *
2583	i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
2584	{
2585	struct i3c_master_controller *master = i3c_dev_get_master(refdev);
2586	struct i3c_dev_desc *i3cdev;
2587
2588	if (!refdev->info.pid)
2589	return NULL;
2590
2591	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2592	if (i3cdev != refdev && i3cdev->info.pid &&
2593	i3cdev->info.pid == refdev->info.pid &&
2594	i3cdev != master->this)
2595	return i3cdev;
2596	}
2597
2598	return NULL;
2599	}
2600
2601	/**
2602	* __i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
2603	* @master: master used to send frames on the bus
2604	* @addr: I3C slave dynamic address assigned to the device
2605	* @probe: probe to see if the device is really present at @addr
2606	*
2607	* This function instantiates an I3C device object and adds it to the I3C device
2608	* list. All device information is retrieved using standard CCC commands.
2609	*
2610	* This function must be called with the bus lock held in write mode.
2611	*/
2612	static void __i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
2613	u8 addr, bool probe)
2614	{
2615	struct i3c_device_info info = { .dyn_addr = addr };
2616	struct i3c_dev_desc newdev, olddev;
2617	u8 old_dyn_addr = addr, expected_dyn_addr;
2618	struct i3c_ibi_setup ibireq = { };
2619	bool enable_ibi = false;
2620	bool no_dev = false;
2621	int ret;
2622
2623	newdev = i3c_master_alloc_i3c_dev(master, &info);
2624	if (IS_ERR(newdev)) {
2625	ret = PTR_ERR(newdev);
2626	goto err_prevent_addr_reuse;
2627	}
2628
2629	ret = i3c_master_attach_i3c_dev(master, newdev);
2630	if (ret)
2631	goto err_free_dev;
2632
2633	/*
2634	* When a dynamic address is first assigned, there is no need to check
2635	* whether it is still assigned, however, if adding the device fails,
2636	* it will be attempted again later, at which point the address may
2637	* have been lost (e.g. due to power management), so for that case,
2638	* probe to see if the device is still present at the assigned address.
2639	*/
2640	if (probe && !i3c_master_i3c_dev_present(master, addr)) {
2641	no_dev = true;
2642	goto err_detach_dev;
2643	}
2644
2645	ret = i3c_master_retrieve_dev_info(newdev);
2646	if (ret)
2647	goto err_detach_dev;
2648
2649	i3c_master_attach_boardinfo(newdev);
2650
2651	olddev = i3c_master_search_i3c_dev_duplicate(newdev);
2652	if (olddev) {
2653	newdev->dev = olddev->dev;
2654	if (newdev->dev)
2655	newdev->dev->desc = newdev;
2656
2657	/*
2658	* We need to restore the IBI state too, so let's save the
2659	* IBI information and try to restore them after olddev has
2660	* been detached+released and its IBI has been stopped and
2661	* the associated resources have been freed.
2662	*/
2663	mutex_lock(&olddev->ibi_lock);
2664	if (olddev->ibi) {
2665	ibireq.handler = olddev->ibi->handler;
2666	ibireq.max_payload_len = olddev->ibi->max_payload_len;
2667	ibireq.num_slots = olddev->ibi->num_slots;
2668
2669	if (olddev->ibi->enabled)
2670	enable_ibi = true;
2671	/*
2672	* The olddev should not receive any commands on the
2673	* i3c bus as it does not exist and has been assigned
2674	* a new address. This will result in NACK or timeout.
2675	* So, update the olddev->ibi->enabled flag to false
2676	* to avoid DISEC with OldAddr.
2677	*/
2678	olddev->ibi->enabled = false;
2679	i3c_dev_free_ibi_locked(olddev);
2680	}
2681	mutex_unlock(&olddev->ibi_lock);
2682
2683	old_dyn_addr = olddev->info.dyn_addr;
2684
2685	i3c_master_detach_i3c_dev(olddev);
2686	i3c_master_free_i3c_dev(olddev);
2687	}
2688
2689	/*
2690	* Depending on our previous state, the expected dynamic address might
2691	* differ:
2692	* - if the device already had a dynamic address assigned, let's try to
2693	* re-apply this one
2694	* - if the device did not have a dynamic address and the firmware
2695	* requested a specific address, pick this one
2696	* - in any other case, keep the address automatically assigned by the
2697	* master
2698	*/
2699	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2700	expected_dyn_addr = old_dyn_addr;
2701	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2702	expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2703	else
2704	expected_dyn_addr = newdev->info.dyn_addr;
2705
2706	if (newdev->info.dyn_addr != expected_dyn_addr &&
2707	i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) {
2708	/*
2709	* Try to apply the expected dynamic address. If it fails, keep
2710	* the address assigned by the master.
2711	*/
2712	ret = i3c_master_setnewda_locked(master,
2713	newdev->info.dyn_addr,
2714	expected_dyn_addr);
2715	if (!ret) {
2716	old_dyn_addr = newdev->info.dyn_addr;
2717	newdev->info.dyn_addr = expected_dyn_addr;
2718	i3c_master_reattach_i3c_dev_locked(newdev, old_dyn_addr);
2719	} else {
2720	dev_err(&master->dev,
2721	"Failed to assign reserved/old address to device %d%llx",
2722	master->bus.id, newdev->info.pid);
2723	}
2724	}
2725
2726	/*
2727	* Now is time to try to restore the IBI setup. If we're lucky,
2728	* everything works as before, otherwise, all we can do is complain.
2729	* FIXME: maybe we should add callback to inform the driver that it
2730	* should request the IBI again instead of trying to hide that from
2731	* him.
2732	*/
2733	if (ibireq.handler) {
2734	mutex_lock(&newdev->ibi_lock);
2735	ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2736	if (ret) {
2737	dev_err(&master->dev,
2738	"Failed to request IBI on device %d-%llx",
2739	master->bus.id, newdev->info.pid);
2740	} else if (enable_ibi) {
2741	ret = i3c_dev_enable_ibi_locked(newdev);
2742	if (ret)
2743	dev_err(&master->dev,
2744	"Failed to re-enable IBI on device %d-%llx",
2745	master->bus.id, newdev->info.pid);
2746	}
2747	mutex_unlock(&newdev->ibi_lock);
2748	}
2749
2750	return;
2751
2752	err_detach_dev:
2753	if (newdev->dev && newdev->dev->desc)
2754	newdev->dev->desc = NULL;
2755
2756	i3c_master_detach_i3c_dev(newdev);
2757
2758	err_free_dev:
2759	i3c_master_free_i3c_dev(newdev);
2760
2761	err_prevent_addr_reuse:
2762	if (no_dev)
2763	return;
2764	/*
2765	* Although the device has not been added, the address has been
2766	* assigned. Prevent the address from being used again.
2767	*/
2768	if (i3c_bus_get_addr_slot_status(&master->bus, addr) == I3C_ADDR_SLOT_FREE)
2769	i3c_bus_set_addr_slot_status(&master->bus, addr, I3C_ADDR_SLOT_I3C_DEV);
2770
2771	dev_err(&master->dev, "Failed to add I3C device at address %u, error %d\n", addr, ret);
2772	}
2773
2774	/**
2775	* i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
2776	* @master: master used to send frames on the bus
2777	* @addr: I3C slave dynamic address assigned to the device
2778	*
2779	* This function instantiates an I3C device object and adds it to the
2780	* I3C device list. All device information is automatically retrieved using
2781	* standard CCC commands.
2782	*
2783	* This function must be called with the bus lock held in write mode.
2784	*/
2785	void i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, u8 addr)
2786	{
2787	__i3c_master_add_i3c_dev_locked(master, addr, false);
2788	}
2789	EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2790
2791	static void i3c_master_reconcile_dyn_addrs(struct i3c_master_controller *master)
2792	{
2793	DECLARE_BITMAP(dev_dyn_addrs, I2C_MAX_ADDR + 1);
2794	enum i3c_addr_slot_status status;
2795	struct i3c_dev_desc *desc;
2796
2797	/* Mark all devices' dynamic and static addresses in the bitmap */
2798	bitmap_zero(dev_dyn_addrs, I2C_MAX_ADDR + 1);
2799	i3c_bus_for_each_i3cdev(&master->bus, desc) {
2800	if (desc->info.static_addr)
2801	__set_bit(desc->info.static_addr, dev_dyn_addrs);
2802	__set_bit(desc->info.dyn_addr, dev_dyn_addrs);
2803	}
2804	/* Reconcile the bitmap with the bus address slot status */
2805	for (unsigned int addr = 0; addr <= I2C_MAX_ADDR; addr++) {
2806	status = i3c_bus_get_addr_slot_status(&master->bus, addr);
2807	if (status != I3C_ADDR_SLOT_I3C_DEV \|\| test_bit(addr, dev_dyn_addrs))
2808	continue;
2809	i3c_bus_set_addr_slot_status(&master->bus, addr, I3C_ADDR_SLOT_FREE);
2810	/* Try to add the device, but probe to see if it is really present */
2811	__i3c_master_add_i3c_dev_locked(master, addr, true);
2812	}
2813	}
2814
2815	/**
2816	* i3c_master_do_daa_ext() - Dynamic Address Assignment (extended version)
2817	* @master: controller
2818	* @rstdaa: whether to first perform Reset of Dynamic Addresses (RSTDAA)
2819	*
2820	* Perform Dynamic Address Assignment with optional support for System
2821	* Hibernation (@rstdaa is true).
2822	*
2823	* After System Hibernation, Dynamic Addresses can have been reassigned at boot
2824	* time to different values. A simple strategy is followed to handle that.
2825	* Perform a Reset of Dynamic Addresses (RSTDAA) followed by the normal DAA
2826	* procedure which has provision for reassigning addresses that differ from the
2827	* previously recorded addresses.
2828	*
2829	* Return: a 0 in case of success, an negative error code otherwise.
2830	*/
2831	int i3c_master_do_daa_ext(struct i3c_master_controller *master, bool rstdaa)
2832	{
2833	int rstret = 0;
2834	int ret;
2835
2836	ret = i3c_master_rpm_get(master);
2837	if (ret)
2838	return ret;
2839
2840	i3c_bus_maintenance_lock(&master->bus);
2841
2842	if (master->shutting_down) {
2843	ret = -ENODEV;
2844	} else {
2845	if (rstdaa)
2846	rstret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
2847	ret = master->ops->do_daa(master);
2848	/*
2849	* Handle cases where a dynamic address was assigned but the
2850	* device was not successfully added.
2851	*/
2852	i3c_master_reconcile_dyn_addrs(master);
2853	}
2854
2855	i3c_bus_maintenance_unlock(&master->bus);
2856
2857	if (ret)
2858	goto out;
2859
2860	queue_work(master->wq, &master->reg_work);
2861	out:
2862	i3c_master_rpm_put(master);
2863
2864	return rstret ?: ret;
2865	}
2866	EXPORT_SYMBOL_GPL(i3c_master_do_daa_ext);
2867
2868	/**
2869	* i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
2870	* @master: master doing the DAA
2871	*
2872	* This function instantiates I3C device objects and adds them to the
2873	* I3C device list. All device information is automatically retrieved using
2874	* standard CCC commands.
2875	*
2876	* Return: a 0 in case of success, an negative error code otherwise.
2877	*/
2878	int i3c_master_do_daa(struct i3c_master_controller *master)
2879	{
2880	return i3c_master_do_daa_ext(master, false);
2881	}
2882	EXPORT_SYMBOL_GPL(i3c_master_do_daa);
2883
2884	#define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2885
2886	#ifdef CONFIG_ACPI
2887	static int i3c_acpi_get_i2c_resource(struct acpi_resource ares, void data)
2888	{
2889	struct i2c_dev_boardinfo *boardinfo = data;
2890	struct acpi_resource_i2c_serialbus *sb;
2891
2892	if (boardinfo->base.addr \|\| !i2c_acpi_get_i2c_resource(ares, &sb))
2893	return 1;
2894
2895	boardinfo->base.addr = sb->slave_address;
2896	if (sb->access_mode == ACPI_I2C_10BIT_MODE)
2897	boardinfo->base.flags \|= I2C_CLIENT_TEN;
2898
2899	boardinfo->lvr = sb->lvr;
2900
2901	return 1;
2902	}
2903
2904	static int i3c_acpi_add_i2c_boardinfo(struct i2c_dev_boardinfo *boardinfo,
2905	struct fwnode_handle *fwnode)
2906	{
2907	struct acpi_device *adev = to_acpi_device_node(fwnode);
2908	LIST_HEAD(resources);
2909	int ret;
2910
2911	boardinfo->base.fwnode = acpi_fwnode_handle(adev);
2912	acpi_set_modalias(adev, dev_name(&adev->dev), boardinfo->base.type,
2913	sizeof(boardinfo->base.type));
2914
2915	ret = acpi_dev_get_resources(adev, &resources,
2916	i3c_acpi_get_i2c_resource, boardinfo);
2917	if (ret < 0)
2918	return ret;
2919
2920	acpi_dev_free_resource_list(&resources);
2921
2922	if (!boardinfo->base.addr)
2923	return -ENODEV;
2924
2925	return 0;
2926	}
2927	#else
2928	static inline int i3c_acpi_add_i2c_boardinfo(struct i2c_dev_boardinfo *boardinfo,
2929	struct fwnode_handle *fwnode)
2930	{
2931	return -ENODEV;
2932	}
2933	#endif
2934
2935	static int
2936	i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2937	struct fwnode_handle fwnode, u32 reg)
2938	{
2939	struct i2c_dev_boardinfo *boardinfo;
2940	struct device *dev = &master->dev;
2941	int ret;
2942
2943	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2944	if (!boardinfo)
2945	return -ENOMEM;
2946
2947	if (is_of_node(fwnode)) {
2948	ret = of_i2c_get_board_info(dev, to_of_node(fwnode), &boardinfo->base);
2949	if (ret)
2950	return ret;
2951
2952	/* LVR is encoded in reg[2] for Device Tree. */
2953	boardinfo->lvr = reg[2];
2954	} else if (is_acpi_device_node(fwnode)) {
2955	ret = i3c_acpi_add_i2c_boardinfo(boardinfo, fwnode);
2956	if (ret) {
2957	devm_kfree(dev, boardinfo);
2958	return ret;
2959	}
2960	} else {
2961	return -EINVAL;
2962	}
2963
2964	/*
2965	* The I3C Specification does not clearly say I2C devices with 10-bit
2966	* address are supported. These devices can't be passed properly through
2967	* DEFSLVS command.
2968	*/
2969	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2970	dev_err(dev, "I2C device with 10 bit address not supported.\n");
2971	return -EOPNOTSUPP;
2972	}
2973
2974	list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2975	fwnode_handle_get(fwnode);
2976
2977	return 0;
2978	}
2979
2980	static int
2981	i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2982	struct fwnode_handle fwnode, u32 reg)
2983	{
2984	struct i3c_dev_boardinfo *boardinfo;
2985	struct device *dev = &master->dev;
2986	enum i3c_addr_slot_status addrstatus;
2987	u32 init_dyn_addr = 0, static_addr_method = 0;
2988
2989	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2990	if (!boardinfo)
2991	return -ENOMEM;
2992
2993	if (reg[0]) {
2994	if (reg[0] > I3C_MAX_ADDR)
2995	return -EINVAL;
2996
2997	addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2998	reg[0]);
2999	if (addrstatus != I3C_ADDR_SLOT_FREE)
3000	return -EINVAL;
3001	}
3002
3003	boardinfo->static_addr = reg[0];
3004
3005	if (!fwnode_property_read_u32(fwnode, "mipi-i3c-static-method", &static_addr_method))
3006	boardinfo->static_addr_method = static_addr_method &
3007	(I3C_ADDR_METHOD_SETDASA \| I3C_ADDR_METHOD_SETAASA);
3008
3009	if (!fwnode_property_read_u32(fwnode, "assigned-address", &init_dyn_addr)) {
3010	/*
3011	* When a device advertises both SETDASA and SETAASA, an explicit
3012	* dynamic address selects SETDASA (MIPI DISCO prefers it); drop
3013	* SETAASA so it is not used for this device.
3014	*/
3015	if (boardinfo->static_addr_method & I3C_ADDR_METHOD_SETDASA)
3016	boardinfo->static_addr_method &= ~I3C_ADDR_METHOD_SETAASA;
3017
3018	if (init_dyn_addr > I3C_MAX_ADDR)
3019	return -EINVAL;
3020
3021	addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
3022	init_dyn_addr);
3023	if (addrstatus != I3C_ADDR_SLOT_FREE)
3024	return -EINVAL;
3025	}
3026
3027	if (boardinfo->static_addr_method & I3C_ADDR_METHOD_SETAASA) {
3028	/* For SETAASA, static address is taken as the dynamic address. */
3029	init_dyn_addr = boardinfo->static_addr;
3030	}
3031
3032	/* Update the address methods required for device discovery */
3033	master->addr_method \|= boardinfo->static_addr_method;
3034
3035	boardinfo->pid = ((u64)reg[1] << 32) \| reg[2];
3036
3037	/* For SETAASA devices, validate the static address instead of PID */
3038	if (boardinfo->static_addr_method & I3C_ADDR_METHOD_SETAASA) {
3039	if (!boardinfo->static_addr)
3040	return -EINVAL;
3041	} else {
3042	if (!I3C_PID_MANUF_ID(boardinfo->pid) \|\|
3043	(boardinfo->pid & GENMASK_ULL(63, 48)) \|\|
3044	I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
3045	return -EINVAL;
3046	}
3047
3048	boardinfo->init_dyn_addr = init_dyn_addr;
3049	boardinfo->fwnode = fwnode_handle_get(fwnode);
3050	list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
3051
3052	return 0;
3053	}
3054
3055	static int i3c_master_add_of_dev(struct i3c_master_controller *master,
3056	struct fwnode_handle *fwnode)
3057	{
3058	u32 reg[3];
3059	int ret;
3060
3061	if (!master)
3062	return -EINVAL;
3063
3064	ret = fwnode_property_read_u32_array(fwnode, "reg", reg, ARRAY_SIZE(reg));
3065	if (ret)
3066	return ret;
3067
3068	/*
3069	* I3C device should have either the manufacturer ID specified or the
3070	* address discovery method specified. Else treat it as an I2C device.
3071	*/
3072	if (!reg[1] && !fwnode_property_present(fwnode, "mipi-i3c-static-method"))
3073	ret = i3c_master_add_i2c_boardinfo(master, fwnode, reg);
3074	else
3075	ret = i3c_master_add_i3c_boardinfo(master, fwnode, reg);
3076
3077	return ret;
3078	}
3079
3080	#ifdef CONFIG_ACPI
3081	static int i3c_master_add_acpi_dev(struct i3c_master_controller *master,
3082	struct fwnode_handle *fwnode)
3083	{
3084	struct acpi_device *adev = to_acpi_device_node(fwnode);
3085	acpi_bus_address adr;
3086	u32 reg[3] = { 0 };
3087	int ret;
3088
3089	/*
3090	* If the ACPI table entry has _ADR method, it's an I3C device.
3091	* Otherwise it may be an I2C device described by an I2cSerialBus
3092	* resource. If no I2cSerialBus resource is found, ignore the entry.
3093	*/
3094	if (!acpi_has_method(adev->handle, "_ADR")) {
3095	ret = i3c_master_add_i2c_boardinfo(master, fwnode, reg);
3096	if (ret == -ENODEV)
3097	return 0;
3098
3099	return ret;
3100	}
3101
3102	adr = acpi_device_adr(adev);
3103
3104	/* For I3C devices, _ADR will have the 48 bit PID of the device */
3105	reg[1] = upper_32_bits(adr);
3106	reg[2] = lower_32_bits(adr);
3107
3108	fwnode_property_read_u32(fwnode, "mipi-i3c-static-address", &reg[0]);
3109
3110	return i3c_master_add_i3c_boardinfo(master, fwnode, reg);
3111	}
3112
3113	static u8 i3c_acpi_i2c_get_lvr(struct i2c_client *client)
3114	{
3115	struct acpi_device *adev = to_acpi_device_node(client->dev.fwnode);
3116	struct i2c_dev_boardinfo boardinfo = {};
3117	LIST_HEAD(resources);
3118	int ret;
3119	u8 lvr;
3120
3121	lvr = I3C_LVR_I2C_INDEX(2) \| I3C_LVR_I2C_FM_MODE;
3122
3123	ret = acpi_dev_get_resources(adev, &resources,
3124	i3c_acpi_get_i2c_resource, &boardinfo);
3125	if (ret < 0)
3126	return lvr;
3127
3128	if (boardinfo.base.addr)
3129	lvr = boardinfo.lvr;
3130
3131	acpi_dev_free_resource_list(&resources);
3132
3133	return lvr;
3134	}
3135	#else
3136	static inline int i3c_master_add_acpi_dev(struct i3c_master_controller *master,
3137	struct fwnode_handle *fwnode)
3138	{
3139	return -ENODEV;
3140	}
3141
3142	static inline u8 i3c_acpi_i2c_get_lvr(struct i2c_client *client)
3143	{
3144	return I3C_LVR_I2C_INDEX(2) \| I3C_LVR_I2C_FM_MODE;
3145	}
3146	#endif
3147
3148	static int fwnode_populate_i3c_bus(struct i3c_master_controller *master)
3149	{
3150	struct device *dev = &master->dev;
3151	struct fwnode_handle *fwnode = dev_fwnode(dev);
3152	int ret;
3153	u32 val;
3154
3155	if (!fwnode)
3156	return 0;
3157
3158	fwnode_for_each_available_child_node_scoped(fwnode, child) {
3159	if (is_of_node(child))
3160	ret = i3c_master_add_of_dev(master, child);
3161	else if (is_acpi_device_node(child))
3162	ret = i3c_master_add_acpi_dev(master, child);
3163	else
3164	continue;
3165
3166	if (ret)
3167	return ret;
3168	}
3169
3170	/*
3171	* The user might want to limit I2C and I3C speed in case some devices
3172	* on the bus are not supporting typical rates, or if the bus topology
3173	* prevents it from using max possible rate.
3174	*/
3175	if (!device_property_read_u32(dev, "i2c-scl-hz", &val))
3176	master->bus.scl_rate.i2c = val;
3177
3178	if (!device_property_read_u32(dev, "i3c-scl-hz", &val))
3179	master->bus.scl_rate.i3c = val;
3180
3181	return 0;
3182	}
3183
3184	static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
3185	struct i2c_msg *xfers, int nxfers)
3186	{
3187	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
3188	struct i2c_dev_desc *dev;
3189	int i, ret;
3190	u16 addr;
3191
3192	if (!xfers \|\| !master \|\| nxfers <= 0)
3193	return -EINVAL;
3194
3195	if (!master->ops->i2c_xfers)
3196	return -EOPNOTSUPP;
3197
3198	/* Doing transfers to different devices is not supported. */
3199	addr = xfers[0].addr;
3200	for (i = 1; i < nxfers; i++) {
3201	if (addr != xfers[i].addr)
3202	return -EOPNOTSUPP;
3203	}
3204
3205	ret = i3c_master_rpm_get(master);
3206	if (ret)
3207	return ret;
3208
3209	i3c_bus_normaluse_lock(&master->bus);
3210	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
3211	if (!dev)
3212	ret = -ENOENT;
3213	else
3214	ret = master->ops->i2c_xfers(dev, xfers, nxfers);
3215	i3c_bus_normaluse_unlock(&master->bus);
3216
3217	i3c_master_rpm_put(master);
3218
3219	return ret ? ret : nxfers;
3220	}
3221
3222	static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
3223	{
3224	return I2C_FUNC_SMBUS_EMUL \| I2C_FUNC_I2C;
3225	}
3226
3227	static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
3228	{
3229	/* Fall back to no spike filters and FM bus mode. */
3230	u8 lvr = I3C_LVR_I2C_INDEX(2) \| I3C_LVR_I2C_FM_MODE;
3231	u32 reg[3];
3232
3233	if (is_of_node(client->dev.fwnode)) {
3234	if (!fwnode_property_read_u32_array(client->dev.fwnode, "reg",
3235	reg, ARRAY_SIZE(reg)))
3236	lvr = reg[2];
3237	} else if (is_acpi_device_node(client->dev.fwnode)) {
3238	lvr = i3c_acpi_i2c_get_lvr(client);
3239	}
3240
3241	return lvr;
3242	}
3243
3244	static int i3c_master_i2c_attach(struct i2c_adapter adap, struct i2c_client client)
3245	{
3246	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
3247	enum i3c_addr_slot_status status;
3248	struct i2c_dev_desc *i2cdev;
3249	int ret;
3250
3251	/* Already added by board info? */
3252	if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
3253	return 0;
3254
3255	status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
3256	if (status != I3C_ADDR_SLOT_FREE)
3257	return -EBUSY;
3258
3259	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
3260	I3C_ADDR_SLOT_I2C_DEV);
3261
3262	i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
3263	i3c_master_i2c_get_lvr(client));
3264	if (IS_ERR(i2cdev)) {
3265	ret = PTR_ERR(i2cdev);
3266	goto out_clear_status;
3267	}
3268
3269	ret = i3c_master_attach_i2c_dev(master, i2cdev);
3270	if (ret)
3271	goto out_free_dev;
3272
3273	return 0;
3274
3275	out_free_dev:
3276	i3c_master_free_i2c_dev(i2cdev);
3277	out_clear_status:
3278	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
3279	I3C_ADDR_SLOT_FREE);
3280
3281	return ret;
3282	}
3283
3284	static int i3c_master_i2c_detach(struct i2c_adapter adap, struct i2c_client client)
3285	{
3286	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
3287	struct i2c_dev_desc *dev;
3288
3289	dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
3290	if (!dev)
3291	return -ENODEV;
3292
3293	i3c_master_detach_i2c_dev(dev);
3294	i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
3295	I3C_ADDR_SLOT_FREE);
3296	i3c_master_free_i2c_dev(dev);
3297
3298	return 0;
3299	}
3300
3301	static const struct i2c_algorithm i3c_master_i2c_algo = {
3302	.master_xfer = i3c_master_i2c_adapter_xfer,
3303	.functionality = i3c_master_i2c_funcs,
3304	};
3305
3306	static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
3307	void *data)
3308	{
3309	struct i2c_adapter *adap;
3310	struct i2c_client *client;
3311	struct device *dev = data;
3312	struct i3c_master_controller *master;
3313	int ret;
3314
3315	if (dev->type != &i2c_client_type)
3316	return 0;
3317
3318	client = to_i2c_client(dev);
3319	adap = client->adapter;
3320
3321	if (adap->algo != &i3c_master_i2c_algo)
3322	return 0;
3323
3324	master = i2c_adapter_to_i3c_master(adap);
3325
3326	ret = i3c_master_rpm_get(master);
3327	if (ret)
3328	return ret;
3329
3330	i3c_bus_maintenance_lock(&master->bus);
3331	switch (action) {
3332	case BUS_NOTIFY_ADD_DEVICE:
3333	ret = i3c_master_i2c_attach(adap, client);
3334	break;
3335	case BUS_NOTIFY_DEL_DEVICE:
3336	ret = i3c_master_i2c_detach(adap, client);
3337	break;
3338	default:
3339	ret = -EINVAL;
3340	}
3341	i3c_bus_maintenance_unlock(&master->bus);
3342
3343	i3c_master_rpm_put(master);
3344
3345	return ret;
3346	}
3347
3348	static struct notifier_block i2cdev_notifier = {
3349	.notifier_call = i3c_i2c_notifier_call,
3350	};
3351
3352	static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
3353	{
3354	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
3355	struct i2c_dev_desc *i2cdev;
3356	struct i2c_dev_boardinfo *i2cboardinfo;
3357	struct fwnode_handle *fwnode = dev_fwnode(&master->dev);
3358	int ret, id = -1;
3359
3360	adap->dev.parent = master->dev.parent;
3361	adap->owner = master->dev.parent->driver->owner;
3362	adap->algo = &i3c_master_i2c_algo;
3363	strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
3364	adap->timeout = HZ;
3365	adap->retries = 3;
3366
3367	if (fwnode && is_of_node(fwnode))
3368	id = of_alias_get_id(to_of_node(fwnode), "i2c");
3369
3370	if (id >= 0) {
3371	adap->nr = id;
3372	ret = i2c_add_numbered_adapter(adap);
3373	} else {
3374	ret = i2c_add_adapter(adap);
3375	}
3376	if (ret)
3377	return ret;
3378
3379	/*
3380	* We silently ignore failures here. The bus should keep working
3381	* correctly even if one or more i2c devices are not registered.
3382	*/
3383	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
3384	i2cdev = i3c_master_find_i2c_dev_by_addr(master,
3385	i2cboardinfo->base.addr);
3386	if (WARN_ON(!i2cdev))
3387	continue;
3388	i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
3389	}
3390
3391	return 0;
3392	}
3393
3394	static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
3395	{
3396	struct i2c_dev_desc *i2cdev;
3397
3398	i2c_del_adapter(&master->i2c);
3399
3400	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
3401	i2cdev->dev = NULL;
3402	}
3403
3404	static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
3405	{
3406	struct i3c_dev_desc *i3cdev;
3407
3408	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
3409	if (!i3cdev->dev)
3410	continue;
3411
3412	if (device_is_registered(&i3cdev->dev->dev)) {
3413	get_device(&i3cdev->dev->dev);
3414	device_unregister(&i3cdev->dev->dev);
3415	}
3416	i3cdev->dev->desc = NULL;
3417	put_device(&i3cdev->dev->dev);
3418	i3cdev->dev = NULL;
3419	}
3420	}
3421
3422	/* Approximate time for IBI handler to run */
3423	#define I3C_WAKEUP_PROCESSING_TIME_MS 100
3424
3425	/**
3426	* i3c_master_queue_ibi() - Queue an IBI
3427	* @dev: the device this IBI is coming from
3428	* @slot: the IBI slot used to store the payload
3429	*
3430	* Queue an IBI to the controller workqueue. The IBI handler attached to
3431	* the dev will be called from a workqueue context.
3432	*/
3433	void i3c_master_queue_ibi(struct i3c_dev_desc dev, struct i3c_ibi_slot slot)
3434	{
3435	if (!dev->ibi \|\| !slot)
3436	return;
3437
3438	if (device_may_wakeup(&dev->dev->dev))
3439	pm_wakeup_event(&dev->dev->dev, I3C_WAKEUP_PROCESSING_TIME_MS);
3440
3441	atomic_inc(&dev->ibi->pending_ibis);
3442	queue_work(dev->ibi->wq, &slot->work);
3443	}
3444	EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
3445
3446	static void i3c_master_handle_ibi(struct work_struct *work)
3447	{
3448	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
3449	work);
3450	struct i3c_dev_desc *dev = slot->dev;
3451	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3452	struct i3c_ibi_payload payload;
3453
3454	payload.data = slot->data;
3455	payload.len = slot->len;
3456
3457	if (dev->dev)
3458	dev->ibi->handler(dev->dev, &payload);
3459
3460	master->ops->recycle_ibi_slot(dev, slot);
3461	if (atomic_dec_and_test(&dev->ibi->pending_ibis))
3462	complete(&dev->ibi->all_ibis_handled);
3463	}
3464
3465	static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
3466	struct i3c_ibi_slot *slot)
3467	{
3468	slot->dev = dev;
3469	INIT_WORK(&slot->work, i3c_master_handle_ibi);
3470	}
3471
3472	struct i3c_generic_ibi_slot {
3473	struct list_head node;
3474	struct i3c_ibi_slot base;
3475	};
3476
3477	struct i3c_generic_ibi_pool {
3478	spinlock_t lock;
3479	unsigned int num_slots;
3480	void *payload_buf;
3481	struct list_head free_slots;
3482	struct list_head pending;
3483	struct i3c_generic_ibi_slot slots[] __counted_by(num_slots);
3484	};
3485
3486	/**
3487	* i3c_generic_ibi_free_pool() - Free a generic IBI pool
3488	* @pool: the IBI pool to free
3489	*
3490	* Free all IBI slots allated by a generic IBI pool.
3491	*/
3492	void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
3493	{
3494	struct i3c_generic_ibi_slot *slot;
3495	unsigned int nslots = 0;
3496
3497	while (!list_empty(&pool->free_slots)) {
3498	slot = list_first_entry(&pool->free_slots,
3499	struct i3c_generic_ibi_slot, node);
3500	list_del(&slot->node);
3501	nslots++;
3502	}
3503
3504	/*
3505	* If the number of freed slots is not equal to the number of allocated
3506	* slots we have a leak somewhere.
3507	*/
3508	WARN_ON(nslots != pool->num_slots);
3509
3510	kfree(pool->payload_buf);
3511	kfree(pool);
3512	}
3513	EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
3514
3515	/**
3516	* i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
3517	* @dev: the device this pool will be used for
3518	* @req: IBI setup request describing what the device driver expects
3519	*
3520	* Create a generic IBI pool based on the information provided in @req.
3521	*
3522	* Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
3523	*/
3524	struct i3c_generic_ibi_pool *
3525	i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
3526	const struct i3c_ibi_setup *req)
3527	{
3528	struct i3c_generic_ibi_pool *pool;
3529	struct i3c_generic_ibi_slot *slot;
3530	unsigned int i;
3531	int ret;
3532
3533	pool = kzalloc_flex(*pool, slots, req->num_slots);
3534	if (!pool)
3535	return ERR_PTR(-ENOMEM);
3536
3537	pool->num_slots = req->num_slots;
3538
3539	spin_lock_init(&pool->lock);
3540	INIT_LIST_HEAD(&pool->free_slots);
3541	INIT_LIST_HEAD(&pool->pending);
3542
3543	if (req->max_payload_len) {
3544	pool->payload_buf = kcalloc(req->num_slots,
3545	req->max_payload_len, GFP_KERNEL);
3546	if (!pool->payload_buf) {
3547	ret = -ENOMEM;
3548	goto err_free_pool;
3549	}
3550	}
3551
3552	for (i = 0; i < req->num_slots; i++) {
3553	slot = &pool->slots[i];
3554	i3c_master_init_ibi_slot(dev, &slot->base);
3555
3556	if (req->max_payload_len)
3557	slot->base.data = pool->payload_buf +
3558	(i * req->max_payload_len);
3559
3560	list_add_tail(&slot->node, &pool->free_slots);
3561	}
3562
3563	return pool;
3564
3565	err_free_pool:
3566	i3c_generic_ibi_free_pool(pool);
3567	return ERR_PTR(ret);
3568	}
3569	EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
3570
3571	/**
3572	* i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
3573	* @pool: the pool to query an IBI slot on
3574	*
3575	* Search for a free slot in a generic IBI pool.
3576	* The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
3577	* when it's no longer needed.
3578	*
3579	* Return: a pointer to a free slot, or NULL if there's no free slot available.
3580	*/
3581	struct i3c_ibi_slot *
3582	i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
3583	{
3584	struct i3c_generic_ibi_slot *slot;
3585	unsigned long flags;
3586
3587	spin_lock_irqsave(&pool->lock, flags);
3588	slot = list_first_entry_or_null(&pool->free_slots,
3589	struct i3c_generic_ibi_slot, node);
3590	if (slot)
3591	list_del(&slot->node);
3592	spin_unlock_irqrestore(&pool->lock, flags);
3593
3594	return slot ? &slot->base : NULL;
3595	}
3596	EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
3597
3598	/**
3599	* i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
3600	* @pool: the pool to return the IBI slot to
3601	* @s: IBI slot to recycle
3602	*
3603	* Add an IBI slot back to its generic IBI pool. Should be called from the
3604	* master driver struct_master_controller_ops->recycle_ibi() method.
3605	*/
3606	void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
3607	struct i3c_ibi_slot *s)
3608	{
3609	struct i3c_generic_ibi_slot *slot;
3610	unsigned long flags;
3611
3612	if (!s)
3613	return;
3614
3615	slot = container_of(s, struct i3c_generic_ibi_slot, base);
3616	spin_lock_irqsave(&pool->lock, flags);
3617	list_add_tail(&slot->node, &pool->free_slots);
3618	spin_unlock_irqrestore(&pool->lock, flags);
3619	}
3620	EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
3621
3622	static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
3623	{
3624	if (!ops \|\| !ops->bus_init \|\| !ops->i3c_xfers \|\|
3625	!ops->send_ccc_cmd \|\| !ops->do_daa \|\| !ops->i2c_xfers)
3626	return -EINVAL;
3627
3628	if (ops->request_ibi &&
3629	(!ops->enable_ibi \|\| !ops->disable_ibi \|\| !ops->free_ibi \|\|
3630	!ops->recycle_ibi_slot))
3631	return -EINVAL;
3632
3633	return 0;
3634	}
3635
3636	/**
3637	* i3c_master_register() - register an I3C master
3638	* @master: master used to send frames on the bus
3639	* @parent: the parent device (the one that provides this I3C master
3640	* controller)
3641	* @ops: the master controller operations
3642	* @secondary: true if you are registering a secondary master. Will return
3643	* -EOPNOTSUPP if set to true since secondary masters are not yet
3644	* supported
3645	*
3646	* This function takes care of everything for you:
3647	*
3648	* - creates and initializes the I3C bus
3649	* - populates the bus with static I2C devs if @parent->of_node is not
3650	* NULL
3651	* - registers all I3C devices added by the controller during bus
3652	* initialization
3653	* - registers the I2C adapter and all I2C devices
3654	*
3655	* Return: 0 in case of success, a negative error code otherwise.
3656	*/
3657	int i3c_master_register(struct i3c_master_controller *master,
3658	struct device *parent,
3659	const struct i3c_master_controller_ops *ops,
3660	bool secondary)
3661	{
3662	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE;
3663	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
3664	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
3665	struct i2c_dev_boardinfo *i2cbi;
3666	int ret;
3667
3668	/* We do not support secondary masters yet. */
3669	if (secondary)
3670	return -EOPNOTSUPP;
3671
3672	ret = i3c_master_check_ops(ops);
3673	if (ret)
3674	return ret;
3675
3676	master->dev.parent = parent;
3677	device_set_node(&master->dev, fwnode_handle_get(dev_fwnode(parent)));
3678	master->dev.bus = &i3c_bus_type;
3679	master->dev.type = &i3c_masterdev_type;
3680	master->dev.release = i3c_masterdev_release;
3681	master->ops = ops;
3682	master->secondary = secondary;
3683	master->addr_method = I3C_ADDR_METHOD_SETDASA;
3684	INIT_LIST_HEAD(&master->boardinfo.i2c);
3685	INIT_LIST_HEAD(&master->boardinfo.i3c);
3686
3687	ret = i3c_master_rpm_get(master);
3688	if (ret)
3689	return ret;
3690
3691	device_initialize(&master->dev);
3692
3693	master->dev.dma_mask = parent->dma_mask;
3694	master->dev.coherent_dma_mask = parent->coherent_dma_mask;
3695	master->dev.dma_parms = parent->dma_parms;
3696
3697	ret = i3c_bus_init(i3cbus, dev_fwnode(&master->dev));
3698	if (ret)
3699	goto err_put_dev;
3700
3701	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
3702
3703	ret = fwnode_populate_i3c_bus(master);
3704	if (ret)
3705	goto err_put_dev;
3706
3707	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
3708	switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
3709	case I3C_LVR_I2C_INDEX(0):
3710	if (mode < I3C_BUS_MODE_MIXED_FAST)
3711	mode = I3C_BUS_MODE_MIXED_FAST;
3712	break;
3713	case I3C_LVR_I2C_INDEX(1):
3714	if (mode < I3C_BUS_MODE_MIXED_LIMITED)
3715	mode = I3C_BUS_MODE_MIXED_LIMITED;
3716	break;
3717	case I3C_LVR_I2C_INDEX(2):
3718	if (mode < I3C_BUS_MODE_MIXED_SLOW)
3719	mode = I3C_BUS_MODE_MIXED_SLOW;
3720	break;
3721	default:
3722	ret = -EINVAL;
3723	goto err_put_dev;
3724	}
3725
3726	if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
3727	i2c_scl_rate = I3C_BUS_I2C_FM_SCL_MAX_RATE;
3728	}
3729
3730	ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
3731	if (ret)
3732	goto err_put_dev;
3733
3734	master->wq = alloc_workqueue("%s", WQ_PERCPU \| WQ_FREEZABLE, 0, dev_name(parent));
3735	if (!master->wq) {
3736	ret = -ENOMEM;
3737	goto err_put_dev;
3738	}
3739	INIT_WORK(&master->hj_work, i3c_master_hj_work_fn);
3740	INIT_WORK(&master->reg_work, i3c_master_reg_work_fn);
3741
3742	ret = i3c_master_bus_init(master);
3743	if (ret)
3744	goto err_put_dev;
3745
3746	ret = device_add(&master->dev);
3747	if (ret)
3748	goto err_cleanup_bus;
3749
3750	/*
3751	* Expose our I3C bus as an I2C adapter so that I2C devices are exposed
3752	* through the I2C subsystem.
3753	*/
3754	ret = i3c_master_i2c_adapter_init(master);
3755	if (ret)
3756	goto err_del_dev;
3757
3758	i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
3759
3760	pm_runtime_no_callbacks(&master->dev);
3761	pm_suspend_ignore_children(&master->dev, true);
3762	pm_runtime_enable(&master->dev);
3763
3764	/*
3765	* We're done initializing the bus and the controller, we can now
3766	* register I3C devices discovered during the initial DAA. Device
3767	* registration is done via reg_work because that keeps a single
3768	* registration code path and ensures the worker is the only writer
3769	* of desc->dev. Flush the work to preserve synchronous probe-time
3770	* behavior.
3771	*/
3772	master->init_done = true;
3773	queue_work(master->wq, &master->reg_work);
3774	flush_work(&master->reg_work);
3775
3776	if (master->ops->set_dev_nack_retry)
3777	device_create_file(&master->dev, &dev_attr_dev_nack_retry_count);
3778
3779	i3c_master_rpm_put(master);
3780
3781	return 0;
3782
3783	err_del_dev:
3784	device_del(&master->dev);
3785
3786	err_cleanup_bus:
3787	i3c_master_bus_cleanup(master);
3788
3789	err_put_dev:
3790	i3c_master_rpm_put(master);
3791	put_device(&master->dev);
3792
3793	return ret;
3794	}
3795	EXPORT_SYMBOL_GPL(i3c_master_register);
3796
3797	/**
3798	* i3c_master_unregister() - unregister an I3C master
3799	* @master: master used to send frames on the bus
3800	*
3801	* Basically undo everything done in i3c_master_register().
3802	*/
3803	void i3c_master_unregister(struct i3c_master_controller *master)
3804	{
3805	i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
3806	i3c_master_shutdown(master);
3807
3808	if (master->ops->set_dev_nack_retry)
3809	device_remove_file(&master->dev, &dev_attr_dev_nack_retry_count);
3810
3811	i3c_master_i2c_adapter_cleanup(master);
3812	i3c_master_unregister_i3c_devs(master);
3813	i3c_master_bus_cleanup(master);
3814	pm_runtime_disable(&master->dev);
3815	device_unregister(&master->dev);
3816	}
3817	EXPORT_SYMBOL_GPL(i3c_master_unregister);
3818
3819	int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
3820	{
3821	struct i3c_master_controller *master;
3822
3823	if (!dev)
3824	return -ENOENT;
3825
3826	master = i3c_dev_get_master(dev);
3827	if (!master)
3828	return -EINVAL;
3829
3830	if (!dev->boardinfo \|\| !dev->boardinfo->init_dyn_addr \|\|
3831	!dev->boardinfo->static_addr)
3832	return -EINVAL;
3833
3834	return i3c_master_setdasa_locked(master, dev->info.static_addr,
3835	dev->boardinfo->init_dyn_addr);
3836	}
3837
3838	int i3c_dev_do_xfers_locked(struct i3c_dev_desc dev, struct i3c_xfer xfers,
3839	int nxfers, enum i3c_xfer_mode mode)
3840	{
3841	struct i3c_master_controller *master;
3842
3843	if (!dev)
3844	return -ENOENT;
3845
3846	master = i3c_dev_get_master(dev);
3847	if (!master \|\| !xfers)
3848	return -EINVAL;
3849
3850	if (mode != I3C_SDR && !(master->this->info.hdr_cap & BIT(mode)))
3851	return -EOPNOTSUPP;
3852
3853	return master->ops->i3c_xfers(dev, xfers, nxfers, mode);
3854	}
3855
3856	/**
3857	* i3c_dev_disable_ibi_locked() - Disable IBIs coming from a specific device
3858	* @dev: device on which IBIs should be disabled
3859	*
3860	* This function disable IBIs coming from a specific device and wait for
3861	* all pending IBIs to be processed.
3862	*
3863	* Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held.
3864	* Return: 0 in case of success, a negative error core otherwise.
3865	*/
3866	int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
3867	{
3868	struct i3c_master_controller *master;
3869	int ret;
3870
3871	if (!dev->ibi)
3872	return -EINVAL;
3873
3874	master = i3c_dev_get_master(dev);
3875	ret = master->ops->disable_ibi(dev);
3876	if (ret)
3877	return ret;
3878
3879	reinit_completion(&dev->ibi->all_ibis_handled);
3880	if (atomic_read(&dev->ibi->pending_ibis))
3881	wait_for_completion(&dev->ibi->all_ibis_handled);
3882
3883	dev->ibi->enabled = false;
3884
3885	return 0;
3886	}
3887	EXPORT_SYMBOL_GPL(i3c_dev_disable_ibi_locked);
3888
3889	/**
3890	* i3c_dev_enable_ibi_locked() - Enable IBIs from a specific device (lock held)
3891	* @dev: device on which IBIs should be enabled
3892	*
3893	* This function enable IBIs coming from a specific device and wait for
3894	* all pending IBIs to be processed. This should be called on a device
3895	* where i3c_device_request_ibi() has succeeded.
3896	*
3897	* Note that IBIs from this device might be received before this function
3898	* returns to its caller.
3899	*
3900	* Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held.
3901	* Return: 0 on success, or a negative error code on failure.
3902	*/
3903	int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
3904	{
3905	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3906	int ret;
3907
3908	if (!dev->ibi)
3909	return -EINVAL;
3910
3911	ret = master->ops->enable_ibi(dev);
3912	if (!ret)
3913	dev->ibi->enabled = true;
3914
3915	return ret;
3916	}
3917	EXPORT_SYMBOL_GPL(i3c_dev_enable_ibi_locked);
3918
3919	/**
3920	* i3c_dev_request_ibi_locked() - Request an IBI
3921	* @dev: device for which we should enable IBIs
3922	* @req: setup requested for this IBI
3923	*
3924	* This function is responsible for pre-allocating all resources needed to
3925	* process IBIs coming from @dev. When this function returns, the IBI is not
3926	* enabled until i3c_device_enable_ibi() is called.
3927	*
3928	* Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held.
3929	* Return: 0 in case of success, a negative error core otherwise.
3930	*/
3931	int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
3932	const struct i3c_ibi_setup *req)
3933	{
3934	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3935	struct i3c_device_ibi_info *ibi;
3936	int ret;
3937
3938	if (!master->ops->request_ibi)
3939	return -EOPNOTSUPP;
3940
3941	if (dev->ibi)
3942	return -EBUSY;
3943
3944	ibi = kzalloc_obj(*ibi);
3945	if (!ibi)
3946	return -ENOMEM;
3947
3948	ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
3949	if (!ibi->wq) {
3950	kfree(ibi);
3951	return -ENOMEM;
3952	}
3953
3954	atomic_set(&ibi->pending_ibis, 0);
3955	init_completion(&ibi->all_ibis_handled);
3956	ibi->handler = req->handler;
3957	ibi->max_payload_len = req->max_payload_len;
3958	ibi->num_slots = req->num_slots;
3959
3960	dev->ibi = ibi;
3961	ret = master->ops->request_ibi(dev, req);
3962	if (ret) {
3963	kfree(ibi);
3964	dev->ibi = NULL;
3965	}
3966
3967	return ret;
3968	}
3969	EXPORT_SYMBOL_GPL(i3c_dev_request_ibi_locked);
3970
3971	/**
3972	* i3c_dev_free_ibi_locked() - Free all resources needed for IBI handling
3973	* @dev: device on which you want to release IBI resources
3974	*
3975	* This function is responsible for de-allocating resources previously
3976	* allocated by i3c_device_request_ibi(). It should be called after disabling
3977	* IBIs with i3c_device_disable_ibi().
3978	*
3979	* Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held.
3980	*/
3981	void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
3982	{
3983	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3984
3985	if (!dev->ibi)
3986	return;
3987
3988	if (dev->ibi->enabled) {
3989	int ret;
3990
3991	dev_err(&master->dev, "Freeing IBI that is still enabled\n");
3992	ret = i3c_master_rpm_get(master);
3993	if (!ret) {
3994	ret = i3c_dev_disable_ibi_locked(dev);
3995	i3c_master_rpm_put(master);
3996	}
3997	if (ret)
3998	dev_err(&master->dev, "Failed to disable IBI before freeing\n");
3999	}
4000
4001	master->ops->free_ibi(dev);
4002
4003	if (dev->ibi->wq) {
4004	destroy_workqueue(dev->ibi->wq);
4005	dev->ibi->wq = NULL;
4006	}
4007
4008	kfree(dev->ibi);
4009	dev->ibi = NULL;
4010	}
4011	EXPORT_SYMBOL_GPL(i3c_dev_free_ibi_locked);
4012
4013	static int __init i3c_init(void)
4014	{
4015	int res;
4016
4017	res = of_alias_get_highest_id("i3c");
4018	if (res >= 0) {
4019	mutex_lock(&i3c_core_lock);
4020	__i3c_first_dynamic_bus_num = res + 1;
4021	mutex_unlock(&i3c_core_lock);
4022	}
4023
4024	res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
4025	if (res)
4026	return res;
4027
4028	res = bus_register(&i3c_bus_type);
4029	if (res)
4030	goto out_unreg_notifier;
4031
4032	return 0;
4033
4034	out_unreg_notifier:
4035	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
4036
4037	return res;
4038	}
4039	subsys_initcall(i3c_init);
4040
4041	static void __exit i3c_exit(void)
4042	{
4043	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
4044	idr_destroy(&i3c_bus_idr);
4045	bus_unregister(&i3c_bus_type);
4046	}
4047	module_exit(i3c_exit);
4048
4049	MODULE_AUTHOR("Boris Brezillon <[email protected]>");
4050	MODULE_DESCRIPTION("I3C core");
4051	MODULE_LICENSE("GPL v2");