| 1 | |
| 2 | |
| 3 | * Copyright (C) 2015 Broadcom Corporation
|
| 4 | *
|
| 5 |
|
| 6 | #include <linux/module.h>
|
| 7 | #include <linux/init.h>
|
| 8 | #include <linux/input.h>
|
| 9 | #include <linux/delay.h>
|
| 10 | #include <linux/interrupt.h>
|
| 11 | #include <linux/keyboard.h>
|
| 12 | #include <linux/platform_device.h>
|
| 13 | #include <linux/slab.h>
|
| 14 | #include <linux/of.h>
|
| 15 | #include <asm/irq.h>
|
| 16 | #include <linux/io.h>
|
| 17 | #include <linux/clk.h>
|
| 18 | #include <linux/serio.h>
|
| 19 | #include <linux/mfd/syscon.h>
|
| 20 | #include <linux/regmap.h>
|
| 21 |
|
| 22 | #define IPROC_TS_NAME "iproc-ts"
|
| 23 |
|
| 24 | #define PEN_DOWN_STATUS 1
|
| 25 | #define PEN_UP_STATUS 0
|
| 26 |
|
| 27 | #define X_MIN 0
|
| 28 | #define Y_MIN 0
|
| 29 | #define X_MAX 0xFFF
|
| 30 | #define Y_MAX 0xFFF
|
| 31 |
|
| 32 |
|
| 33 | #define INVALID_COORD 0xFFFFFFFF
|
| 34 |
|
| 35 |
|
| 36 | #define REGCTL1 0x00
|
| 37 | #define REGCTL2 0x04
|
| 38 | #define INTERRUPT_THRES 0x08
|
| 39 | #define INTERRUPT_MASK 0x0c
|
| 40 |
|
| 41 | #define INTERRUPT_STATUS 0x10
|
| 42 | #define CONTROLLER_STATUS 0x14
|
| 43 | #define FIFO_DATA 0x18
|
| 44 | #define FIFO_DATA_X_Y_MASK 0xFFFF
|
| 45 | #define ANALOG_CONTROL 0x1c
|
| 46 |
|
| 47 | #define AUX_DATA 0x20
|
| 48 | #define DEBOUNCE_CNTR_STAT 0x24
|
| 49 | #define SCAN_CNTR_STAT 0x28
|
| 50 | #define REM_CNTR_STAT 0x2c
|
| 51 |
|
| 52 | #define SETTLING_TIMER_STAT 0x30
|
| 53 | #define SPARE_REG 0x34
|
| 54 | #define SOFT_BYPASS_CONTROL 0x38
|
| 55 | #define SOFT_BYPASS_DATA 0x3c
|
| 56 |
|
| 57 |
|
| 58 |
|
| 59 | #define TS_PEN_INTR_MASK BIT(0)
|
| 60 | #define TS_FIFO_INTR_MASK BIT(2)
|
| 61 |
|
| 62 |
|
| 63 | #define TS_PEN_DOWN BIT(0)
|
| 64 |
|
| 65 |
|
| 66 | #define SCANNING_PERIOD_SHIFT 24
|
| 67 | #define DEBOUNCE_TIMEOUT_SHIFT 16
|
| 68 | #define SETTLING_TIMEOUT_SHIFT 8
|
| 69 | #define TOUCH_TIMEOUT_SHIFT 0
|
| 70 |
|
| 71 |
|
| 72 | #define X_COORD_SHIFT 0
|
| 73 | #define Y_COORD_SHIFT 16
|
| 74 |
|
| 75 |
|
| 76 | #define TS_CONTROLLER_EN_BIT BIT(16)
|
| 77 | #define TS_CONTROLLER_AVGDATA_SHIFT 8
|
| 78 | #define TS_CONTROLLER_AVGDATA_MASK (0x7 << TS_CONTROLLER_AVGDATA_SHIFT)
|
| 79 | #define TS_CONTROLLER_PWR_LDO BIT(5)
|
| 80 | #define TS_CONTROLLER_PWR_ADC BIT(4)
|
| 81 | #define TS_CONTROLLER_PWR_BGP BIT(3)
|
| 82 | #define TS_CONTROLLER_PWR_TS BIT(2)
|
| 83 | #define TS_WIRE_MODE_BIT BIT(1)
|
| 84 |
|
| 85 | #define dbg_reg(dev, priv, reg) \
|
| 86 | do { \
|
| 87 | u32 val; \
|
| 88 | regmap_read(priv->regmap, reg, &val); \
|
| 89 | dev_dbg(dev, "%20s= 0x%08x\n", #reg, val); \
|
| 90 | } while (0)
|
| 91 |
|
| 92 | struct tsc_param {
|
| 93 |
|
| 94 | u32 scanning_period;
|
| 95 |
|
| 96 |
|
| 97 | u32 debounce_timeout;
|
| 98 |
|
| 99 | |
| 100 | * The settling duration (in ms) is the amount of time the tsc
|
| 101 | * waits to allow the voltage to settle after turning on the
|
| 102 | * drivers in detection mode. Valid values: 0-11
|
| 103 | * 0 = 0.008 ms
|
| 104 | * 1 = 0.01 ms
|
| 105 | * 2 = 0.02 ms
|
| 106 | * 3 = 0.04 ms
|
| 107 | * 4 = 0.08 ms
|
| 108 | * 5 = 0.16 ms
|
| 109 | * 6 = 0.32 ms
|
| 110 | * 7 = 0.64 ms
|
| 111 | * 8 = 1.28 ms
|
| 112 | * 9 = 2.56 ms
|
| 113 | * 10 = 5.12 ms
|
| 114 | * 11 = 10.24 ms
|
| 115 |
|
| 116 | u32 settling_timeout;
|
| 117 |
|
| 118 |
|
| 119 | u32 touch_timeout;
|
| 120 |
|
| 121 | |
| 122 | * Number of data samples which are averaged before a final data point
|
| 123 | * is placed into the FIFO
|
| 124 |
|
| 125 | u32 average_data;
|
| 126 |
|
| 127 |
|
| 128 | u32 fifo_threshold;
|
| 129 |
|
| 130 |
|
| 131 | u32 max_x;
|
| 132 | u32 max_y;
|
| 133 | u32 fuzz_x;
|
| 134 | u32 fuzz_y;
|
| 135 | bool invert_x;
|
| 136 | bool invert_y;
|
| 137 | };
|
| 138 |
|
| 139 | struct iproc_ts_priv {
|
| 140 | struct platform_device *pdev;
|
| 141 | struct input_dev *idev;
|
| 142 |
|
| 143 | struct regmap *regmap;
|
| 144 | struct clk *tsc_clk;
|
| 145 |
|
| 146 | int pen_status;
|
| 147 | struct tsc_param cfg_params;
|
| 148 | };
|
| 149 |
|
| 150 | |
| 151 | * Set default values the same as hardware reset values
|
| 152 | * except for fifo_threshold with is set to 1.
|
| 153 |
|
| 154 | static const struct tsc_param iproc_default_config = {
|
| 155 | .scanning_period = 0x5,
|
| 156 | .debounce_timeout = 0x28,
|
| 157 | .settling_timeout = 0x7,
|
| 158 | .touch_timeout = 0xa,
|
| 159 | .average_data = 5,
|
| 160 | .fifo_threshold = 1,
|
| 161 | .max_x = X_MAX,
|
| 162 | .max_y = Y_MAX,
|
| 163 | };
|
| 164 |
|
| 165 | static void ts_reg_dump(struct iproc_ts_priv *priv)
|
| 166 | {
|
| 167 | struct device *dev = &priv->pdev->dev;
|
| 168 |
|
| 169 | dbg_reg(dev, priv, REGCTL1);
|
| 170 | dbg_reg(dev, priv, REGCTL2);
|
| 171 | dbg_reg(dev, priv, INTERRUPT_THRES);
|
| 172 | dbg_reg(dev, priv, INTERRUPT_MASK);
|
| 173 | dbg_reg(dev, priv, INTERRUPT_STATUS);
|
| 174 | dbg_reg(dev, priv, CONTROLLER_STATUS);
|
| 175 | dbg_reg(dev, priv, FIFO_DATA);
|
| 176 | dbg_reg(dev, priv, ANALOG_CONTROL);
|
| 177 | dbg_reg(dev, priv, AUX_DATA);
|
| 178 | dbg_reg(dev, priv, DEBOUNCE_CNTR_STAT);
|
| 179 | dbg_reg(dev, priv, SCAN_CNTR_STAT);
|
| 180 | dbg_reg(dev, priv, REM_CNTR_STAT);
|
| 181 | dbg_reg(dev, priv, SETTLING_TIMER_STAT);
|
| 182 | dbg_reg(dev, priv, SPARE_REG);
|
| 183 | dbg_reg(dev, priv, SOFT_BYPASS_CONTROL);
|
| 184 | dbg_reg(dev, priv, SOFT_BYPASS_DATA);
|
| 185 | }
|
| 186 |
|
| 187 | static irqreturn_t iproc_touchscreen_interrupt(int irq, void *data)
|
| 188 | {
|
| 189 | struct platform_device *pdev = data;
|
| 190 | struct iproc_ts_priv *priv = platform_get_drvdata(pdev);
|
| 191 | u32 intr_status;
|
| 192 | u32 raw_coordinate;
|
| 193 | u16 x;
|
| 194 | u16 y;
|
| 195 | int i;
|
| 196 | bool needs_sync = false;
|
| 197 |
|
| 198 | regmap_read(priv->regmap, INTERRUPT_STATUS, &intr_status);
|
| 199 | intr_status &= TS_PEN_INTR_MASK | TS_FIFO_INTR_MASK;
|
| 200 | if (intr_status == 0)
|
| 201 | return IRQ_NONE;
|
| 202 |
|
| 203 |
|
| 204 | regmap_write(priv->regmap, INTERRUPT_STATUS, intr_status);
|
| 205 |
|
| 206 | if (intr_status & TS_PEN_INTR_MASK) {
|
| 207 | regmap_read(priv->regmap, CONTROLLER_STATUS, &priv->pen_status);
|
| 208 | if (priv->pen_status & TS_PEN_DOWN)
|
| 209 | priv->pen_status = PEN_DOWN_STATUS;
|
| 210 | else
|
| 211 | priv->pen_status = PEN_UP_STATUS;
|
| 212 |
|
| 213 | input_report_key(priv->idev, BTN_TOUCH, priv->pen_status);
|
| 214 | needs_sync = true;
|
| 215 |
|
| 216 | dev_dbg(&priv->pdev->dev,
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| 217 | "pen up-down (%d)\n", priv->pen_status);
|
| 218 | }
|
| 219 |
|
| 220 |
|
| 221 | if (intr_status & TS_FIFO_INTR_MASK) {
|
| 222 | for (i = 0; i < priv->cfg_params.fifo_threshold; i++) {
|
| 223 | regmap_read(priv->regmap, FIFO_DATA, &raw_coordinate);
|
| 224 | if (raw_coordinate == INVALID_COORD)
|
| 225 | continue;
|
| 226 |
|
| 227 | |
| 228 | * The x and y coordinate are 16 bits each
|
| 229 | * with the x in the lower 16 bits and y in the
|
| 230 | * upper 16 bits.
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| 231 |
|
| 232 | x = (raw_coordinate >> X_COORD_SHIFT) &
|
| 233 | FIFO_DATA_X_Y_MASK;
|
| 234 | y = (raw_coordinate >> Y_COORD_SHIFT) &
|
| 235 | FIFO_DATA_X_Y_MASK;
|
| 236 |
|
| 237 |
|
| 238 | x = (x >> 4) & 0x0FFF;
|
| 239 | y = (y >> 4) & 0x0FFF;
|
| 240 |
|
| 241 |
|
| 242 | if (priv->cfg_params.invert_x)
|
| 243 | x = priv->cfg_params.max_x - x;
|
| 244 |
|
| 245 | if (priv->cfg_params.invert_y)
|
| 246 | y = priv->cfg_params.max_y - y;
|
| 247 |
|
| 248 | input_report_abs(priv->idev, ABS_X, x);
|
| 249 | input_report_abs(priv->idev, ABS_Y, y);
|
| 250 | needs_sync = true;
|
| 251 |
|
| 252 | dev_dbg(&priv->pdev->dev, "xy (0x%x 0x%x)\n", x, y);
|
| 253 | }
|
| 254 | }
|
| 255 |
|
| 256 | if (needs_sync)
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| 257 | input_sync(priv->idev);
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| 258 |
|
| 259 | return IRQ_HANDLED;
|
| 260 | }
|
| 261 |
|
| 262 | static int iproc_ts_start(struct input_dev *idev)
|
| 263 | {
|
| 264 | u32 val;
|
| 265 | u32 mask;
|
| 266 | int error;
|
| 267 | struct iproc_ts_priv *priv = input_get_drvdata(idev);
|
| 268 |
|
| 269 |
|
| 270 | error = clk_prepare_enable(priv->tsc_clk);
|
| 271 | if (error) {
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| 272 | dev_err(&priv->pdev->dev, "%s clk_prepare_enable failed %d\n",
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| 273 | __func__, error);
|
| 274 | return error;
|
| 275 | }
|
| 276 |
|
| 277 | |
| 278 | * Interrupt is generated when:
|
| 279 | * FIFO reaches the int_th value, and pen event(up/down)
|
| 280 |
|
| 281 | val = TS_PEN_INTR_MASK | TS_FIFO_INTR_MASK;
|
| 282 | regmap_update_bits(priv->regmap, INTERRUPT_MASK, val, val);
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| 283 |
|
| 284 | val = priv->cfg_params.fifo_threshold;
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| 285 | regmap_write(priv->regmap, INTERRUPT_THRES, val);
|
| 286 |
|
| 287 |
|
| 288 | val = 0;
|
| 289 | val |= priv->cfg_params.scanning_period << SCANNING_PERIOD_SHIFT;
|
| 290 | val |= priv->cfg_params.debounce_timeout << DEBOUNCE_TIMEOUT_SHIFT;
|
| 291 | val |= priv->cfg_params.settling_timeout << SETTLING_TIMEOUT_SHIFT;
|
| 292 | val |= priv->cfg_params.touch_timeout << TOUCH_TIMEOUT_SHIFT;
|
| 293 | regmap_write(priv->regmap, REGCTL1, val);
|
| 294 |
|
| 295 |
|
| 296 | val = TS_FIFO_INTR_MASK | TS_PEN_INTR_MASK;
|
| 297 | regmap_update_bits(priv->regmap, INTERRUPT_STATUS, val, val);
|
| 298 |
|
| 299 |
|
| 300 | val = TS_CONTROLLER_EN_BIT | TS_WIRE_MODE_BIT;
|
| 301 | val |= priv->cfg_params.average_data << TS_CONTROLLER_AVGDATA_SHIFT;
|
| 302 |
|
| 303 | mask = (TS_CONTROLLER_AVGDATA_MASK);
|
| 304 | mask |= (TS_CONTROLLER_PWR_LDO |
|
| 305 | TS_CONTROLLER_PWR_ADC |
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| 306 | TS_CONTROLLER_PWR_BGP |
|
| 307 | TS_CONTROLLER_PWR_TS);
|
| 308 | mask |= val;
|
| 309 | regmap_update_bits(priv->regmap, REGCTL2, mask, val);
|
| 310 |
|
| 311 | ts_reg_dump(priv);
|
| 312 |
|
| 313 | return 0;
|
| 314 | }
|
| 315 |
|
| 316 | static void iproc_ts_stop(struct input_dev *dev)
|
| 317 | {
|
| 318 | u32 val;
|
| 319 | struct iproc_ts_priv *priv = input_get_drvdata(dev);
|
| 320 |
|
| 321 | |
| 322 | * Disable FIFO int_th and pen event(up/down)Interrupts only
|
| 323 | * as the interrupt mask register is shared between ADC, TS and
|
| 324 | * flextimer.
|
| 325 |
|
| 326 | val = TS_PEN_INTR_MASK | TS_FIFO_INTR_MASK;
|
| 327 | regmap_update_bits(priv->regmap, INTERRUPT_MASK, val, 0);
|
| 328 |
|
| 329 |
|
| 330 | val = TS_CONTROLLER_PWR_TS;
|
| 331 | regmap_update_bits(priv->regmap, REGCTL2, val, val);
|
| 332 |
|
| 333 | clk_disable(priv->tsc_clk);
|
| 334 | }
|
| 335 |
|
| 336 | static int iproc_get_tsc_config(struct device *dev, struct iproc_ts_priv *priv)
|
| 337 | {
|
| 338 | struct device_node *np = dev->of_node;
|
| 339 | u32 val;
|
| 340 |
|
| 341 | priv->cfg_params = iproc_default_config;
|
| 342 |
|
| 343 | if (!np)
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| 344 | return 0;
|
| 345 |
|
| 346 | if (of_property_read_u32(np, "scanning_period", &val) >= 0) {
|
| 347 | if (val < 1 || val > 256) {
|
| 348 | dev_err(dev, "scanning_period (%u) must be [1-256]\n",
|
| 349 | val);
|
| 350 | return -EINVAL;
|
| 351 | }
|
| 352 | priv->cfg_params.scanning_period = val;
|
| 353 | }
|
| 354 |
|
| 355 | if (of_property_read_u32(np, "debounce_timeout", &val) >= 0) {
|
| 356 | if (val > 255) {
|
| 357 | dev_err(dev, "debounce_timeout (%u) must be [0-255]\n",
|
| 358 | val);
|
| 359 | return -EINVAL;
|
| 360 | }
|
| 361 | priv->cfg_params.debounce_timeout = val;
|
| 362 | }
|
| 363 |
|
| 364 | if (of_property_read_u32(np, "settling_timeout", &val) >= 0) {
|
| 365 | if (val > 11) {
|
| 366 | dev_err(dev, "settling_timeout (%u) must be [0-11]\n",
|
| 367 | val);
|
| 368 | return -EINVAL;
|
| 369 | }
|
| 370 | priv->cfg_params.settling_timeout = val;
|
| 371 | }
|
| 372 |
|
| 373 | if (of_property_read_u32(np, "touch_timeout", &val) >= 0) {
|
| 374 | if (val > 255) {
|
| 375 | dev_err(dev, "touch_timeout (%u) must be [0-255]\n",
|
| 376 | val);
|
| 377 | return -EINVAL;
|
| 378 | }
|
| 379 | priv->cfg_params.touch_timeout = val;
|
| 380 | }
|
| 381 |
|
| 382 | if (of_property_read_u32(np, "average_data", &val) >= 0) {
|
| 383 | if (val > 8) {
|
| 384 | dev_err(dev, "average_data (%u) must be [0-8]\n", val);
|
| 385 | return -EINVAL;
|
| 386 | }
|
| 387 | priv->cfg_params.average_data = val;
|
| 388 | }
|
| 389 |
|
| 390 | if (of_property_read_u32(np, "fifo_threshold", &val) >= 0) {
|
| 391 | if (val > 31) {
|
| 392 | dev_err(dev, "fifo_threshold (%u)) must be [0-31]\n",
|
| 393 | val);
|
| 394 | return -EINVAL;
|
| 395 | }
|
| 396 | priv->cfg_params.fifo_threshold = val;
|
| 397 | }
|
| 398 |
|
| 399 |
|
| 400 | of_property_read_u32(np, "touchscreen-size-x", &priv->cfg_params.max_x);
|
| 401 | of_property_read_u32(np, "touchscreen-size-y", &priv->cfg_params.max_y);
|
| 402 |
|
| 403 | of_property_read_u32(np, "touchscreen-fuzz-x",
|
| 404 | &priv->cfg_params.fuzz_x);
|
| 405 | of_property_read_u32(np, "touchscreen-fuzz-y",
|
| 406 | &priv->cfg_params.fuzz_y);
|
| 407 |
|
| 408 | priv->cfg_params.invert_x =
|
| 409 | of_property_read_bool(np, "touchscreen-inverted-x");
|
| 410 | priv->cfg_params.invert_y =
|
| 411 | of_property_read_bool(np, "touchscreen-inverted-y");
|
| 412 |
|
| 413 | return 0;
|
| 414 | }
|
| 415 |
|
| 416 | static int iproc_ts_probe(struct platform_device *pdev)
|
| 417 | {
|
| 418 | struct iproc_ts_priv *priv;
|
| 419 | struct input_dev *idev;
|
| 420 | int irq;
|
| 421 | int error;
|
| 422 |
|
| 423 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
|
| 424 | if (!priv)
|
| 425 | return -ENOMEM;
|
| 426 |
|
| 427 |
|
| 428 | priv->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
|
| 429 | "ts_syscon");
|
| 430 | if (IS_ERR(priv->regmap)) {
|
| 431 | error = PTR_ERR(priv->regmap);
|
| 432 | dev_err(&pdev->dev, "unable to map I/O memory:%d\n", error);
|
| 433 | return error;
|
| 434 | }
|
| 435 |
|
| 436 | priv->tsc_clk = devm_clk_get(&pdev->dev, "tsc_clk");
|
| 437 | if (IS_ERR(priv->tsc_clk)) {
|
| 438 | error = PTR_ERR(priv->tsc_clk);
|
| 439 | dev_err(&pdev->dev,
|
| 440 | "failed getting clock tsc_clk: %d\n", error);
|
| 441 | return error;
|
| 442 | }
|
| 443 |
|
| 444 | priv->pdev = pdev;
|
| 445 | error = iproc_get_tsc_config(&pdev->dev, priv);
|
| 446 | if (error) {
|
| 447 | dev_err(&pdev->dev, "get_tsc_config failed: %d\n", error);
|
| 448 | return error;
|
| 449 | }
|
| 450 |
|
| 451 | idev = devm_input_allocate_device(&pdev->dev);
|
| 452 | if (!idev) {
|
| 453 | dev_err(&pdev->dev, "failed to allocate input device\n");
|
| 454 | return -ENOMEM;
|
| 455 | }
|
| 456 |
|
| 457 | priv->idev = idev;
|
| 458 | priv->pen_status = PEN_UP_STATUS;
|
| 459 |
|
| 460 |
|
| 461 | idev->name = IPROC_TS_NAME;
|
| 462 | idev->dev.parent = &pdev->dev;
|
| 463 |
|
| 464 | idev->id.bustype = BUS_HOST;
|
| 465 | idev->id.vendor = SERIO_UNKNOWN;
|
| 466 | idev->id.product = 0;
|
| 467 | idev->id.version = 0;
|
| 468 |
|
| 469 | idev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
|
| 470 | __set_bit(BTN_TOUCH, idev->keybit);
|
| 471 |
|
| 472 | input_set_abs_params(idev, ABS_X, X_MIN, priv->cfg_params.max_x,
|
| 473 | priv->cfg_params.fuzz_x, 0);
|
| 474 | input_set_abs_params(idev, ABS_Y, Y_MIN, priv->cfg_params.max_y,
|
| 475 | priv->cfg_params.fuzz_y, 0);
|
| 476 |
|
| 477 | idev->open = iproc_ts_start;
|
| 478 | idev->close = iproc_ts_stop;
|
| 479 |
|
| 480 | input_set_drvdata(idev, priv);
|
| 481 | platform_set_drvdata(pdev, priv);
|
| 482 |
|
| 483 |
|
| 484 | irq = platform_get_irq(pdev, 0);
|
| 485 | if (irq < 0)
|
| 486 | return irq;
|
| 487 |
|
| 488 | error = devm_request_irq(&pdev->dev, irq,
|
| 489 | iproc_touchscreen_interrupt,
|
| 490 | IRQF_SHARED, IPROC_TS_NAME, pdev);
|
| 491 | if (error)
|
| 492 | return error;
|
| 493 |
|
| 494 | error = input_register_device(priv->idev);
|
| 495 | if (error) {
|
| 496 | dev_err(&pdev->dev,
|
| 497 | "failed to register input device: %d\n", error);
|
| 498 | return error;
|
| 499 | }
|
| 500 |
|
| 501 | return 0;
|
| 502 | }
|
| 503 |
|
| 504 | static const struct of_device_id iproc_ts_of_match[] = {
|
| 505 | {.compatible = "brcm,iproc-touchscreen", },
|
| 506 | { },
|
| 507 | };
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| 508 | MODULE_DEVICE_TABLE(of, iproc_ts_of_match);
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| 509 |
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| 510 | static struct platform_driver iproc_ts_driver = {
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| 511 | .probe = iproc_ts_probe,
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| 512 | .driver = {
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| 513 | .name = IPROC_TS_NAME,
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| 514 | .of_match_table = iproc_ts_of_match,
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| 515 | },
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| 516 | };
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| 517 |
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| 518 | module_platform_driver(iproc_ts_driver);
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| 519 |
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| 520 | MODULE_DESCRIPTION("IPROC Touchscreen driver");
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| 521 | MODULE_AUTHOR("Broadcom");
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| 522 | MODULE_LICENSE("GPL v2");
|