| 1 | |
| 2 | |
| 3 | * Copyright (C) 2014 Linaro Ltd.
|
| 4 | * Author: Ashwin Chaugule <[email protected]>
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| 5 | *
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| 6 | * PCC (Platform Communication Channel) is defined in the ACPI 5.0+
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| 7 | * specification. It is a mailbox like mechanism to allow clients
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| 8 | * such as CPPC (Collaborative Processor Performance Control), RAS
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| 9 | * (Reliability, Availability and Serviceability) and MPST (Memory
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| 10 | * Node Power State Table) to talk to the platform (e.g. BMC) through
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| 11 | * shared memory regions as defined in the PCC table entries. The PCC
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| 12 | * specification supports a Doorbell mechanism for the PCC clients
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| 13 | * to notify the platform about new data. This Doorbell information
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| 14 | * is also specified in each PCC table entry.
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| 15 | *
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| 16 | * Typical high level flow of operation is:
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| 17 | *
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| 18 | * PCC Reads:
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| 19 | * * Client tries to acquire a channel lock.
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| 20 | * * After it is acquired it writes READ cmd in communication region cmd
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| 21 | * address.
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| 22 | * * Client issues mbox_send_message() which rings the PCC doorbell
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| 23 | * for its PCC channel.
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| 24 | * * If command completes, then client has control over channel and
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| 25 | * it can proceed with its reads.
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| 26 | * * Client releases lock.
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| 27 | *
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| 28 | * PCC Writes:
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| 29 | * * Client tries to acquire channel lock.
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| 30 | * * Client writes to its communication region after it acquires a
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| 31 | * channel lock.
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| 32 | * * Client writes WRITE cmd in communication region cmd address.
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| 33 | * * Client issues mbox_send_message() which rings the PCC doorbell
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| 34 | * for its PCC channel.
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| 35 | * * If command completes, then writes have succeeded and it can release
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| 36 | * the channel lock.
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| 37 | *
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| 38 | * There is a Nominal latency defined for each channel which indicates
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| 39 | * how long to wait until a command completes. If command is not complete
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| 40 | * the client needs to retry or assume failure.
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| 41 | *
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| 42 | * For more details about PCC, please see the ACPI specification from
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| 43 | * http://www.uefi.org/ACPIv5.1 Section 14.
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| 44 | *
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| 45 | * This file implements PCC as a Mailbox controller and allows for PCC
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| 46 | * clients to be implemented as its Mailbox Client Channels.
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| 47 |
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| 48 |
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| 49 | #include <linux/acpi.h>
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| 50 | #include <linux/delay.h>
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| 51 | #include <linux/io.h>
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| 52 | #include <linux/init.h>
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| 53 | #include <linux/interrupt.h>
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| 54 | #include <linux/list.h>
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| 55 | #include <linux/log2.h>
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| 56 | #include <linux/platform_device.h>
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| 57 | #include <linux/mailbox_controller.h>
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| 58 | #include <linux/mailbox_client.h>
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| 59 | #include <linux/io-64-nonatomic-lo-hi.h>
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| 60 | #include <acpi/pcc.h>
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| 61 |
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| 62 | #define MBOX_IRQ_NAME "pcc-mbox"
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| 63 |
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| 64 | |
| 65 | * struct pcc_chan_reg - PCC register bundle
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| 66 | *
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| 67 | * @vaddr: cached virtual address for this register
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| 68 | * @gas: pointer to the generic address structure for this register
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| 69 | * @preserve_mask: bitmask to preserve when writing to this register
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| 70 | * @set_mask: bitmask to set when writing to this register
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| 71 | * @status_mask: bitmask to determine and/or update the status for this register
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| 72 |
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| 73 | struct pcc_chan_reg {
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| 74 | void __iomem *vaddr;
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| 75 | struct acpi_generic_address *gas;
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| 76 | u64 preserve_mask;
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| 77 | u64 set_mask;
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| 78 | u64 status_mask;
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| 79 | };
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| 80 |
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| 81 | |
| 82 | * struct pcc_chan_info - PCC channel specific information
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| 83 | *
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| 84 | * @chan: PCC channel information with Shared Memory Region info
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| 85 | * @db: PCC register bundle for the doorbell register
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| 86 | * @plat_irq_ack: PCC register bundle for the platform interrupt acknowledge
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| 87 | * register
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| 88 | * @cmd_complete: PCC register bundle for the command complete check register
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| 89 | * @cmd_update: PCC register bundle for the command complete update register
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| 90 | * @error: PCC register bundle for the error status register
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| 91 | * @plat_irq: platform interrupt
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| 92 | * @type: PCC subspace type
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| 93 | * @plat_irq_flags: platform interrupt flags
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| 94 | * @chan_in_use: lockless flag used by type 3 initiator subspaces to filter
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| 95 | * platform interrupts. Only one transfer can occur at a time, but
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| 96 | * the interrupt handler may sample the flag on another CPU, so all
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| 97 | * accesses must use READ_ONCE() or WRITE_ONCE(). Other subspace
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| 98 | * types do not test it.
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| 99 |
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| 100 | struct pcc_chan_info {
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| 101 | struct pcc_mbox_chan chan;
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| 102 | struct pcc_chan_reg db;
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| 103 | struct pcc_chan_reg plat_irq_ack;
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| 104 | struct pcc_chan_reg cmd_complete;
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| 105 | struct pcc_chan_reg cmd_update;
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| 106 | struct pcc_chan_reg error;
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| 107 | int plat_irq;
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| 108 | u8 type;
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| 109 | unsigned int plat_irq_flags;
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| 110 | bool chan_in_use;
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| 111 | };
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| 112 |
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| 113 | #define to_pcc_chan_info(c) container_of(c, struct pcc_chan_info, chan)
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| 114 | static struct pcc_chan_info *chan_info;
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| 115 | static int pcc_chan_count;
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| 116 |
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| 117 | |
| 118 | * PCC can be used with perf critical drivers such as CPPC
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| 119 | * So it makes sense to locally cache the virtual address and
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| 120 | * use it to read/write to PCC registers such as doorbell register
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| 121 | *
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| 122 | * The below read_register and write_registers are used to read and
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| 123 | * write from perf critical registers such as PCC doorbell register
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| 124 |
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| 125 | static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
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| 126 | {
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| 127 | switch (bit_width) {
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| 128 | case 8:
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| 129 | *val = readb(vaddr);
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| 130 | break;
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| 131 | case 16:
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| 132 | *val = readw(vaddr);
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| 133 | break;
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| 134 | case 32:
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| 135 | *val = readl(vaddr);
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| 136 | break;
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| 137 | case 64:
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| 138 | *val = readq(vaddr);
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| 139 | break;
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| 140 | }
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| 141 | }
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| 142 |
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| 143 | static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
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| 144 | {
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| 145 | switch (bit_width) {
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| 146 | case 8:
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| 147 | writeb(val, vaddr);
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| 148 | break;
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| 149 | case 16:
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| 150 | writew(val, vaddr);
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| 151 | break;
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| 152 | case 32:
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| 153 | writel(val, vaddr);
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| 154 | break;
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| 155 | case 64:
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| 156 | writeq(val, vaddr);
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| 157 | break;
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| 158 | }
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| 159 | }
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| 160 |
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| 161 | static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
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| 162 | {
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| 163 | int ret = 0;
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| 164 |
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| 165 | if (!reg->gas) {
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| 166 | *val = 0;
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| 167 | return 0;
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| 168 | }
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| 169 |
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| 170 | if (reg->vaddr)
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| 171 | read_register(reg->vaddr, val, reg->gas->bit_width);
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| 172 | else
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| 173 | ret = acpi_read(val, reg->gas);
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| 174 |
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| 175 | return ret;
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| 176 | }
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| 177 |
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| 178 | static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val)
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| 179 | {
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| 180 | int ret = 0;
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| 181 |
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| 182 | if (!reg->gas)
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| 183 | return 0;
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| 184 |
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| 185 | if (reg->vaddr)
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| 186 | write_register(reg->vaddr, val, reg->gas->bit_width);
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| 187 | else
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| 188 | ret = acpi_write(val, reg->gas);
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| 189 |
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| 190 | return ret;
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| 191 | }
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| 192 |
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| 193 | static int pcc_chan_reg_read_modify_write(struct pcc_chan_reg *reg)
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| 194 | {
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| 195 | int ret = 0;
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| 196 | u64 val;
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| 197 |
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| 198 | ret = pcc_chan_reg_read(reg, &val);
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| 199 | if (ret)
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| 200 | return ret;
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| 201 |
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| 202 | val &= reg->preserve_mask;
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| 203 | val |= reg->set_mask;
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| 204 |
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| 205 | return pcc_chan_reg_write(reg, val);
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| 206 | }
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| 207 |
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| 208 | |
| 209 | * pcc_map_interrupt - Map a PCC subspace GSI to a linux IRQ number
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| 210 | * @interrupt: GSI number.
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| 211 | * @flags: interrupt flags
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| 212 | *
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| 213 | * Returns: a valid linux IRQ number on success
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| 214 | * 0 or -EINVAL on failure
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| 215 |
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| 216 | static int pcc_map_interrupt(u32 interrupt, u32 flags)
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| 217 | {
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| 218 | int trigger, polarity;
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| 219 |
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| 220 | if (!interrupt)
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| 221 | return 0;
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| 222 |
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| 223 | trigger = (flags & ACPI_PCCT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
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| 224 | : ACPI_LEVEL_SENSITIVE;
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| 225 |
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| 226 | polarity = (flags & ACPI_PCCT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
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| 227 | : ACPI_ACTIVE_HIGH;
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| 228 |
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| 229 | return acpi_register_gsi(NULL, interrupt, trigger, polarity);
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| 230 | }
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| 231 |
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| 232 | static bool pcc_chan_plat_irq_can_be_shared(struct pcc_chan_info *pchan)
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| 233 | {
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| 234 | return (pchan->plat_irq_flags & ACPI_PCCT_INTERRUPT_MODE) ==
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| 235 | ACPI_LEVEL_SENSITIVE;
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| 236 | }
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| 237 |
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| 238 | static bool pcc_mbox_cmd_complete_check(struct pcc_chan_info *pchan)
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| 239 | {
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| 240 | u64 val;
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| 241 | int ret;
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| 242 |
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| 243 | if (!pchan->cmd_complete.gas)
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| 244 | return true;
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| 245 |
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| 246 | ret = pcc_chan_reg_read(&pchan->cmd_complete, &val);
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| 247 | if (ret)
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| 248 | return false;
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| 249 |
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| 250 | |
| 251 | * Judge if the channel respond the interrupt based on the value of
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| 252 | * command complete.
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| 253 |
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| 254 | val &= pchan->cmd_complete.status_mask;
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| 255 |
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| 256 | |
| 257 | * If this is PCC slave subspace channel, and the command complete
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| 258 | * bit 0 indicates that Platform is sending a notification and OSPM
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| 259 | * needs to respond this interrupt to process this command.
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| 260 |
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| 261 | if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE)
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| 262 | return !val;
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| 263 |
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| 264 | return !!val;
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| 265 | }
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| 266 |
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| 267 | static int pcc_mbox_error_check_and_clear(struct pcc_chan_info *pchan)
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| 268 | {
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| 269 | u64 val;
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| 270 | int ret;
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| 271 |
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| 272 | ret = pcc_chan_reg_read(&pchan->error, &val);
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| 273 | if (ret)
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| 274 | return ret;
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| 275 |
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| 276 | if (val & pchan->error.status_mask) {
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| 277 | val &= pchan->error.preserve_mask;
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| 278 | pcc_chan_reg_write(&pchan->error, val);
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| 279 | return -EIO;
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| 280 | }
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| 281 |
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| 282 | return 0;
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| 283 | }
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| 284 |
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| 285 | static void pcc_chan_acknowledge(struct pcc_chan_info *pchan)
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| 286 | {
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| 287 | struct acpi_pcct_ext_pcc_shared_memory __iomem *pcc_hdr;
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| 288 |
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| 289 | if (pchan->type != ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE)
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| 290 | return;
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| 291 |
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| 292 | pcc_chan_reg_read_modify_write(&pchan->cmd_update);
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| 293 |
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| 294 | pcc_hdr = pchan->chan.shmem;
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| 295 |
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| 296 | |
| 297 | * The PCC slave subspace channel needs to set the command
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| 298 | * complete bit after processing message. If the PCC_ACK_FLAG
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| 299 | * is set, it should also ring the doorbell.
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| 300 |
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| 301 | if (ioread32(&pcc_hdr->flags) & PCC_CMD_COMPLETION_NOTIFY)
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| 302 | pcc_chan_reg_read_modify_write(&pchan->db);
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| 303 | }
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| 304 |
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| 305 | |
| 306 | * pcc_mbox_irq - PCC mailbox interrupt handler
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| 307 | * @irq: interrupt number
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| 308 | * @p: data/cookie passed from the caller to identify the channel
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| 309 | *
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| 310 | * Returns: IRQ_HANDLED if interrupt is handled or IRQ_NONE if not
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| 311 |
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| 312 | static irqreturn_t pcc_mbox_irq(int irq, void *p)
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| 313 | {
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| 314 | struct pcc_chan_info *pchan;
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| 315 | struct mbox_chan *chan = p;
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| 316 |
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| 317 | pchan = chan->con_priv;
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| 318 |
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| 319 | if (pcc_chan_reg_read_modify_write(&pchan->plat_irq_ack))
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| 320 | return IRQ_NONE;
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| 321 |
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| 322 | |
| 323 | * Initiator subspaces use this flag to filter shared interrupts. Use
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| 324 | * READ_ONCE() to sample the lockless flag written by pcc_send_data()
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| 325 | * on another CPU.
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| 326 |
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| 327 | if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE &&
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| 328 | !READ_ONCE(pchan->chan_in_use))
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| 329 | return IRQ_NONE;
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| 330 |
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| 331 | if (!pcc_mbox_cmd_complete_check(pchan))
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| 332 | return IRQ_NONE;
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| 333 |
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| 334 | if (pcc_mbox_error_check_and_clear(pchan))
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| 335 | return IRQ_NONE;
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| 336 |
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| 337 | |
| 338 | * Clear this flag after updating the interrupt ack register and before
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| 339 | * notifying the client and mailbox core. mbox_chan_txdone() may submit
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| 340 | * the next queued transfer and set the flag again. Use WRITE_ONCE() for
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| 341 | * the lockless update observed by the send and interrupt paths.
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| 342 |
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| 343 | WRITE_ONCE(pchan->chan_in_use, false);
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| 344 | mbox_chan_received_data(chan, NULL);
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| 345 | mbox_chan_txdone(chan, 0);
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| 346 |
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| 347 | pcc_chan_acknowledge(pchan);
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| 348 |
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| 349 | return IRQ_HANDLED;
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| 350 | }
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| 351 |
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| 352 | static int pcc_mbox_validate_signature(struct pcc_mbox_chan *pcc_mchan,
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| 353 | int subspace_id)
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| 354 | {
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| 355 | u32 expected_signature = PCC_SIGNATURE | subspace_id;
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| 356 | u32 signature;
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| 357 |
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| 358 | if (pcc_mchan->shmem_size < sizeof(signature)) {
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| 359 | pr_err("PCC subspace %d shared memory is too small\n",
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| 360 | subspace_id);
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| 361 | return -EINVAL;
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| 362 | }
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| 363 |
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| 364 | signature = ioread32(pcc_mchan->shmem);
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| 365 | if (signature != expected_signature)
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| 366 | pr_warn("PCC subspace %d invalid signature %#x expected %#x\n",
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| 367 | subspace_id, signature, expected_signature);
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| 368 |
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| 369 | return 0;
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| 370 | }
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| 371 |
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| 372 | |
| 373 | * pcc_mbox_request_channel - PCC clients call this function to
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| 374 | * request a pointer to their PCC subspace, from which they
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| 375 | * can get the details of communicating with the remote.
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| 376 | * @cl: Pointer to Mailbox client, so we know where to bind the
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| 377 | * Channel.
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| 378 | * @subspace_id: The PCC Subspace index as parsed in the PCC client
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| 379 | * ACPI package. This is used to lookup the array of PCC
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| 380 | * subspaces as parsed by the PCC Mailbox controller.
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| 381 | *
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| 382 | * Return: Pointer to the PCC Mailbox Channel if successful or ERR_PTR.
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| 383 |
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| 384 | struct pcc_mbox_chan *
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| 385 | pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id)
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| 386 | {
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| 387 | struct pcc_mbox_chan *pcc_mchan;
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| 388 | struct pcc_chan_info *pchan;
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| 389 | struct mbox_chan *chan;
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| 390 | int rc;
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| 391 |
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| 392 | if (subspace_id < 0 || subspace_id >= pcc_chan_count)
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| 393 | return ERR_PTR(-ENOENT);
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| 394 |
|
| 395 | pchan = chan_info + subspace_id;
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| 396 | chan = pchan->chan.mchan;
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| 397 | if (IS_ERR(chan) || chan->cl) {
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| 398 | pr_err("Channel not found for idx: %d\n", subspace_id);
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| 399 | return ERR_PTR(-EBUSY);
|
| 400 | }
|
| 401 |
|
| 402 | pcc_mchan = &pchan->chan;
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| 403 | pcc_mchan->shmem = acpi_os_ioremap(pcc_mchan->shmem_base_addr,
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| 404 | pcc_mchan->shmem_size);
|
| 405 | if (!pcc_mchan->shmem)
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| 406 | return ERR_PTR(-ENXIO);
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| 407 |
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| 408 | rc = pcc_mbox_validate_signature(pcc_mchan, subspace_id);
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| 409 | if (rc)
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| 410 | goto err_unmap_shmem;
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| 411 |
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| 412 | rc = mbox_bind_client(chan, cl);
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| 413 | if (rc)
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| 414 | goto err_unmap_shmem;
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| 415 |
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| 416 | return pcc_mchan;
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| 417 |
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| 418 | err_unmap_shmem:
|
| 419 | iounmap(pcc_mchan->shmem);
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| 420 | pcc_mchan->shmem = NULL;
|
| 421 | return ERR_PTR(rc);
|
| 422 | }
|
| 423 | EXPORT_SYMBOL_GPL(pcc_mbox_request_channel);
|
| 424 |
|
| 425 | |
| 426 | * pcc_mbox_free_channel - Clients call this to free their Channel.
|
| 427 | *
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| 428 | * @pchan: Pointer to the PCC mailbox channel as returned by
|
| 429 | * pcc_mbox_request_channel()
|
| 430 |
|
| 431 | void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan)
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| 432 | {
|
| 433 | struct mbox_chan *chan = pchan->mchan;
|
| 434 | struct pcc_chan_info *pchan_info;
|
| 435 | struct pcc_mbox_chan *pcc_mbox_chan;
|
| 436 |
|
| 437 | if (!chan || !chan->cl)
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| 438 | return;
|
| 439 | pchan_info = chan->con_priv;
|
| 440 | pcc_mbox_chan = &pchan_info->chan;
|
| 441 | if (pcc_mbox_chan->shmem) {
|
| 442 | iounmap(pcc_mbox_chan->shmem);
|
| 443 | pcc_mbox_chan->shmem = NULL;
|
| 444 | }
|
| 445 |
|
| 446 | mbox_free_channel(chan);
|
| 447 | }
|
| 448 | EXPORT_SYMBOL_GPL(pcc_mbox_free_channel);
|
| 449 |
|
| 450 | |
| 451 | * pcc_send_data - Called from Mailbox Controller code. Used
|
| 452 | * here only to ring the channel doorbell. The PCC client
|
| 453 | * specific read/write is done in the client driver in
|
| 454 | * order to maintain atomicity over PCC channel once
|
| 455 | * OS has control over it. See above for flow of operations.
|
| 456 | * @chan: Pointer to Mailbox channel over which to send data.
|
| 457 | * @data: Client specific data written over channel. Used here
|
| 458 | * only for debug after PCC transaction completes.
|
| 459 | *
|
| 460 | * Return: Err if something failed else 0 for success.
|
| 461 |
|
| 462 | static int pcc_send_data(struct mbox_chan *chan, void *data)
|
| 463 | {
|
| 464 | int ret;
|
| 465 | struct pcc_chan_info *pchan = chan->con_priv;
|
| 466 |
|
| 467 | ret = pcc_chan_reg_read_modify_write(&pchan->cmd_update);
|
| 468 | if (ret)
|
| 469 | return ret;
|
| 470 |
|
| 471 | |
| 472 | * Set chan_in_use before ringing the doorbell so a fast completion
|
| 473 | * interrupt is not mistaken for a shared interrupt from another
|
| 474 | * subspace. Use WRITE_ONCE() for the lockless flag update. The
|
| 475 | * ordered I/O accessor used to ring the doorbell orders this store
|
| 476 | * before the platform is notified.
|
| 477 |
|
| 478 | if (pchan->plat_irq > 0)
|
| 479 | WRITE_ONCE(pchan->chan_in_use, true);
|
| 480 | ret = pcc_chan_reg_read_modify_write(&pchan->db);
|
| 481 | if (ret && pchan->plat_irq > 0)
|
| 482 | WRITE_ONCE(pchan->chan_in_use, false);
|
| 483 |
|
| 484 | return ret;
|
| 485 | }
|
| 486 |
|
| 487 | static bool pcc_last_tx_done(struct mbox_chan *chan)
|
| 488 | {
|
| 489 | struct pcc_chan_info *pchan = chan->con_priv;
|
| 490 |
|
| 491 | if (!(chan->txdone_method & MBOX_TXDONE_BY_POLL))
|
| 492 | return false;
|
| 493 |
|
| 494 | if (!pcc_mbox_cmd_complete_check(pchan))
|
| 495 | return false;
|
| 496 |
|
| 497 | mbox_chan_received_data(chan, NULL);
|
| 498 |
|
| 499 | return true;
|
| 500 | }
|
| 501 |
|
| 502 | |
| 503 | * pcc_startup - Called from Mailbox Controller code. Used here
|
| 504 | * to request the interrupt.
|
| 505 | * @chan: Pointer to Mailbox channel to startup.
|
| 506 | *
|
| 507 | * Return: Err if something failed else 0 for success.
|
| 508 |
|
| 509 | static int pcc_startup(struct mbox_chan *chan)
|
| 510 | {
|
| 511 | struct pcc_chan_info *pchan = chan->con_priv;
|
| 512 | unsigned long irqflags;
|
| 513 | int rc;
|
| 514 |
|
| 515 | |
| 516 | * Clear and acknowledge any pending interrupts on responder channel
|
| 517 | * before enabling the interrupt
|
| 518 |
|
| 519 | pcc_chan_acknowledge(pchan);
|
| 520 |
|
| 521 | if (pchan->plat_irq > 0) {
|
| 522 | irqflags = pcc_chan_plat_irq_can_be_shared(pchan) ?
|
| 523 | IRQF_SHARED : 0;
|
| 524 | rc = devm_request_irq(chan->mbox->dev, pchan->plat_irq, pcc_mbox_irq,
|
| 525 | irqflags, MBOX_IRQ_NAME, chan);
|
| 526 | if (unlikely(rc)) {
|
| 527 | dev_err(chan->mbox->dev, "failed to register PCC interrupt %d\n",
|
| 528 | pchan->plat_irq);
|
| 529 | return rc;
|
| 530 | }
|
| 531 | }
|
| 532 |
|
| 533 | return 0;
|
| 534 | }
|
| 535 |
|
| 536 | |
| 537 | * pcc_shutdown - Called from Mailbox Controller code. Used here
|
| 538 | * to free the interrupt.
|
| 539 | * @chan: Pointer to Mailbox channel to shutdown.
|
| 540 |
|
| 541 | static void pcc_shutdown(struct mbox_chan *chan)
|
| 542 | {
|
| 543 | struct pcc_chan_info *pchan = chan->con_priv;
|
| 544 |
|
| 545 | if (pchan->plat_irq > 0)
|
| 546 | devm_free_irq(chan->mbox->dev, pchan->plat_irq, chan);
|
| 547 | }
|
| 548 |
|
| 549 | static const struct mbox_chan_ops pcc_chan_ops = {
|
| 550 | .send_data = pcc_send_data,
|
| 551 | .startup = pcc_startup,
|
| 552 | .shutdown = pcc_shutdown,
|
| 553 | .last_tx_done = pcc_last_tx_done,
|
| 554 | };
|
| 555 |
|
| 556 | |
| 557 | * parse_pcc_subspace - Count PCC subspaces defined
|
| 558 | * @header: Pointer to the ACPI subtable header under the PCCT.
|
| 559 | * @end: End of subtable entry.
|
| 560 | *
|
| 561 | * Return: If we find a PCC subspace entry of a valid type, return 0.
|
| 562 | * Otherwise, return -EINVAL.
|
| 563 | *
|
| 564 | * This gets called for each entry in the PCC table.
|
| 565 |
|
| 566 | static int parse_pcc_subspace(union acpi_subtable_headers *header,
|
| 567 | const unsigned long end)
|
| 568 | {
|
| 569 | struct acpi_pcct_subspace *ss = (struct acpi_pcct_subspace *) header;
|
| 570 |
|
| 571 | if (ss->header.type < ACPI_PCCT_TYPE_RESERVED)
|
| 572 | return 0;
|
| 573 |
|
| 574 | return -EINVAL;
|
| 575 | }
|
| 576 |
|
| 577 | static int
|
| 578 | pcc_chan_reg_init(struct pcc_chan_reg *reg, struct acpi_generic_address *gas,
|
| 579 | u64 preserve_mask, u64 set_mask, u64 status_mask, char *name)
|
| 580 | {
|
| 581 | if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
|
| 582 | if (!(gas->bit_width >= 8 && gas->bit_width <= 64 &&
|
| 583 | is_power_of_2(gas->bit_width))) {
|
| 584 | pr_err("Error: Cannot access register of %u bit width",
|
| 585 | gas->bit_width);
|
| 586 | return -EFAULT;
|
| 587 | }
|
| 588 |
|
| 589 | reg->vaddr = acpi_os_ioremap(gas->address, gas->bit_width / 8);
|
| 590 | if (!reg->vaddr) {
|
| 591 | pr_err("Failed to ioremap PCC %s register\n", name);
|
| 592 | return -ENOMEM;
|
| 593 | }
|
| 594 | }
|
| 595 | reg->gas = gas;
|
| 596 | reg->preserve_mask = preserve_mask;
|
| 597 | reg->set_mask = set_mask;
|
| 598 | reg->status_mask = status_mask;
|
| 599 | return 0;
|
| 600 | }
|
| 601 |
|
| 602 | |
| 603 | * pcc_parse_subspace_irq - Parse the PCC IRQ and PCC ACK register
|
| 604 | *
|
| 605 | * @pchan: Pointer to the PCC channel info structure.
|
| 606 | * @pcct_entry: Pointer to the ACPI subtable header.
|
| 607 | *
|
| 608 | * Return: 0 for Success, else errno.
|
| 609 | *
|
| 610 | * There should be one entry per PCC channel. This gets called for each
|
| 611 | * entry in the PCC table. This uses PCCY Type1 structure for all applicable
|
| 612 | * types(Type 1-4) to fetch irq
|
| 613 |
|
| 614 | static int pcc_parse_subspace_irq(struct pcc_chan_info *pchan,
|
| 615 | struct acpi_subtable_header *pcct_entry)
|
| 616 | {
|
| 617 | int ret = 0;
|
| 618 | struct acpi_pcct_hw_reduced *pcct_ss;
|
| 619 |
|
| 620 | if (pcct_entry->type < ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE ||
|
| 621 | pcct_entry->type > ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE)
|
| 622 | return 0;
|
| 623 |
|
| 624 | pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;
|
| 625 | pchan->plat_irq = pcc_map_interrupt(pcct_ss->platform_interrupt,
|
| 626 | (u32)pcct_ss->flags);
|
| 627 | if (pchan->plat_irq <= 0) {
|
| 628 | pr_err("PCC GSI %d not registered\n",
|
| 629 | pcct_ss->platform_interrupt);
|
| 630 | return -EINVAL;
|
| 631 | }
|
| 632 | pchan->plat_irq_flags = pcct_ss->flags;
|
| 633 |
|
| 634 | if (pcct_ss->header.type == ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
|
| 635 | struct acpi_pcct_hw_reduced_type2 *pcct2_ss = (void *)pcct_ss;
|
| 636 |
|
| 637 | ret = pcc_chan_reg_init(&pchan->plat_irq_ack,
|
| 638 | &pcct2_ss->platform_ack_register,
|
| 639 | pcct2_ss->ack_preserve_mask,
|
| 640 | pcct2_ss->ack_write_mask, 0,
|
| 641 | "PLAT IRQ ACK");
|
| 642 |
|
| 643 | } else if (pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE ||
|
| 644 | pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) {
|
| 645 | struct acpi_pcct_ext_pcc_master *pcct_ext = (void *)pcct_ss;
|
| 646 |
|
| 647 | ret = pcc_chan_reg_init(&pchan->plat_irq_ack,
|
| 648 | &pcct_ext->platform_ack_register,
|
| 649 | pcct_ext->ack_preserve_mask,
|
| 650 | pcct_ext->ack_set_mask, 0,
|
| 651 | "PLAT IRQ ACK");
|
| 652 | }
|
| 653 |
|
| 654 | if (pcc_chan_plat_irq_can_be_shared(pchan) &&
|
| 655 | !pchan->plat_irq_ack.gas) {
|
| 656 | pr_err("PCC subspace has level IRQ with no ACK register\n");
|
| 657 | return -EINVAL;
|
| 658 | }
|
| 659 |
|
| 660 | return ret;
|
| 661 | }
|
| 662 |
|
| 663 | |
| 664 | * pcc_parse_subspace_db_reg - Parse the PCC doorbell register
|
| 665 | *
|
| 666 | * @pchan: Pointer to the PCC channel info structure.
|
| 667 | * @pcct_entry: Pointer to the ACPI subtable header.
|
| 668 | *
|
| 669 | * Return: 0 for Success, else errno.
|
| 670 |
|
| 671 | static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan,
|
| 672 | struct acpi_subtable_header *pcct_entry)
|
| 673 | {
|
| 674 | int ret = 0;
|
| 675 |
|
| 676 | if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
|
| 677 | struct acpi_pcct_subspace *pcct_ss;
|
| 678 |
|
| 679 | pcct_ss = (struct acpi_pcct_subspace *)pcct_entry;
|
| 680 |
|
| 681 | ret = pcc_chan_reg_init(&pchan->db,
|
| 682 | &pcct_ss->doorbell_register,
|
| 683 | pcct_ss->preserve_mask,
|
| 684 | pcct_ss->write_mask, 0, "Doorbell");
|
| 685 |
|
| 686 | } else {
|
| 687 | struct acpi_pcct_ext_pcc_master *pcct_ext;
|
| 688 |
|
| 689 | pcct_ext = (struct acpi_pcct_ext_pcc_master *)pcct_entry;
|
| 690 |
|
| 691 | ret = pcc_chan_reg_init(&pchan->db,
|
| 692 | &pcct_ext->doorbell_register,
|
| 693 | pcct_ext->preserve_mask,
|
| 694 | pcct_ext->write_mask, 0, "Doorbell");
|
| 695 | if (ret)
|
| 696 | return ret;
|
| 697 |
|
| 698 | ret = pcc_chan_reg_init(&pchan->cmd_complete,
|
| 699 | &pcct_ext->cmd_complete_register,
|
| 700 | 0, 0, pcct_ext->cmd_complete_mask,
|
| 701 | "Command Complete Check");
|
| 702 | if (ret)
|
| 703 | return ret;
|
| 704 |
|
| 705 | ret = pcc_chan_reg_init(&pchan->cmd_update,
|
| 706 | &pcct_ext->cmd_update_register,
|
| 707 | pcct_ext->cmd_update_preserve_mask,
|
| 708 | pcct_ext->cmd_update_set_mask, 0,
|
| 709 | "Command Complete Update");
|
| 710 | if (ret)
|
| 711 | return ret;
|
| 712 |
|
| 713 | ret = pcc_chan_reg_init(&pchan->error,
|
| 714 | &pcct_ext->error_status_register,
|
| 715 | ~pcct_ext->error_status_mask, 0,
|
| 716 | pcct_ext->error_status_mask,
|
| 717 | "Error Status");
|
| 718 | }
|
| 719 | return ret;
|
| 720 | }
|
| 721 |
|
| 722 | |
| 723 | * pcc_parse_subspace_shmem - Parse the PCC Shared Memory Region information
|
| 724 | *
|
| 725 | * @pchan: Pointer to the PCC channel info structure.
|
| 726 | * @pcct_entry: Pointer to the ACPI subtable header.
|
| 727 | *
|
| 728 |
|
| 729 | static void pcc_parse_subspace_shmem(struct pcc_chan_info *pchan,
|
| 730 | struct acpi_subtable_header *pcct_entry)
|
| 731 | {
|
| 732 | if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
|
| 733 | struct acpi_pcct_subspace *pcct_ss =
|
| 734 | (struct acpi_pcct_subspace *)pcct_entry;
|
| 735 |
|
| 736 | pchan->chan.shmem_base_addr = pcct_ss->base_address;
|
| 737 | pchan->chan.shmem_size = pcct_ss->length;
|
| 738 | pchan->chan.latency = pcct_ss->latency;
|
| 739 | pchan->chan.max_access_rate = pcct_ss->max_access_rate;
|
| 740 | pchan->chan.min_turnaround_time = pcct_ss->min_turnaround_time;
|
| 741 | } else {
|
| 742 | struct acpi_pcct_ext_pcc_master *pcct_ext =
|
| 743 | (struct acpi_pcct_ext_pcc_master *)pcct_entry;
|
| 744 |
|
| 745 | pchan->chan.shmem_base_addr = pcct_ext->base_address;
|
| 746 | pchan->chan.shmem_size = pcct_ext->length;
|
| 747 | pchan->chan.latency = pcct_ext->latency;
|
| 748 | pchan->chan.max_access_rate = pcct_ext->max_access_rate;
|
| 749 | pchan->chan.min_turnaround_time = pcct_ext->min_turnaround_time;
|
| 750 | }
|
| 751 | }
|
| 752 |
|
| 753 | |
| 754 | * acpi_pcc_probe - Parse the ACPI tree for the PCCT.
|
| 755 | *
|
| 756 | * Return: 0 for Success, else errno.
|
| 757 |
|
| 758 | static int __init acpi_pcc_probe(void)
|
| 759 | {
|
| 760 | int count, i, rc = 0;
|
| 761 | acpi_status status;
|
| 762 | struct acpi_table_header *pcct_tbl;
|
| 763 | struct acpi_subtable_proc proc[ACPI_PCCT_TYPE_RESERVED];
|
| 764 |
|
| 765 | status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl);
|
| 766 | if (ACPI_FAILURE(status) || !pcct_tbl)
|
| 767 | return -ENODEV;
|
| 768 |
|
| 769 |
|
| 770 | for (i = ACPI_PCCT_TYPE_GENERIC_SUBSPACE;
|
| 771 | i < ACPI_PCCT_TYPE_RESERVED; i++) {
|
| 772 | proc[i].id = i;
|
| 773 | proc[i].count = 0;
|
| 774 | proc[i].handler = parse_pcc_subspace;
|
| 775 | }
|
| 776 |
|
| 777 | count = acpi_table_parse_entries_array(ACPI_SIG_PCCT,
|
| 778 | sizeof(struct acpi_table_pcct), proc,
|
| 779 | ACPI_PCCT_TYPE_RESERVED, MAX_PCC_SUBSPACES);
|
| 780 | if (count <= 0 || count > MAX_PCC_SUBSPACES) {
|
| 781 | if (count < 0)
|
| 782 | pr_warn("Error parsing PCC subspaces from PCCT\n");
|
| 783 | else
|
| 784 | pr_warn("Invalid PCCT: %d PCC subspaces\n", count);
|
| 785 |
|
| 786 | rc = -EINVAL;
|
| 787 | } else {
|
| 788 | pcc_chan_count = count;
|
| 789 | }
|
| 790 |
|
| 791 | acpi_put_table(pcct_tbl);
|
| 792 |
|
| 793 | return rc;
|
| 794 | }
|
| 795 |
|
| 796 | |
| 797 | * pcc_mbox_probe - Called when we find a match for the
|
| 798 | * PCCT platform device. This is purely used to represent
|
| 799 | * the PCCT as a virtual device for registering with the
|
| 800 | * generic Mailbox framework.
|
| 801 | *
|
| 802 | * @pdev: Pointer to platform device returned when a match
|
| 803 | * is found.
|
| 804 | *
|
| 805 | * Return: 0 for Success, else errno.
|
| 806 |
|
| 807 | static int pcc_mbox_probe(struct platform_device *pdev)
|
| 808 | {
|
| 809 | struct device *dev = &pdev->dev;
|
| 810 | struct mbox_controller *pcc_mbox_ctrl;
|
| 811 | struct mbox_chan *pcc_mbox_channels;
|
| 812 | struct acpi_table_header *pcct_tbl;
|
| 813 | struct acpi_subtable_header *pcct_entry;
|
| 814 | struct acpi_table_pcct *acpi_pcct_tbl;
|
| 815 | acpi_status status = AE_OK;
|
| 816 | int i, rc, count = pcc_chan_count;
|
| 817 |
|
| 818 |
|
| 819 | status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl);
|
| 820 |
|
| 821 | if (ACPI_FAILURE(status) || !pcct_tbl)
|
| 822 | return -ENODEV;
|
| 823 |
|
| 824 | pcc_mbox_channels = devm_kcalloc(dev, count, sizeof(*pcc_mbox_channels),
|
| 825 | GFP_KERNEL);
|
| 826 | if (!pcc_mbox_channels) {
|
| 827 | rc = -ENOMEM;
|
| 828 | goto err;
|
| 829 | }
|
| 830 |
|
| 831 | chan_info = devm_kcalloc(dev, count, sizeof(*chan_info), GFP_KERNEL);
|
| 832 | if (!chan_info) {
|
| 833 | rc = -ENOMEM;
|
| 834 | goto err;
|
| 835 | }
|
| 836 |
|
| 837 | pcc_mbox_ctrl = devm_kzalloc(dev, sizeof(*pcc_mbox_ctrl), GFP_KERNEL);
|
| 838 | if (!pcc_mbox_ctrl) {
|
| 839 | rc = -ENOMEM;
|
| 840 | goto err;
|
| 841 | }
|
| 842 |
|
| 843 |
|
| 844 | pcct_entry = (struct acpi_subtable_header *) (
|
| 845 | (unsigned long) pcct_tbl + sizeof(struct acpi_table_pcct));
|
| 846 |
|
| 847 | acpi_pcct_tbl = (struct acpi_table_pcct *) pcct_tbl;
|
| 848 | if (acpi_pcct_tbl->flags & ACPI_PCCT_DOORBELL) {
|
| 849 | pcc_mbox_ctrl->txdone_irq = true;
|
| 850 | pcc_mbox_ctrl->txdone_poll = false;
|
| 851 | } else {
|
| 852 | pcc_mbox_ctrl->txdone_irq = false;
|
| 853 | pcc_mbox_ctrl->txdone_poll = true;
|
| 854 | }
|
| 855 |
|
| 856 | for (i = 0; i < count; i++) {
|
| 857 | struct pcc_chan_info *pchan = chan_info + i;
|
| 858 |
|
| 859 | pcc_mbox_channels[i].con_priv = pchan;
|
| 860 | pchan->chan.mchan = &pcc_mbox_channels[i];
|
| 861 |
|
| 862 | if (pcct_entry->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE &&
|
| 863 | !pcc_mbox_ctrl->txdone_irq) {
|
| 864 | pr_err("Platform Interrupt flag must be set to 1");
|
| 865 | rc = -EINVAL;
|
| 866 | goto err;
|
| 867 | }
|
| 868 |
|
| 869 | if (pcc_mbox_ctrl->txdone_irq) {
|
| 870 | rc = pcc_parse_subspace_irq(pchan, pcct_entry);
|
| 871 | if (rc < 0)
|
| 872 | goto err;
|
| 873 | }
|
| 874 | rc = pcc_parse_subspace_db_reg(pchan, pcct_entry);
|
| 875 | if (rc < 0)
|
| 876 | goto err;
|
| 877 |
|
| 878 | pcc_parse_subspace_shmem(pchan, pcct_entry);
|
| 879 |
|
| 880 | pchan->type = pcct_entry->type;
|
| 881 | pcct_entry = (struct acpi_subtable_header *)
|
| 882 | ((unsigned long) pcct_entry + pcct_entry->length);
|
| 883 | }
|
| 884 |
|
| 885 | pcc_mbox_ctrl->num_chans = count;
|
| 886 |
|
| 887 | pr_info("Detected %d PCC Subspaces\n", pcc_mbox_ctrl->num_chans);
|
| 888 |
|
| 889 | pcc_mbox_ctrl->chans = pcc_mbox_channels;
|
| 890 | pcc_mbox_ctrl->ops = &pcc_chan_ops;
|
| 891 | pcc_mbox_ctrl->dev = dev;
|
| 892 |
|
| 893 | pr_info("Registering PCC driver as Mailbox controller\n");
|
| 894 | rc = mbox_controller_register(pcc_mbox_ctrl);
|
| 895 | if (rc)
|
| 896 | pr_err("Err registering PCC as Mailbox controller: %d\n", rc);
|
| 897 | else
|
| 898 | return 0;
|
| 899 | err:
|
| 900 | acpi_put_table(pcct_tbl);
|
| 901 | return rc;
|
| 902 | }
|
| 903 |
|
| 904 | static struct platform_driver pcc_mbox_driver = {
|
| 905 | .probe = pcc_mbox_probe,
|
| 906 | .driver = {
|
| 907 | .name = "PCCT",
|
| 908 | },
|
| 909 | };
|
| 910 |
|
| 911 | static int __init pcc_init(void)
|
| 912 | {
|
| 913 | int ret;
|
| 914 | struct platform_device *pcc_pdev;
|
| 915 |
|
| 916 | if (acpi_disabled)
|
| 917 | return -ENODEV;
|
| 918 |
|
| 919 |
|
| 920 | ret = acpi_pcc_probe();
|
| 921 |
|
| 922 | if (ret) {
|
| 923 | pr_debug("ACPI PCC probe failed.\n");
|
| 924 | return -ENODEV;
|
| 925 | }
|
| 926 |
|
| 927 | pcc_pdev = platform_create_bundle(&pcc_mbox_driver,
|
| 928 | pcc_mbox_probe, NULL, 0, NULL, 0);
|
| 929 |
|
| 930 | if (IS_ERR(pcc_pdev)) {
|
| 931 | pr_debug("Err creating PCC platform bundle\n");
|
| 932 | pcc_chan_count = 0;
|
| 933 | return PTR_ERR(pcc_pdev);
|
| 934 | }
|
| 935 |
|
| 936 | return 0;
|
| 937 | }
|
| 938 |
|
| 939 | |
| 940 | * Make PCC init postcore so that users of this mailbox
|
| 941 | * such as the ACPI Processor driver have it available
|
| 942 | * at their init.
|
| 943 |
|
| 944 | postcore_initcall(pcc_init);
|