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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * NVM Express device driver
4 * Copyright (c) 2011-2014, Intel Corporation.
5 */
6
7#include <linux/async.h>
8#include <linux/blkdev.h>
9#include <linux/blk-mq.h>
10#include <linux/blk-integrity.h>
11#include <linux/compat.h>
12#include <linux/delay.h>
13#include <linux/errno.h>
14#include <linux/hdreg.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/backing-dev.h>
18#include <linux/slab.h>
19#include <linux/types.h>
20#include <linux/pr.h>
21#include <linux/ptrace.h>
22#include <linux/nvme_ioctl.h>
23#include <linux/pm_qos.h>
24#include <linux/ratelimit.h>
25#include <linux/unaligned.h>
26
27#include "nvme.h"
28#include "fabrics.h"
29#include <linux/nvme-auth.h>
30
31#define CREATE_TRACE_POINTS
32#include "trace.h"
33
34#define NVME_MINORS (1U << MINORBITS)
35
36/*
37 * Write hints (bio->bi_write_stream) are u8, so FDP placement handles beyond
38 * U8_MAX can never be selected. Cap the handle count to bound both the RUH
39 * status buffer and the per-head plids array.
40 */
41#define NVME_MAX_PLIDS U8_MAX
42
43struct nvme_ns_info {
44 struct nvme_ns_ids ids;
45 u32 nsid;
46 __le32 anagrpid;
47 u8 pi_offset;
48 u16 endgid;
49 u64 runs;
50 bool is_shared;
51 bool is_readonly;
52 bool is_ready;
53 bool is_removed;
54 bool is_rotational;
55 bool no_vwc;
56};
57
58unsigned int admin_timeout = 60;
59module_param(admin_timeout, uint, 0644);
60MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
61EXPORT_SYMBOL_GPL(admin_timeout);
62
63unsigned int nvme_io_timeout = 30;
64module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
65MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
66EXPORT_SYMBOL_GPL(nvme_io_timeout);
67
68static unsigned char shutdown_timeout = 5;
69module_param(shutdown_timeout, byte, 0644);
70MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
71
72static u8 nvme_max_retries = 5;
73module_param_named(max_retries, nvme_max_retries, byte, 0644);
74MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
75
76static unsigned long default_ps_max_latency_us = 100000;
77module_param(default_ps_max_latency_us, ulong, 0644);
78MODULE_PARM_DESC(default_ps_max_latency_us,
79 "max power saving latency for new devices; use PM QOS to change per device");
80
81static bool force_apst;
82module_param(force_apst, bool, 0644);
83MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
84
85static unsigned long apst_primary_timeout_ms = 100;
86module_param(apst_primary_timeout_ms, ulong, 0644);
87MODULE_PARM_DESC(apst_primary_timeout_ms,
88 "primary APST timeout in ms");
89
90static unsigned long apst_secondary_timeout_ms = 2000;
91module_param(apst_secondary_timeout_ms, ulong, 0644);
92MODULE_PARM_DESC(apst_secondary_timeout_ms,
93 "secondary APST timeout in ms");
94
95static unsigned long apst_primary_latency_tol_us = 15000;
96module_param(apst_primary_latency_tol_us, ulong, 0644);
97MODULE_PARM_DESC(apst_primary_latency_tol_us,
98 "primary APST latency tolerance in us");
99
100static unsigned long apst_secondary_latency_tol_us = 100000;
101module_param(apst_secondary_latency_tol_us, ulong, 0644);
102MODULE_PARM_DESC(apst_secondary_latency_tol_us,
103 "secondary APST latency tolerance in us");
104
105/*
106 * Older kernels didn't enable protection information if it was at an offset.
107 * Newer kernels do, so it breaks reads on the upgrade if such formats were
108 * used in prior kernels since the metadata written did not contain a valid
109 * checksum.
110 */
111static bool disable_pi_offsets = false;
112module_param(disable_pi_offsets, bool, 0444);
113MODULE_PARM_DESC(disable_pi_offsets,
114 "disable protection information if it has an offset");
115
116/*
117 * nvme_wq - hosts nvme related works that are not reset or delete
118 * nvme_reset_wq - hosts nvme reset works
119 * nvme_delete_wq - hosts nvme delete works
120 *
121 * nvme_wq will host works such as scan, aen handling, fw activation,
122 * keep-alive, periodic reconnects etc. nvme_reset_wq
123 * runs reset works which also flush works hosted on nvme_wq for
124 * serialization purposes. nvme_delete_wq host controller deletion
125 * works which flush reset works for serialization.
126 */
127struct workqueue_struct *nvme_wq;
128EXPORT_SYMBOL_GPL(nvme_wq);
129
130struct workqueue_struct *nvme_reset_wq;
131EXPORT_SYMBOL_GPL(nvme_reset_wq);
132
133struct workqueue_struct *nvme_delete_wq;
134EXPORT_SYMBOL_GPL(nvme_delete_wq);
135
136DEFINE_MUTEX(nvme_subsystems_lock);
137static LIST_HEAD_GUARDED(nvme_subsystems, nvme_subsystems_lock);
138
139static DEFINE_IDA(nvme_instance_ida);
140static dev_t nvme_ctrl_base_chr_devt;
141static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env);
142static const struct class nvme_class = {
143 .name = "nvme",
144 .dev_uevent = nvme_class_uevent,
145};
146
147static const struct class nvme_subsys_class = {
148 .name = "nvme-subsystem",
149};
150
151static DEFINE_IDA(nvme_ns_chr_minor_ida);
152static dev_t nvme_ns_chr_devt;
153static const struct class nvme_ns_chr_class = {
154 .name = "nvme-generic",
155};
156
157static void nvme_put_subsystem(struct nvme_subsystem *subsys);
158static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
159 struct nvme_command *cmd);
160static int nvme_get_log_lsi(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page,
161 u8 lsp, u8 csi, void *log, size_t size, u64 offset, u16 lsi);
162
163void nvme_queue_scan(struct nvme_ctrl *ctrl)
164{
165 /*
166 * Only new queue scan work when admin and IO queues are both alive
167 */
168 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
169 queue_work(nvme_wq, &ctrl->scan_work);
170}
171
172/*
173 * Use this function to proceed with scheduling reset_work for a controller
174 * that had previously been set to the resetting state. This is intended for
175 * code paths that can't be interrupted by other reset attempts. A hot removal
176 * may prevent this from succeeding.
177 */
178int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
179{
180 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
181 return -EBUSY;
182 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
183 return -EBUSY;
184 return 0;
185}
186EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
187
188static void nvme_failfast_work(struct work_struct *work)
189{
190 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
191 struct nvme_ctrl, failfast_work);
192
193 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
194 return;
195
196 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
197 dev_info(ctrl->device, "failfast expired\n");
198 nvme_kick_requeue_lists(ctrl);
199}
200
201static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
202{
203 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
204 return;
205
206 schedule_delayed_work(&ctrl->failfast_work,
207 ctrl->opts->fast_io_fail_tmo * HZ);
208}
209
210static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
211{
212 if (!ctrl->opts)
213 return;
214
215 cancel_delayed_work_sync(&ctrl->failfast_work);
216 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
217}
218
219
220int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
221{
222 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
223 return -EBUSY;
224 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
225 return -EBUSY;
226 return 0;
227}
228EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
229
230int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
231{
232 int ret;
233
234 ret = nvme_reset_ctrl(ctrl);
235 if (!ret) {
236 flush_work(&ctrl->reset_work);
237 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
238 ret = -ENETRESET;
239 }
240
241 return ret;
242}
243
244static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
245{
246 dev_info(ctrl->device,
247 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
248
249 flush_work(&ctrl->reset_work);
250 nvme_stop_ctrl(ctrl);
251 nvme_remove_namespaces(ctrl);
252 ctrl->ops->delete_ctrl(ctrl);
253 nvme_uninit_ctrl(ctrl);
254}
255
256static void nvme_delete_ctrl_work(struct work_struct *work)
257{
258 struct nvme_ctrl *ctrl =
259 container_of(work, struct nvme_ctrl, delete_work);
260
261 nvme_do_delete_ctrl(ctrl);
262}
263
264int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
265{
266 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
267 return -EBUSY;
268 if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
269 return -EBUSY;
270 return 0;
271}
272EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
273
274void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
275{
276 /*
277 * Keep a reference until nvme_do_delete_ctrl() complete,
278 * since ->delete_ctrl can free the controller.
279 */
280 nvme_get_ctrl(ctrl);
281 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
282 nvme_do_delete_ctrl(ctrl);
283 nvme_put_ctrl(ctrl);
284}
285
286static blk_status_t nvme_error_status(u16 status)
287{
288 switch (status & NVME_SCT_SC_MASK) {
289 case NVME_SC_SUCCESS:
290 return BLK_STS_OK;
291 case NVME_SC_CAP_EXCEEDED:
292 return BLK_STS_NOSPC;
293 case NVME_SC_LBA_RANGE:
294 case NVME_SC_CMD_INTERRUPTED:
295 case NVME_SC_NS_NOT_READY:
296 return BLK_STS_TARGET;
297 case NVME_SC_BAD_ATTRIBUTES:
298 case NVME_SC_INVALID_OPCODE:
299 case NVME_SC_INVALID_FIELD:
300 case NVME_SC_INVALID_NS:
301 return BLK_STS_NOTSUPP;
302 case NVME_SC_WRITE_FAULT:
303 case NVME_SC_READ_ERROR:
304 case NVME_SC_UNWRITTEN_BLOCK:
305 case NVME_SC_ACCESS_DENIED:
306 case NVME_SC_READ_ONLY:
307 case NVME_SC_COMPARE_FAILED:
308 return BLK_STS_MEDIUM;
309 case NVME_SC_GUARD_CHECK:
310 case NVME_SC_APPTAG_CHECK:
311 case NVME_SC_REFTAG_CHECK:
312 case NVME_SC_INVALID_PI:
313 return BLK_STS_PROTECTION;
314 case NVME_SC_RESERVATION_CONFLICT:
315 return BLK_STS_RESV_CONFLICT;
316 case NVME_SC_HOST_PATH_ERROR:
317 return BLK_STS_TRANSPORT;
318 case NVME_SC_ZONE_TOO_MANY_ACTIVE:
319 return BLK_STS_ZONE_ACTIVE_RESOURCE;
320 case NVME_SC_ZONE_TOO_MANY_OPEN:
321 return BLK_STS_ZONE_OPEN_RESOURCE;
322 default:
323 return BLK_STS_IOERR;
324 }
325}
326
327static void nvme_retry_req(struct request *req)
328{
329 unsigned long delay = 0;
330 u16 crd;
331 struct nvme_ns *ns = req->q->queuedata;
332
333 /* The mask and shift result must be <= 3 */
334 crd = (nvme_req(req)->status & NVME_STATUS_CRD) >> 11;
335 if (crd)
336 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
337
338 nvme_req(req)->retries++;
339 if (ns)
340 atomic_long_inc(&ns->retries);
341
342 blk_mq_requeue_request(req, false);
343 blk_mq_delay_kick_requeue_list(req->q, delay);
344}
345
346static void nvme_log_error(struct request *req)
347{
348 struct nvme_ns *ns = req->q->queuedata;
349 struct nvme_request *nr = nvme_req(req);
350
351 if (ns) {
352 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
353 ns->disk ? ns->disk->disk_name : "?",
354 nvme_get_opcode_str(nr->cmd->common.opcode),
355 nr->cmd->common.opcode,
356 nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
357 blk_rq_bytes(req) >> ns->head->lba_shift,
358 nvme_get_error_status_str(nr->status),
359 NVME_SCT(nr->status), /* Status Code Type */
360 nr->status & NVME_SC_MASK, /* Status Code */
361 nr->status & NVME_STATUS_MORE ? "MORE " : "",
362 nr->status & NVME_STATUS_DNR ? "DNR " : "");
363 return;
364 }
365
366 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
367 dev_name(nr->ctrl->device),
368 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
369 nr->cmd->common.opcode,
370 nvme_get_error_status_str(nr->status),
371 NVME_SCT(nr->status), /* Status Code Type */
372 nr->status & NVME_SC_MASK, /* Status Code */
373 nr->status & NVME_STATUS_MORE ? "MORE " : "",
374 nr->status & NVME_STATUS_DNR ? "DNR " : "");
375}
376
377static void nvme_log_err_passthru(struct request *req)
378{
379 struct nvme_ns *ns = req->q->queuedata;
380 struct nvme_request *nr = nvme_req(req);
381
382 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
383 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
384 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
385 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
386 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
387 nr->cmd->common.opcode,
388 nvme_get_error_status_str(nr->status),
389 NVME_SCT(nr->status), /* Status Code Type */
390 nr->status & NVME_SC_MASK, /* Status Code */
391 nr->status & NVME_STATUS_MORE ? "MORE " : "",
392 nr->status & NVME_STATUS_DNR ? "DNR " : "",
393 le32_to_cpu(nr->cmd->common.cdw10),
394 le32_to_cpu(nr->cmd->common.cdw11),
395 le32_to_cpu(nr->cmd->common.cdw12),
396 le32_to_cpu(nr->cmd->common.cdw13),
397 le32_to_cpu(nr->cmd->common.cdw14),
398 le32_to_cpu(nr->cmd->common.cdw15));
399}
400
401enum nvme_disposition {
402 COMPLETE,
403 RETRY,
404 FAILOVER,
405 AUTHENTICATE,
406};
407
408static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
409{
410 if (likely(nvme_req(req)->status == 0))
411 return COMPLETE;
412
413 if (blk_noretry_request(req) ||
414 (nvme_req(req)->status & NVME_STATUS_DNR) ||
415 nvme_req(req)->retries >= nvme_max_retries)
416 return COMPLETE;
417
418 if ((nvme_req(req)->status & NVME_SCT_SC_MASK) == NVME_SC_AUTH_REQUIRED)
419 return AUTHENTICATE;
420
421 if (req->cmd_flags & REQ_NVME_MPATH) {
422 if (nvme_is_path_error(nvme_req(req)->status) ||
423 blk_queue_dying(req->q))
424 return FAILOVER;
425 } else {
426 if (blk_queue_dying(req->q))
427 return COMPLETE;
428 }
429
430 return RETRY;
431}
432
433static inline void nvme_end_req_zoned(struct request *req)
434{
435 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
436 req_op(req) == REQ_OP_ZONE_APPEND) {
437 struct nvme_ns *ns = req->q->queuedata;
438
439 req->__sector = nvme_lba_to_sect(ns->head,
440 le64_to_cpu(nvme_req(req)->result.u64));
441 }
442}
443
444static inline void __nvme_end_req(struct request *req)
445{
446 struct nvme_ns *ns = req->q->queuedata;
447 struct nvme_request *nr = nvme_req(req);
448
449 if (unlikely(nr->status && !(req->rq_flags & RQF_QUIET))) {
450 if (blk_rq_is_passthrough(req))
451 nvme_log_err_passthru(req);
452 else
453 nvme_log_error(req);
454
455 if (ns)
456 atomic_long_inc(&ns->errors);
457 else
458 atomic_long_inc(&nr->ctrl->errors);
459 }
460 nvme_end_req_zoned(req);
461 nvme_trace_bio_complete(req);
462 if (req->cmd_flags & REQ_NVME_MPATH)
463 nvme_mpath_end_request(req);
464}
465
466void nvme_end_req(struct request *req)
467{
468 blk_status_t status = nvme_error_status(nvme_req(req)->status);
469
470 __nvme_end_req(req);
471 blk_mq_end_request(req, status);
472}
473
474static void __nvme_complete_rq(struct request *req)
475{
476 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
477
478 nvme_cleanup_cmd(req);
479
480 /*
481 * Completions of long-running commands should not be able to
482 * defer sending of periodic keep alives, since the controller
483 * may have completed processing such commands a long time ago
484 * (arbitrarily close to command submission time).
485 * req->deadline - req->timeout is the command submission time
486 * in jiffies.
487 */
488 if (ctrl->kas &&
489 req->deadline - req->timeout >= ctrl->ka_last_check_time)
490 ctrl->comp_seen = true;
491
492 switch (nvme_decide_disposition(req)) {
493 case COMPLETE:
494 nvme_end_req(req);
495 return;
496 case RETRY:
497 nvme_retry_req(req);
498 return;
499 case FAILOVER:
500 nvme_failover_req(req);
501 return;
502 case AUTHENTICATE:
503#ifdef CONFIG_NVME_HOST_AUTH
504 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
505 nvme_retry_req(req);
506#else
507 nvme_end_req(req);
508#endif
509 return;
510 }
511}
512
513void nvme_complete_rq(struct request *req)
514{
515 trace_nvme_complete_rq(req);
516 __nvme_complete_rq(req);
517}
518EXPORT_SYMBOL_GPL(nvme_complete_rq);
519
520void nvme_complete_batch_req(struct request *req)
521{
522 trace_nvme_complete_rq(req);
523 nvme_cleanup_cmd(req);
524 __nvme_end_req(req);
525}
526EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
527
528/*
529 * Called to unwind from ->queue_rq on a failed command submission so that the
530 * multipathing code gets called to potentially failover to another path.
531 * The caller needs to unwind all transport specific resource allocations and
532 * must return propagate the return value.
533 */
534blk_status_t nvme_host_path_error(struct request *req)
535{
536 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
537 blk_mq_set_request_complete(req);
538 __nvme_complete_rq(req);
539 return BLK_STS_OK;
540}
541EXPORT_SYMBOL_GPL(nvme_host_path_error);
542
543bool nvme_cancel_request(struct request *req, void *data)
544{
545 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
546 "Cancelling I/O %d", req->tag);
547
548 /* don't abort one completed or idle request */
549 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
550 return true;
551
552 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
553 nvme_req(req)->flags |= NVME_REQ_CANCELLED;
554 blk_mq_complete_request(req);
555 return true;
556}
557EXPORT_SYMBOL_GPL(nvme_cancel_request);
558
559void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
560{
561 if (ctrl->tagset) {
562 blk_mq_tagset_busy_iter(ctrl->tagset,
563 nvme_cancel_request, ctrl);
564 blk_mq_tagset_wait_completed_request(ctrl->tagset);
565 }
566}
567EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
568
569void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
570{
571 if (ctrl->admin_tagset) {
572 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
573 nvme_cancel_request, ctrl);
574 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
575 }
576}
577EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
578
579bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
580 enum nvme_ctrl_state new_state)
581{
582 enum nvme_ctrl_state old_state;
583 unsigned long flags;
584 bool changed = false;
585
586 spin_lock_irqsave(&ctrl->lock, flags);
587
588 old_state = nvme_ctrl_state(ctrl);
589 switch (new_state) {
590 case NVME_CTRL_LIVE:
591 switch (old_state) {
592 case NVME_CTRL_CONNECTING:
593 changed = true;
594 fallthrough;
595 default:
596 break;
597 }
598 break;
599 case NVME_CTRL_RESETTING:
600 switch (old_state) {
601 case NVME_CTRL_NEW:
602 case NVME_CTRL_LIVE:
603 changed = true;
604 atomic_long_inc(&ctrl->nr_reset);
605 fallthrough;
606 default:
607 break;
608 }
609 break;
610 case NVME_CTRL_CONNECTING:
611 switch (old_state) {
612 case NVME_CTRL_NEW:
613 case NVME_CTRL_RESETTING:
614 changed = true;
615 fallthrough;
616 default:
617 break;
618 }
619 break;
620 case NVME_CTRL_DELETING:
621 switch (old_state) {
622 case NVME_CTRL_LIVE:
623 case NVME_CTRL_RESETTING:
624 case NVME_CTRL_CONNECTING:
625 changed = true;
626 fallthrough;
627 default:
628 break;
629 }
630 break;
631 case NVME_CTRL_DELETING_NOIO:
632 switch (old_state) {
633 case NVME_CTRL_DELETING:
634 case NVME_CTRL_DEAD:
635 changed = true;
636 fallthrough;
637 default:
638 break;
639 }
640 break;
641 case NVME_CTRL_DEAD:
642 switch (old_state) {
643 case NVME_CTRL_DELETING:
644 changed = true;
645 fallthrough;
646 default:
647 break;
648 }
649 break;
650 default:
651 break;
652 }
653
654 if (changed) {
655 WRITE_ONCE(ctrl->state, new_state);
656 wake_up_all(&ctrl->state_wq);
657 }
658
659 spin_unlock_irqrestore(&ctrl->lock, flags);
660 if (!changed)
661 return false;
662
663 if (new_state == NVME_CTRL_LIVE) {
664 if (old_state == NVME_CTRL_CONNECTING)
665 nvme_stop_failfast_work(ctrl);
666 nvme_kick_requeue_lists(ctrl);
667 } else if (new_state == NVME_CTRL_CONNECTING &&
668 old_state == NVME_CTRL_RESETTING) {
669 nvme_start_failfast_work(ctrl);
670 }
671 return changed;
672}
673EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
674
675/*
676 * Waits for the controller state to be resetting, or returns false if it is
677 * not possible to ever transition to that state.
678 */
679bool nvme_wait_reset(struct nvme_ctrl *ctrl)
680{
681 wait_event(ctrl->state_wq,
682 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
683 nvme_state_terminal(ctrl));
684 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
685}
686EXPORT_SYMBOL_GPL(nvme_wait_reset);
687
688static void nvme_free_ns_head(struct kref *ref)
689{
690 struct nvme_ns_head *head =
691 container_of(ref, struct nvme_ns_head, ref);
692
693 nvme_mpath_put_disk(head);
694 ida_free(&head->subsys->ns_ida, head->instance);
695 cleanup_srcu_struct(&head->srcu);
696 nvme_put_subsystem(head->subsys);
697 kfree(head->plids);
698 kfree(head);
699}
700
701void nvme_get_ns_head(struct nvme_ns_head *head)
702{
703 kref_get(&head->ref);
704}
705
706bool nvme_tryget_ns_head(struct nvme_ns_head *head)
707{
708 return kref_get_unless_zero(&head->ref);
709}
710
711void nvme_put_ns_head(struct nvme_ns_head *head)
712{
713 kref_put(&head->ref, nvme_free_ns_head);
714}
715
716static void nvme_free_ns(struct kref *kref)
717{
718 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
719
720 put_disk(ns->disk);
721 nvme_put_ns_head(ns->head);
722 nvme_put_ctrl(ns->ctrl);
723 kfree(ns);
724}
725
726bool nvme_get_ns(struct nvme_ns *ns)
727{
728 return kref_get_unless_zero(&ns->kref);
729}
730
731void nvme_put_ns(struct nvme_ns *ns)
732{
733 kref_put(&ns->kref, nvme_free_ns);
734}
735EXPORT_SYMBOL_NS_GPL(nvme_put_ns, "NVME_TARGET_PASSTHRU");
736
737static inline void nvme_clear_nvme_request(struct request *req)
738{
739 nvme_req(req)->status = 0;
740 nvme_req(req)->retries = 0;
741 nvme_req(req)->flags = 0;
742 req->rq_flags |= RQF_DONTPREP;
743}
744
745/* initialize a passthrough request */
746void nvme_init_request(struct request *req, struct nvme_command *cmd)
747{
748 struct nvme_request *nr = nvme_req(req);
749 bool logging_enabled;
750
751 if (req->q->queuedata) {
752 struct nvme_ns *ns = req->q->disk->private_data;
753
754 logging_enabled = ns->head->passthru_err_log_enabled;
755 } else { /* no queuedata implies admin queue */
756 logging_enabled = nr->ctrl->passthru_err_log_enabled;
757 }
758
759 if (!logging_enabled)
760 req->rq_flags |= RQF_QUIET;
761
762 /* passthru commands should let the driver set the SGL flags */
763 cmd->common.flags &= ~NVME_CMD_SGL_ALL;
764
765 req->cmd_flags |= REQ_FAILFAST_DRIVER;
766 if (req->mq_hctx->type == HCTX_TYPE_POLL)
767 req->cmd_flags |= REQ_POLLED;
768 nvme_clear_nvme_request(req);
769 memcpy(nr->cmd, cmd, sizeof(*cmd));
770}
771EXPORT_SYMBOL_GPL(nvme_init_request);
772
773/*
774 * For something we're not in a state to send to the device the default action
775 * is to busy it and retry it after the controller state is recovered. However,
776 * if the controller is deleting or if anything is marked for failfast or
777 * nvme multipath it is immediately failed.
778 *
779 * Note: commands used to initialize the controller will be marked for failfast.
780 * Note: nvme cli/ioctl commands are marked for failfast.
781 */
782blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
783 struct request *rq)
784{
785 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
786
787 if (state != NVME_CTRL_DELETING_NOIO &&
788 state != NVME_CTRL_DELETING &&
789 state != NVME_CTRL_DEAD &&
790 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
791 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
792 return BLK_STS_RESOURCE;
793
794 if (!(rq->rq_flags & RQF_DONTPREP))
795 nvme_clear_nvme_request(rq);
796
797 return nvme_host_path_error(rq);
798}
799EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
800
801bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
802 bool queue_live, enum nvme_ctrl_state state)
803{
804 struct nvme_request *req = nvme_req(rq);
805
806 /*
807 * currently we have a problem sending passthru commands
808 * on the admin_q if the controller is not LIVE because we can't
809 * make sure that they are going out after the admin connect,
810 * controller enable and/or other commands in the initialization
811 * sequence. until the controller will be LIVE, fail with
812 * BLK_STS_RESOURCE so that they will be rescheduled.
813 */
814 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
815 return false;
816
817 if (ctrl->ops->flags & NVME_F_FABRICS) {
818 /*
819 * Only allow commands on a live queue, except for the connect
820 * command, which is require to set the queue live in the
821 * appropinquate states.
822 */
823 switch (state) {
824 case NVME_CTRL_CONNECTING:
825 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
826 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
827 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
828 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
829 return true;
830 break;
831 default:
832 break;
833 case NVME_CTRL_DEAD:
834 return false;
835 }
836 }
837
838 return queue_live;
839}
840EXPORT_SYMBOL_GPL(__nvme_check_ready);
841
842static inline void nvme_setup_flush(struct nvme_ns *ns,
843 struct nvme_command *cmnd)
844{
845 memset(cmnd, 0, sizeof(*cmnd));
846 cmnd->common.opcode = nvme_cmd_flush;
847 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
848}
849
850static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
851 struct nvme_command *cmnd)
852{
853 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
854 struct nvme_dsm_range *range;
855 struct bio *bio;
856
857 /*
858 * Some devices do not consider the DSM 'Number of Ranges' field when
859 * determining how much data to DMA. Always allocate memory for maximum
860 * number of segments to prevent device reading beyond end of buffer.
861 */
862 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
863
864 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
865 if (!range) {
866 /*
867 * If we fail allocation our range, fallback to the controller
868 * discard page. If that's also busy, it's safe to return
869 * busy, as we know we can make progress once that's freed.
870 */
871 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
872 return BLK_STS_RESOURCE;
873
874 range = page_address(ns->ctrl->discard_page);
875 }
876
877 if (queue_max_discard_segments(req->q) == 1) {
878 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
879 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
880
881 range[0].cattr = cpu_to_le32(0);
882 range[0].nlb = cpu_to_le32(nlb);
883 range[0].slba = cpu_to_le64(slba);
884 n = 1;
885 } else {
886 __rq_for_each_bio(bio, req) {
887 u64 slba = nvme_sect_to_lba(ns->head,
888 bio->bi_iter.bi_sector);
889 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
890
891 if (n < segments) {
892 range[n].cattr = cpu_to_le32(0);
893 range[n].nlb = cpu_to_le32(nlb);
894 range[n].slba = cpu_to_le64(slba);
895 }
896 n++;
897 }
898 }
899
900 if (WARN_ON_ONCE(n != segments)) {
901 if (virt_to_page(range) == ns->ctrl->discard_page)
902 clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
903 else
904 kfree(range);
905 return BLK_STS_IOERR;
906 }
907
908 memset(cmnd, 0, sizeof(*cmnd));
909 cmnd->dsm.opcode = nvme_cmd_dsm;
910 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
911 cmnd->dsm.nr = cpu_to_le32(segments - 1);
912 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
913
914 bvec_set_virt(&req->special_vec, range, alloc_size);
915 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
916
917 return BLK_STS_OK;
918}
919
920static void nvme_set_app_tag(struct request *req, struct nvme_command *cmnd)
921{
922 cmnd->rw.lbat = cpu_to_le16(bio_integrity(req->bio)->app_tag);
923 cmnd->rw.lbatm = cpu_to_le16(0xffff);
924}
925
926static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
927 struct request *req)
928{
929 u32 upper, lower;
930 u64 ref48;
931
932 /* only type1 and type 2 PI formats have a reftag */
933 switch (ns->head->pi_type) {
934 case NVME_NS_DPS_PI_TYPE1:
935 case NVME_NS_DPS_PI_TYPE2:
936 break;
937 default:
938 return;
939 }
940
941 /* both rw and write zeroes share the same reftag format */
942 switch (ns->head->guard_type) {
943 case NVME_NVM_NS_16B_GUARD:
944 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
945 break;
946 case NVME_NVM_NS_64B_GUARD:
947 ref48 = ext_pi_ref_tag(req);
948 lower = lower_32_bits(ref48);
949 upper = upper_32_bits(ref48);
950
951 cmnd->rw.reftag = cpu_to_le32(lower);
952 cmnd->rw.cdw3 = cpu_to_le32(upper);
953 break;
954 default:
955 break;
956 }
957}
958
959static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
960 struct request *req, struct nvme_command *cmnd)
961{
962 memset(cmnd, 0, sizeof(*cmnd));
963
964 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
965 return nvme_setup_discard(ns, req, cmnd);
966
967 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
968 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
969 cmnd->write_zeroes.slba =
970 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
971 cmnd->write_zeroes.length =
972 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
973
974 if (!(req->cmd_flags & REQ_NOUNMAP) &&
975 (ns->head->features & NVME_NS_DEAC))
976 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
977
978 if (nvme_ns_has_pi(ns->head)) {
979 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
980 nvme_set_ref_tag(ns, cmnd, req);
981 }
982
983 return BLK_STS_OK;
984}
985
986/*
987 * NVMe does not support a dedicated command to issue an atomic write. A write
988 * which does adhere to the device atomic limits will silently be executed
989 * non-atomically. The request issuer should ensure that the write is within
990 * the queue atomic writes limits, but just validate this in case it is not.
991 */
992static bool nvme_valid_atomic_write(struct request *req)
993{
994 struct request_queue *q = req->q;
995 u32 boundary_bytes = queue_atomic_write_boundary_bytes(q);
996
997 if (blk_rq_bytes(req) > queue_atomic_write_unit_max_bytes(q))
998 return false;
999
1000 if (boundary_bytes) {
1001 u64 mask = boundary_bytes - 1, imask = ~mask;
1002 u64 start = blk_rq_pos(req) << SECTOR_SHIFT;
1003 u64 end = start + blk_rq_bytes(req) - 1;
1004
1005 /* If greater then must be crossing a boundary */
1006 if (blk_rq_bytes(req) > boundary_bytes)
1007 return false;
1008
1009 if ((start & imask) != (end & imask))
1010 return false;
1011 }
1012
1013 return true;
1014}
1015
1016static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
1017 struct request *req, struct nvme_command *cmnd,
1018 enum nvme_opcode op)
1019{
1020 u16 control = 0;
1021 u32 dsmgmt = 0;
1022
1023 if (req->cmd_flags & REQ_FUA)
1024 control |= NVME_RW_FUA;
1025 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
1026 control |= NVME_RW_LR;
1027
1028 if (req->cmd_flags & REQ_RAHEAD)
1029 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
1030
1031 if (op == nvme_cmd_write && ns->head->nr_plids) {
1032 u16 write_stream = req->bio->bi_write_stream;
1033
1034 if (WARN_ON_ONCE(write_stream > ns->head->nr_plids))
1035 return BLK_STS_INVAL;
1036
1037 if (write_stream) {
1038 dsmgmt |= ns->head->plids[write_stream - 1] << 16;
1039 control |= NVME_RW_DTYPE_DPLCMT;
1040 }
1041 }
1042
1043 if (req->cmd_flags & REQ_ATOMIC && !nvme_valid_atomic_write(req))
1044 return BLK_STS_INVAL;
1045
1046 cmnd->rw.opcode = op;
1047 cmnd->rw.flags = 0;
1048 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
1049 cmnd->rw.cdw2 = 0;
1050 cmnd->rw.cdw3 = 0;
1051 cmnd->rw.metadata = 0;
1052 cmnd->rw.slba =
1053 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
1054 cmnd->rw.length =
1055 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
1056 cmnd->rw.reftag = 0;
1057 cmnd->rw.lbat = 0;
1058 cmnd->rw.lbatm = 0;
1059
1060 if (ns->head->ms) {
1061 /*
1062 * If formatted with metadata, the block layer always provides a
1063 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
1064 * we enable the PRACT bit for protection information or set the
1065 * namespace capacity to zero to prevent any I/O.
1066 */
1067 if (!blk_integrity_rq(req)) {
1068 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
1069 return BLK_STS_NOTSUPP;
1070 control |= NVME_RW_PRINFO_PRACT;
1071 nvme_set_ref_tag(ns, cmnd, req);
1072 }
1073
1074 if (bio_integrity_flagged(req->bio, BIP_CHECK_GUARD))
1075 control |= NVME_RW_PRINFO_PRCHK_GUARD;
1076 if (bio_integrity_flagged(req->bio, BIP_CHECK_REFTAG)) {
1077 control |= NVME_RW_PRINFO_PRCHK_REF;
1078 if (op == nvme_cmd_zone_append)
1079 control |= NVME_RW_APPEND_PIREMAP;
1080 nvme_set_ref_tag(ns, cmnd, req);
1081 }
1082 if (bio_integrity_flagged(req->bio, BIP_CHECK_APPTAG)) {
1083 control |= NVME_RW_PRINFO_PRCHK_APP;
1084 nvme_set_app_tag(req, cmnd);
1085 }
1086 }
1087
1088 cmnd->rw.control = cpu_to_le16(control);
1089 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
1090 return 0;
1091}
1092
1093void nvme_cleanup_cmd(struct request *req)
1094{
1095 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1096 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1097
1098 if (req->special_vec.bv_page == ctrl->discard_page)
1099 clear_bit_unlock(0, &ctrl->discard_page_busy);
1100 else
1101 kfree(bvec_virt(&req->special_vec));
1102 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD;
1103 }
1104}
1105EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1106
1107blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1108{
1109 struct nvme_command *cmd = nvme_req(req)->cmd;
1110 blk_status_t ret = BLK_STS_OK;
1111
1112 if (!(req->rq_flags & RQF_DONTPREP))
1113 nvme_clear_nvme_request(req);
1114
1115 switch (req_op(req)) {
1116 case REQ_OP_DRV_IN:
1117 case REQ_OP_DRV_OUT:
1118 /* these are setup prior to execution in nvme_init_request() */
1119 break;
1120 case REQ_OP_FLUSH:
1121 nvme_setup_flush(ns, cmd);
1122 break;
1123 case REQ_OP_ZONE_RESET_ALL:
1124 case REQ_OP_ZONE_RESET:
1125 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1126 break;
1127 case REQ_OP_ZONE_OPEN:
1128 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1129 break;
1130 case REQ_OP_ZONE_CLOSE:
1131 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1132 break;
1133 case REQ_OP_ZONE_FINISH:
1134 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1135 break;
1136 case REQ_OP_WRITE_ZEROES:
1137 ret = nvme_setup_write_zeroes(ns, req, cmd);
1138 break;
1139 case REQ_OP_DISCARD:
1140 ret = nvme_setup_discard(ns, req, cmd);
1141 break;
1142 case REQ_OP_READ:
1143 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1144 break;
1145 case REQ_OP_WRITE:
1146 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1147 break;
1148 case REQ_OP_ZONE_APPEND:
1149 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1150 break;
1151 default:
1152 WARN_ON_ONCE(1);
1153 return BLK_STS_IOERR;
1154 }
1155
1156 cmd->common.command_id = nvme_cid(req);
1157 trace_nvme_setup_cmd(req, cmd);
1158 return ret;
1159}
1160EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1161
1162/*
1163 * Return values:
1164 * 0: success
1165 * >0: nvme controller's cqe status response
1166 * <0: kernel error in lieu of controller response
1167 */
1168int nvme_execute_rq(struct request *rq, bool at_head)
1169{
1170 blk_status_t status;
1171
1172 status = blk_execute_rq(rq, at_head);
1173 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1174 return -EINTR;
1175 if (nvme_req(rq)->status)
1176 return nvme_req(rq)->status;
1177 return blk_status_to_errno(status);
1178}
1179EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, "NVME_TARGET_PASSTHRU");
1180
1181/*
1182 * Returns 0 on success. If the result is negative, it's a Linux error code;
1183 * if the result is positive, it's an NVM Express status code
1184 */
1185int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1186 union nvme_result *result, void *buffer, unsigned bufflen,
1187 int qid, nvme_submit_flags_t flags)
1188{
1189 struct request *req;
1190 int ret;
1191 blk_mq_req_flags_t blk_flags = 0;
1192
1193 if (flags & NVME_SUBMIT_NOWAIT)
1194 blk_flags |= BLK_MQ_REQ_NOWAIT;
1195 if (flags & NVME_SUBMIT_RESERVED)
1196 blk_flags |= BLK_MQ_REQ_RESERVED;
1197 if (qid == NVME_QID_ANY)
1198 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1199 else
1200 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1201 qid - 1);
1202
1203 if (IS_ERR(req))
1204 return PTR_ERR(req);
1205 nvme_init_request(req, cmd);
1206 if (flags & NVME_SUBMIT_RETRY)
1207 req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1208
1209 if (buffer && bufflen) {
1210 ret = blk_rq_map_kern(req, buffer, bufflen, GFP_KERNEL);
1211 if (ret)
1212 goto out;
1213 }
1214
1215 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1216 if (result && ret >= 0)
1217 *result = nvme_req(req)->result;
1218 out:
1219 blk_mq_free_request(req);
1220 return ret;
1221}
1222EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1223
1224int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1225 void *buffer, unsigned bufflen)
1226{
1227 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1228 NVME_QID_ANY, 0);
1229}
1230EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1231
1232u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1233{
1234 u32 effects = 0;
1235
1236 if (ns) {
1237 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1238 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1239 dev_warn_once(ctrl->device,
1240 "IO command:%02x has unusual effects:%08x\n",
1241 opcode, effects);
1242
1243 /*
1244 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1245 * which would deadlock when done on an I/O command. Note that
1246 * We already warn about an unusual effect above.
1247 */
1248 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1249 } else {
1250 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1251
1252 /* Ignore execution restrictions if any relaxation bits are set */
1253 if (effects & NVME_CMD_EFFECTS_CSER_MASK)
1254 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1255 }
1256
1257 return effects;
1258}
1259EXPORT_SYMBOL_NS_GPL(nvme_command_effects, "NVME_TARGET_PASSTHRU");
1260
1261u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1262{
1263 u32 effects = nvme_command_effects(ctrl, ns, opcode);
1264
1265 /*
1266 * For simplicity, IO to all namespaces is quiesced even if the command
1267 * effects say only one namespace is affected.
1268 */
1269 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1270 mutex_lock(&ctrl->scan_lock);
1271 mutex_lock(&ctrl->subsys->lock);
1272 nvme_mpath_start_freeze(ctrl->subsys);
1273 nvme_mpath_wait_freeze(ctrl->subsys);
1274 nvme_start_freeze(ctrl);
1275 nvme_wait_freeze(ctrl);
1276 }
1277 return effects;
1278}
1279EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, "NVME_TARGET_PASSTHRU");
1280
1281u32 nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1282 struct nvme_command *cmd, int status)
1283{
1284 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1285 nvme_unfreeze(ctrl);
1286 nvme_mpath_unfreeze(ctrl->subsys);
1287 mutex_unlock(&ctrl->subsys->lock);
1288 mutex_unlock(&ctrl->scan_lock);
1289 }
1290 if (effects & NVME_CMD_EFFECTS_CCC) {
1291 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1292 &ctrl->flags)) {
1293 dev_info(ctrl->device,
1294"controller capabilities changed, reset may be required to take effect.\n");
1295 }
1296 }
1297 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1298 nvme_queue_scan(ctrl);
1299 flush_work(&ctrl->scan_work);
1300 }
1301 if (ns)
1302 return effects;
1303
1304 switch (cmd->common.opcode) {
1305 case nvme_admin_set_features:
1306 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1307 case NVME_FEAT_KATO:
1308 /*
1309 * Keep alive commands interval on the host should be
1310 * updated when KATO is modified by Set Features
1311 * commands.
1312 */
1313 if (!status)
1314 nvme_update_keep_alive(ctrl, cmd);
1315 break;
1316 default:
1317 break;
1318 }
1319 break;
1320 default:
1321 break;
1322 }
1323
1324 return effects;
1325}
1326EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, "NVME_TARGET_PASSTHRU");
1327
1328/*
1329 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1330 *
1331 * The host should send Keep Alive commands at half of the Keep Alive Timeout
1332 * accounting for transport roundtrip times [..].
1333 */
1334static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1335{
1336 unsigned long delay = ctrl->kato * HZ / 2;
1337
1338 /*
1339 * When using Traffic Based Keep Alive, we need to run
1340 * nvme_keep_alive_work at twice the normal frequency, as one
1341 * command completion can postpone sending a keep alive command
1342 * by up to twice the delay between runs.
1343 */
1344 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1345 delay /= 2;
1346 return delay;
1347}
1348
1349static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1350{
1351 unsigned long now = jiffies;
1352 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1353 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1354
1355 if (time_after(now, ka_next_check_tm))
1356 delay = 0;
1357 else
1358 delay = ka_next_check_tm - now;
1359
1360 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1361}
1362
1363static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1364 blk_status_t status,
1365 const struct io_comp_batch *iob)
1366{
1367 struct nvme_ctrl *ctrl = rq->end_io_data;
1368 unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1369 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1370 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
1371
1372 /*
1373 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1374 * at the desired frequency.
1375 */
1376 if (rtt <= delay) {
1377 delay -= rtt;
1378 } else {
1379 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1380 jiffies_to_msecs(rtt));
1381 delay = 0;
1382 }
1383
1384 blk_mq_free_request(rq);
1385
1386 if (status) {
1387 dev_err(ctrl->device,
1388 "failed nvme_keep_alive_end_io error=%d\n",
1389 status);
1390 return RQ_END_IO_NONE;
1391 }
1392
1393 ctrl->ka_last_check_time = jiffies;
1394 ctrl->comp_seen = false;
1395 if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING)
1396 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1397 return RQ_END_IO_NONE;
1398}
1399
1400static void nvme_keep_alive_work(struct work_struct *work)
1401{
1402 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1403 struct nvme_ctrl, ka_work);
1404 bool comp_seen = ctrl->comp_seen;
1405 struct request *rq;
1406
1407 ctrl->ka_last_check_time = jiffies;
1408
1409 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1410 dev_dbg(ctrl->device,
1411 "reschedule traffic based keep-alive timer\n");
1412 ctrl->comp_seen = false;
1413 nvme_queue_keep_alive_work(ctrl);
1414 return;
1415 }
1416
1417 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1418 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1419 if (IS_ERR(rq)) {
1420 /* allocation failure, reset the controller */
1421 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1422 nvme_reset_ctrl(ctrl);
1423 return;
1424 }
1425 nvme_init_request(rq, &ctrl->ka_cmd);
1426
1427 rq->timeout = ctrl->kato * HZ;
1428 rq->end_io = nvme_keep_alive_end_io;
1429 rq->end_io_data = ctrl;
1430 blk_execute_rq_nowait(rq, false);
1431}
1432
1433static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1434{
1435 if (unlikely(ctrl->kato == 0))
1436 return;
1437
1438 nvme_queue_keep_alive_work(ctrl);
1439}
1440
1441void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1442{
1443 if (unlikely(ctrl->kato == 0))
1444 return;
1445
1446 cancel_delayed_work_sync(&ctrl->ka_work);
1447}
1448EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1449
1450static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1451 struct nvme_command *cmd)
1452{
1453 unsigned int new_kato =
1454 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1455
1456 dev_info(ctrl->device,
1457 "keep alive interval updated from %u ms to %u ms\n",
1458 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1459
1460 nvme_stop_keep_alive(ctrl);
1461 ctrl->kato = new_kato;
1462 nvme_start_keep_alive(ctrl);
1463}
1464
1465static bool nvme_id_cns_ok(struct nvme_ctrl *ctrl, u8 cns)
1466{
1467 /*
1468 * The CNS field occupies a full byte starting with NVMe 1.2
1469 */
1470 if (ctrl->vs >= NVME_VS(1, 2, 0))
1471 return true;
1472
1473 /*
1474 * NVMe 1.1 expanded the CNS value to two bits, which means values
1475 * larger than that could get truncated and treated as an incorrect
1476 * value.
1477 *
1478 * Qemu implemented 1.0 behavior for controllers claiming 1.1
1479 * compliance, so they need to be quirked here.
1480 */
1481 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1482 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS))
1483 return cns <= 3;
1484
1485 /*
1486 * NVMe 1.0 used a single bit for the CNS value.
1487 */
1488 return cns <= 1;
1489}
1490
1491static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1492{
1493 struct nvme_command c = { };
1494 int error;
1495
1496 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1497 c.identify.opcode = nvme_admin_identify;
1498 c.identify.cns = NVME_ID_CNS_CTRL;
1499
1500 *id = kmalloc_obj(struct nvme_id_ctrl);
1501 if (!*id)
1502 return -ENOMEM;
1503
1504 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1505 sizeof(struct nvme_id_ctrl));
1506 if (error) {
1507 kfree(*id);
1508 *id = NULL;
1509 }
1510 return error;
1511}
1512
1513static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1514 struct nvme_ns_id_desc *cur, bool *csi_seen)
1515{
1516 const char *warn_str = "ctrl returned bogus length:";
1517 void *data = cur;
1518
1519 switch (cur->nidt) {
1520 case NVME_NIDT_EUI64:
1521 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1522 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1523 warn_str, cur->nidl);
1524 return -1;
1525 }
1526 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1527 return NVME_NIDT_EUI64_LEN;
1528 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1529 return NVME_NIDT_EUI64_LEN;
1530 case NVME_NIDT_NGUID:
1531 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1532 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1533 warn_str, cur->nidl);
1534 return -1;
1535 }
1536 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1537 return NVME_NIDT_NGUID_LEN;
1538 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1539 return NVME_NIDT_NGUID_LEN;
1540 case NVME_NIDT_UUID:
1541 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1542 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1543 warn_str, cur->nidl);
1544 return -1;
1545 }
1546 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1547 return NVME_NIDT_UUID_LEN;
1548 uuid_copy(&ids->uuid, data + sizeof(*cur));
1549 return NVME_NIDT_UUID_LEN;
1550 case NVME_NIDT_CSI:
1551 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1552 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1553 warn_str, cur->nidl);
1554 return -1;
1555 }
1556 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1557 *csi_seen = true;
1558 return NVME_NIDT_CSI_LEN;
1559 default:
1560 /* Skip unknown types */
1561 return cur->nidl;
1562 }
1563}
1564
1565static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1566 struct nvme_ns_info *info)
1567{
1568 struct nvme_command c = { };
1569 bool csi_seen = false;
1570 int status, pos, len;
1571 void *data;
1572
1573 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1574 return 0;
1575 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1576 return 0;
1577
1578 c.identify.opcode = nvme_admin_identify;
1579 c.identify.nsid = cpu_to_le32(info->nsid);
1580 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1581
1582 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1583 if (!data)
1584 return -ENOMEM;
1585
1586 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1587 NVME_IDENTIFY_DATA_SIZE);
1588 if (status) {
1589 dev_warn(ctrl->device,
1590 "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1591 info->nsid, status);
1592 goto free_data;
1593 }
1594
1595 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1596 struct nvme_ns_id_desc *cur = data + pos;
1597
1598 if (pos + sizeof(*cur) > NVME_IDENTIFY_DATA_SIZE)
1599 break;
1600 if (cur->nidl == 0)
1601 break;
1602 if (pos + sizeof(*cur) + cur->nidl > NVME_IDENTIFY_DATA_SIZE)
1603 break;
1604
1605 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1606 if (len < 0)
1607 break;
1608
1609 len += sizeof(*cur);
1610 }
1611
1612 if (nvme_multi_css(ctrl) && !csi_seen) {
1613 dev_warn(ctrl->device, "Command set not reported for nsid:%u\n",
1614 info->nsid);
1615 status = -EINVAL;
1616 }
1617
1618free_data:
1619 kfree(data);
1620 return status;
1621}
1622
1623int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1624 struct nvme_id_ns **id)
1625{
1626 struct nvme_command c = { };
1627 int error;
1628
1629 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1630 c.identify.opcode = nvme_admin_identify;
1631 c.identify.nsid = cpu_to_le32(nsid);
1632 c.identify.cns = NVME_ID_CNS_NS;
1633
1634 *id = kmalloc_obj(**id);
1635 if (!*id)
1636 return -ENOMEM;
1637
1638 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1639 if (error) {
1640 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1641 kfree(*id);
1642 *id = NULL;
1643 }
1644 return error;
1645}
1646
1647static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1648 struct nvme_ns_info *info)
1649{
1650 struct nvme_ns_ids *ids = &info->ids;
1651 struct nvme_id_ns *id;
1652 int ret;
1653
1654 ret = nvme_identify_ns(ctrl, info->nsid, &id);
1655 if (ret)
1656 return ret;
1657
1658 if (id->ncap == 0) {
1659 /* namespace not allocated or attached */
1660 info->is_removed = true;
1661 ret = -ENODEV;
1662 goto error;
1663 }
1664
1665 info->anagrpid = id->anagrpid;
1666 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1667 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1668 info->is_ready = true;
1669 info->endgid = le16_to_cpu(id->endgid);
1670 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1671 dev_info(ctrl->device,
1672 "Ignoring bogus Namespace Identifiers\n");
1673 } else {
1674 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1675 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1676 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1677 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1678 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1679 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1680 }
1681
1682error:
1683 kfree(id);
1684 return ret;
1685}
1686
1687static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1688 struct nvme_ns_info *info)
1689{
1690 struct nvme_id_ns_cs_indep *id;
1691 struct nvme_command c = {
1692 .identify.opcode = nvme_admin_identify,
1693 .identify.nsid = cpu_to_le32(info->nsid),
1694 .identify.cns = NVME_ID_CNS_NS_CS_INDEP,
1695 };
1696 int ret;
1697
1698 id = kmalloc_obj(*id);
1699 if (!id)
1700 return -ENOMEM;
1701
1702 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1703 if (!ret) {
1704 info->anagrpid = id->anagrpid;
1705 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1706 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1707 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1708 info->is_rotational = id->nsfeat & NVME_NS_ROTATIONAL;
1709 info->no_vwc = id->nsfeat & NVME_NS_VWC_NOT_PRESENT;
1710 info->endgid = le16_to_cpu(id->endgid);
1711 }
1712 kfree(id);
1713 return ret;
1714}
1715
1716static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1717 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1718{
1719 union nvme_result res = { 0 };
1720 struct nvme_command c = { };
1721 int ret;
1722
1723 c.features.opcode = op;
1724 c.features.fid = cpu_to_le32(fid);
1725 c.features.dword11 = cpu_to_le32(dword11);
1726
1727 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1728 buffer, buflen, NVME_QID_ANY, 0);
1729 if (ret >= 0 && result)
1730 *result = le32_to_cpu(res.u32);
1731 return ret;
1732}
1733
1734int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1735 unsigned int dword11, void *buffer, size_t buflen,
1736 void *result)
1737{
1738 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1739 buflen, result);
1740}
1741EXPORT_SYMBOL_GPL(nvme_set_features);
1742
1743int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1744 unsigned int dword11, void *buffer, size_t buflen,
1745 void *result)
1746{
1747 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1748 buflen, result);
1749}
1750EXPORT_SYMBOL_GPL(nvme_get_features);
1751
1752int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1753{
1754 u32 q_count = (*count - 1) | ((*count - 1) << 16);
1755 u32 result;
1756 int status, nr_io_queues;
1757
1758 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1759 &result);
1760
1761 /*
1762 * It's either a kernel error or the host observed a connection
1763 * lost. In either case it's not possible communicate with the
1764 * controller and thus enter the error code path.
1765 */
1766 if (status < 0 || status == NVME_SC_HOST_PATH_ERROR)
1767 return status;
1768
1769 /*
1770 * Degraded controllers might return an error when setting the queue
1771 * count. We still want to be able to bring them online and offer
1772 * access to the admin queue, as that might be only way to fix them up.
1773 */
1774 if (status > 0) {
1775 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1776 *count = 0;
1777 } else {
1778 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1779 *count = min(*count, nr_io_queues);
1780 }
1781
1782 return 0;
1783}
1784EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1785
1786#define NVME_AEN_SUPPORTED \
1787 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1788 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1789
1790static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1791{
1792 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1793 int status;
1794
1795 if (!supported_aens)
1796 return;
1797
1798 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1799 NULL, 0, &result);
1800 if (status)
1801 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1802 supported_aens);
1803
1804 queue_work(nvme_wq, &ctrl->async_event_work);
1805}
1806
1807static int nvme_ns_open(struct nvme_ns *ns)
1808{
1809
1810 /* should never be called due to GENHD_FL_HIDDEN */
1811 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1812 goto fail;
1813 if (!nvme_get_ns(ns))
1814 goto fail;
1815 if (!try_module_get(ns->ctrl->ops->module))
1816 goto fail_put_ns;
1817
1818 return 0;
1819
1820fail_put_ns:
1821 nvme_put_ns(ns);
1822fail:
1823 return -ENXIO;
1824}
1825
1826static void nvme_ns_release(struct nvme_ns *ns)
1827{
1828
1829 module_put(ns->ctrl->ops->module);
1830 nvme_put_ns(ns);
1831}
1832
1833static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1834{
1835 return nvme_ns_open(disk->private_data);
1836}
1837
1838static void nvme_release(struct gendisk *disk)
1839{
1840 nvme_ns_release(disk->private_data);
1841}
1842
1843int nvme_getgeo(struct gendisk *disk, struct hd_geometry *geo)
1844{
1845 /* some standard values */
1846 geo->heads = 1 << 6;
1847 geo->sectors = 1 << 5;
1848 geo->cylinders = get_capacity(disk) >> 11;
1849 return 0;
1850}
1851
1852static bool nvme_init_integrity(struct nvme_ns_head *head,
1853 struct queue_limits *lim, struct nvme_ns_info *info)
1854{
1855 struct blk_integrity *bi = &lim->integrity;
1856
1857 memset(bi, 0, sizeof(*bi));
1858
1859 if (!head->ms)
1860 return true;
1861
1862 /*
1863 * PI can always be supported as we can ask the controller to simply
1864 * insert/strip it, which is not possible for other kinds of metadata.
1865 */
1866 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) ||
1867 !(head->features & NVME_NS_METADATA_SUPPORTED))
1868 return nvme_ns_has_pi(head);
1869
1870 switch (head->pi_type) {
1871 case NVME_NS_DPS_PI_TYPE3:
1872 switch (head->guard_type) {
1873 case NVME_NVM_NS_16B_GUARD:
1874 bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1875 bi->tag_size = sizeof(u16) + sizeof(u32);
1876 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1877 break;
1878 case NVME_NVM_NS_64B_GUARD:
1879 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1880 bi->tag_size = sizeof(u16) + 6;
1881 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1882 break;
1883 default:
1884 break;
1885 }
1886 break;
1887 case NVME_NS_DPS_PI_TYPE1:
1888 case NVME_NS_DPS_PI_TYPE2:
1889 switch (head->guard_type) {
1890 case NVME_NVM_NS_16B_GUARD:
1891 bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1892 bi->tag_size = sizeof(u16);
1893 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1894 BLK_INTEGRITY_REF_TAG;
1895 break;
1896 case NVME_NVM_NS_64B_GUARD:
1897 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1898 bi->tag_size = sizeof(u16);
1899 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1900 BLK_INTEGRITY_REF_TAG;
1901 break;
1902 default:
1903 break;
1904 }
1905 break;
1906 default:
1907 break;
1908 }
1909
1910 bi->flags |= BLK_SPLIT_INTERVAL_CAPABLE;
1911 bi->metadata_size = head->ms;
1912 if (bi->csum_type) {
1913 bi->pi_tuple_size = head->pi_size;
1914 bi->pi_offset = info->pi_offset;
1915 }
1916 return true;
1917}
1918
1919static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1920{
1921 return uuid_equal(&a->uuid, &b->uuid) &&
1922 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1923 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1924 a->csi == b->csi;
1925}
1926
1927static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid,
1928 struct nvme_id_ns_nvm **nvmp)
1929{
1930 struct nvme_command c = {
1931 .identify.opcode = nvme_admin_identify,
1932 .identify.nsid = cpu_to_le32(nsid),
1933 .identify.cns = NVME_ID_CNS_CS_NS,
1934 .identify.csi = NVME_CSI_NVM,
1935 };
1936 struct nvme_id_ns_nvm *nvm;
1937 int ret;
1938
1939 nvm = kzalloc_obj(*nvm);
1940 if (!nvm)
1941 return -ENOMEM;
1942
1943 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1944 if (ret)
1945 kfree(nvm);
1946 else
1947 *nvmp = nvm;
1948 return ret;
1949}
1950
1951static void nvme_configure_pi_elbas(struct nvme_ns_head *head,
1952 struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm)
1953{
1954 u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]);
1955 u8 guard_type;
1956
1957 /* no support for storage tag formats right now */
1958 if (nvme_elbaf_sts(elbaf))
1959 return;
1960
1961 guard_type = nvme_elbaf_guard_type(elbaf);
1962 if ((nvm->pic & NVME_ID_NS_NVM_QPIFS) &&
1963 guard_type == NVME_NVM_NS_QTYPE_GUARD)
1964 guard_type = nvme_elbaf_qualified_guard_type(elbaf);
1965
1966 head->guard_type = guard_type;
1967 switch (head->guard_type) {
1968 case NVME_NVM_NS_64B_GUARD:
1969 head->pi_size = sizeof(struct crc64_pi_tuple);
1970 break;
1971 case NVME_NVM_NS_16B_GUARD:
1972 head->pi_size = sizeof(struct t10_pi_tuple);
1973 break;
1974 default:
1975 break;
1976 }
1977}
1978
1979static void nvme_configure_metadata(struct nvme_ctrl *ctrl,
1980 struct nvme_ns_head *head, struct nvme_id_ns *id,
1981 struct nvme_id_ns_nvm *nvm, struct nvme_ns_info *info)
1982{
1983 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1984 head->pi_type = 0;
1985 head->pi_size = 0;
1986 head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms);
1987 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1988 return;
1989
1990 if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1991 nvme_configure_pi_elbas(head, id, nvm);
1992 } else {
1993 head->pi_size = sizeof(struct t10_pi_tuple);
1994 head->guard_type = NVME_NVM_NS_16B_GUARD;
1995 }
1996
1997 if (head->pi_size && head->ms >= head->pi_size)
1998 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1999 if (!(id->dps & NVME_NS_DPS_PI_FIRST)) {
2000 if (disable_pi_offsets)
2001 head->pi_type = 0;
2002 else
2003 info->pi_offset = head->ms - head->pi_size;
2004 }
2005
2006 if (ctrl->ops->flags & NVME_F_FABRICS) {
2007 /*
2008 * The NVMe over Fabrics specification only supports metadata as
2009 * part of the extended data LBA. We rely on HCA/HBA support to
2010 * remap the separate metadata buffer from the block layer.
2011 */
2012 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
2013 return;
2014
2015 head->features |= NVME_NS_EXT_LBAS;
2016
2017 /*
2018 * The current fabrics transport drivers support namespace
2019 * metadata formats only if nvme_ns_has_pi() returns true.
2020 * Suppress support for all other formats so the namespace will
2021 * have a 0 capacity and not be usable through the block stack.
2022 *
2023 * Note, this check will need to be modified if any drivers
2024 * gain the ability to use other metadata formats.
2025 */
2026 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
2027 head->features |= NVME_NS_METADATA_SUPPORTED;
2028 } else {
2029 /*
2030 * For PCIe controllers, we can't easily remap the separate
2031 * metadata buffer from the block layer and thus require a
2032 * separate metadata buffer for block layer metadata/PI support.
2033 * We allow extended LBAs for the passthrough interface, though.
2034 */
2035 if (id->flbas & NVME_NS_FLBAS_META_EXT)
2036 head->features |= NVME_NS_EXT_LBAS;
2037 else
2038 head->features |= NVME_NS_METADATA_SUPPORTED;
2039 }
2040}
2041
2042
2043static u32 nvme_configure_atomic_write(struct nvme_ns *ns,
2044 struct nvme_id_ns *id, struct queue_limits *lim, u32 bs)
2045{
2046 u32 atomic_bs, boundary = 0;
2047
2048 /*
2049 * We do not support an offset for the atomic boundaries.
2050 */
2051 if (id->nabo)
2052 return bs;
2053
2054 if ((id->nsfeat & NVME_NS_FEAT_ATOMICS) && id->nawupf) {
2055 /*
2056 * Use the per-namespace atomic write unit when available.
2057 */
2058 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
2059 if (id->nabspf)
2060 boundary = (le16_to_cpu(id->nabspf) + 1) * bs;
2061 } else {
2062 if (ns->ctrl->awupf)
2063 dev_info_once(ns->ctrl->device,
2064 "AWUPF ignored, only NAWUPF accepted\n");
2065 atomic_bs = bs;
2066 }
2067
2068 lim->atomic_write_hw_max = atomic_bs;
2069 lim->atomic_write_hw_boundary = boundary;
2070 lim->atomic_write_hw_unit_min = bs;
2071 lim->atomic_write_hw_unit_max = rounddown_pow_of_two(atomic_bs);
2072 lim->features |= BLK_FEAT_ATOMIC_WRITES;
2073 return atomic_bs;
2074}
2075
2076static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl)
2077{
2078 return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1;
2079}
2080
2081static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl,
2082 struct queue_limits *lim, bool is_admin)
2083{
2084 lim->max_hw_sectors = ctrl->max_hw_sectors;
2085 lim->max_segments = min_t(u32, USHRT_MAX,
2086 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments));
2087 lim->max_integrity_segments = ctrl->max_integrity_segments;
2088 lim->virt_boundary_mask = ctrl->ops->get_virt_boundary(ctrl, is_admin);
2089 lim->max_segment_size = UINT_MAX;
2090 if (is_admin && (ctrl->quirks & NVME_QUIRK_ADMIN_PAGE_ALIGN))
2091 lim->dma_alignment = NVME_CTRL_PAGE_SIZE - 1;
2092 else
2093 lim->dma_alignment = 3;
2094}
2095
2096static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id,
2097 struct nvme_id_ns_nvm *nvm, struct queue_limits *lim)
2098{
2099 struct nvme_ns_head *head = ns->head;
2100 struct nvme_ctrl *ctrl = ns->ctrl;
2101 u32 bs = 1U << head->lba_shift;
2102 u32 atomic_bs, phys_bs, io_opt = 0;
2103 u32 npdg = 1, npda = 1;
2104 bool valid = true;
2105 u8 optperf;
2106
2107 /*
2108 * The block layer can't support LBA sizes larger than the page size
2109 * or smaller than a sector size yet, so catch this early and don't
2110 * allow block I/O.
2111 */
2112 if (blk_validate_block_size(bs)) {
2113 bs = (1 << 9);
2114 valid = false;
2115 }
2116
2117 phys_bs = bs;
2118 atomic_bs = nvme_configure_atomic_write(ns, id, lim, bs);
2119
2120 optperf = id->nsfeat >> NVME_NS_FEAT_OPTPERF_SHIFT;
2121 if (ctrl->vs >= NVME_VS(2, 1, 0))
2122 optperf &= NVME_NS_FEAT_OPTPERF_MASK_2_1;
2123 else
2124 optperf &= NVME_NS_FEAT_OPTPERF_MASK;
2125 if (optperf) {
2126 /* NPWG = Namespace Preferred Write Granularity */
2127 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
2128 /* NOWS = Namespace Optimal Write Size */
2129 if (id->nows)
2130 io_opt = bs * (1 + le16_to_cpu(id->nows));
2131 }
2132
2133 /*
2134 * Linux filesystems assume writing a single physical block is
2135 * an atomic operation. Hence limit the physical block size to the
2136 * value of the Atomic Write Unit Power Fail parameter.
2137 */
2138 lim->logical_block_size = bs;
2139 lim->physical_block_size = min(phys_bs, atomic_bs);
2140 lim->io_min = phys_bs;
2141 lim->io_opt = io_opt;
2142 if ((ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) &&
2143 (ctrl->oncs & NVME_CTRL_ONCS_DSM))
2144 lim->max_write_zeroes_sectors = UINT_MAX;
2145 else
2146 lim->max_write_zeroes_sectors = ctrl->max_zeroes_sectors;
2147
2148 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX))
2149 lim->max_hw_discard_sectors =
2150 nvme_lba_to_sect(ns->head, ctrl->dmrsl);
2151 else if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
2152 lim->max_hw_discard_sectors = UINT_MAX;
2153 else
2154 lim->max_hw_discard_sectors = 0;
2155
2156 /*
2157 * NVMe namespaces advertise both a preferred deallocate granularity
2158 * (for a discard length) and alignment (for a discard starting offset).
2159 * However, Linux block devices advertise a single discard_granularity.
2160 * From NVM Command Set specification 1.1 section 5.2.2, the NPDGL/NPDAL
2161 * fields in the NVM Command Set Specific Identify Namespace structure
2162 * are preferred to NPDG/NPDA in the Identify Namespace structure since
2163 * they can represent larger values. However, NPDGL or NPDAL may be 0 if
2164 * unsupported. NPDG and NPDA are 0's based.
2165 * From Figure 115 of NVM Command Set specification 1.1, NPDGL and NPDAL
2166 * are supported if the high bit of OPTPERF is set. NPDG is supported if
2167 * the low bit of OPTPERF is set. NPDA is supported if either is set.
2168 * NPDG should be a multiple of NPDA, and likewise NPDGL should be a
2169 * multiple of NPDAL, but the spec doesn't say anything about NPDG vs.
2170 * NPDAL or NPDGL vs. NPDA. So compute the maximum instead of assuming
2171 * NPDG(L) is the larger. If neither NPDG, NPDGL, NPDA, nor NPDAL are
2172 * supported, default the discard_granularity to the logical block size.
2173 */
2174 if (optperf & 0x2 && nvm && nvm->npdgl)
2175 npdg = le32_to_cpu(nvm->npdgl);
2176 else if (optperf & 0x1)
2177 npdg = from0based(id->npdg);
2178 if (optperf & 0x2 && nvm && nvm->npdal)
2179 npda = le32_to_cpu(nvm->npdal);
2180 else if (optperf)
2181 npda = from0based(id->npda);
2182 if (check_mul_overflow(max(npdg, npda), lim->logical_block_size,
2183 &lim->discard_granularity))
2184 lim->discard_granularity = lim->logical_block_size;
2185
2186 if (ctrl->dmrl)
2187 lim->max_discard_segments = ctrl->dmrl;
2188 else
2189 lim->max_discard_segments = NVME_DSM_MAX_RANGES;
2190 return valid;
2191}
2192
2193static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2194{
2195 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2196}
2197
2198static inline bool nvme_first_scan(struct gendisk *disk)
2199{
2200 /* nvme_alloc_ns() scans the disk prior to adding it */
2201 return !disk_live(disk);
2202}
2203
2204static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id,
2205 struct queue_limits *lim)
2206{
2207 struct nvme_ctrl *ctrl = ns->ctrl;
2208 u32 iob;
2209
2210 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2211 is_power_of_2(ctrl->max_hw_sectors))
2212 iob = ctrl->max_hw_sectors;
2213 else
2214 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2215
2216 if (!iob)
2217 return;
2218
2219 if (!is_power_of_2(iob)) {
2220 if (nvme_first_scan(ns->disk))
2221 pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2222 ns->disk->disk_name, iob);
2223 return;
2224 }
2225
2226 if (blk_queue_is_zoned(ns->disk->queue)) {
2227 if (nvme_first_scan(ns->disk))
2228 pr_warn("%s: ignoring zoned namespace IO boundary\n",
2229 ns->disk->disk_name);
2230 return;
2231 }
2232
2233 lim->chunk_sectors = iob;
2234}
2235
2236static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2237 struct nvme_ns_info *info)
2238{
2239 struct queue_limits lim;
2240 unsigned int memflags;
2241 int ret;
2242
2243 lim = queue_limits_start_update(ns->disk->queue);
2244 nvme_set_ctrl_limits(ns->ctrl, &lim, false);
2245
2246 memflags = blk_mq_freeze_queue(ns->disk->queue);
2247 ret = queue_limits_commit_update(ns->disk->queue, &lim);
2248 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2249 blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2250
2251 /* Hide the block-interface for these devices */
2252 if (!ret)
2253 ret = -ENODEV;
2254 return ret;
2255}
2256
2257static int nvme_query_fdp_granularity(struct nvme_ctrl *ctrl,
2258 struct nvme_ns_info *info, u8 fdp_idx)
2259{
2260 struct nvme_fdp_config_log hdr, *h;
2261 struct nvme_fdp_config_desc *desc;
2262 size_t size = sizeof(hdr);
2263 void *log, *end;
2264 int i, n, ret;
2265
2266 ret = nvme_get_log_lsi(ctrl, 0, NVME_LOG_FDP_CONFIGS, 0,
2267 NVME_CSI_NVM, &hdr, size, 0, info->endgid);
2268 if (ret) {
2269 dev_warn(ctrl->device,
2270 "FDP configs log header status:0x%x endgid:%d\n", ret,
2271 info->endgid);
2272 return ret;
2273 }
2274
2275 size = le32_to_cpu(hdr.sze);
2276 if (size > PAGE_SIZE * MAX_ORDER_NR_PAGES) {
2277 dev_warn(ctrl->device, "FDP config size too large:%zu\n",
2278 size);
2279 return 0;
2280 }
2281
2282 h = kvmalloc(size, GFP_KERNEL);
2283 if (!h)
2284 return -ENOMEM;
2285
2286 ret = nvme_get_log_lsi(ctrl, 0, NVME_LOG_FDP_CONFIGS, 0,
2287 NVME_CSI_NVM, h, size, 0, info->endgid);
2288 if (ret) {
2289 dev_warn(ctrl->device,
2290 "FDP configs log status:0x%x endgid:%d\n", ret,
2291 info->endgid);
2292 goto out;
2293 }
2294
2295 n = le16_to_cpu(h->numfdpc) + 1;
2296 if (fdp_idx >= n) {
2297 dev_warn(ctrl->device, "FDP index:%d out of range:%d\n",
2298 fdp_idx, n);
2299 /* Proceed without registering FDP streams */
2300 ret = 0;
2301 goto out;
2302 }
2303
2304 log = h + 1;
2305 desc = log;
2306 end = log + size - sizeof(*h);
2307 for (i = 0; i < fdp_idx; i++) {
2308 u16 dsze = le16_to_cpu(desc->dsze);
2309
2310 if (!dsze || log + dsze > end) {
2311 dev_warn(ctrl->device,
2312 "FDP invalid config descriptor at index %d\n", i);
2313 ret = 0;
2314 goto out;
2315 }
2316 log += dsze;
2317 desc = log;
2318 }
2319
2320 if (le32_to_cpu(desc->nrg) > 1) {
2321 dev_warn(ctrl->device, "FDP NRG > 1 not supported\n");
2322 ret = 0;
2323 goto out;
2324 }
2325
2326 info->runs = le64_to_cpu(desc->runs);
2327out:
2328 kvfree(h);
2329 return ret;
2330}
2331
2332static int nvme_query_fdp_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2333{
2334 struct nvme_ns_head *head = ns->head;
2335 struct nvme_ctrl *ctrl = ns->ctrl;
2336 struct nvme_fdp_ruh_status *ruhs;
2337 struct nvme_fdp_config fdp;
2338 struct nvme_command c = {};
2339 size_t size;
2340 int i, ret;
2341
2342 ret = nvme_get_features(ctrl, NVME_FEAT_FDP, info->endgid, NULL, 0,
2343 &fdp);
2344 if (ret) {
2345 dev_warn(ctrl->device, "FDP get feature status:0x%x\n", ret);
2346 return ret;
2347 }
2348
2349 if (!(fdp.flags & FDPCFG_FDPE))
2350 return 0;
2351
2352 ret = nvme_query_fdp_granularity(ctrl, info, fdp.fdpcidx);
2353 if (!info->runs)
2354 return ret;
2355
2356 size = struct_size(ruhs, ruhsd, NVME_MAX_PLIDS);
2357 ruhs = kzalloc(size, GFP_KERNEL);
2358 if (!ruhs)
2359 return -ENOMEM;
2360
2361 c.imr.opcode = nvme_cmd_io_mgmt_recv;
2362 c.imr.nsid = cpu_to_le32(head->ns_id);
2363 c.imr.mo = NVME_IO_MGMT_RECV_MO_RUHS;
2364 c.imr.numd = cpu_to_le32(nvme_bytes_to_numd(size));
2365 ret = nvme_submit_sync_cmd(ns->queue, &c, ruhs, size);
2366 if (ret) {
2367 dev_warn(ctrl->device, "FDP io-mgmt status:0x%x\n", ret);
2368 goto free;
2369 }
2370
2371 head->nr_plids = min(le16_to_cpu(ruhs->nruhsd), NVME_MAX_PLIDS);
2372 if (!head->nr_plids)
2373 goto free;
2374
2375 head->plids = kzalloc_objs(*head->plids, head->nr_plids);
2376 if (!head->plids) {
2377 dev_warn(ctrl->device,
2378 "failed to allocate %u FDP placement IDs\n",
2379 head->nr_plids);
2380 head->nr_plids = 0;
2381 ret = -ENOMEM;
2382 goto free;
2383 }
2384
2385 for (i = 0; i < head->nr_plids; i++)
2386 head->plids[i] = le16_to_cpu(ruhs->ruhsd[i].pid);
2387 head->write_stream_granularity = min(info->runs, U32_MAX);
2388free:
2389 kfree(ruhs);
2390 return ret;
2391}
2392
2393static bool nvme_invalid_lba_sz(u64 nsze, signed int shift, sector_t *capacity)
2394{
2395 return check_shl_overflow(nsze, shift, capacity);
2396}
2397
2398static int nvme_update_ns_info_block(struct nvme_ns *ns,
2399 struct nvme_ns_info *info)
2400{
2401 struct queue_limits lim;
2402 struct nvme_id_ns_nvm *nvm = NULL;
2403 struct nvme_zone_info zi = {};
2404 struct nvme_id_ns *id;
2405 unsigned int memflags;
2406 sector_t capacity;
2407 unsigned lbaf;
2408 int ret;
2409
2410 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2411 if (ret)
2412 return ret;
2413
2414 if (id->ncap == 0) {
2415 /* namespace not allocated or attached */
2416 info->is_removed = true;
2417 ret = -ENXIO;
2418 goto out;
2419 }
2420 lbaf = nvme_lbaf_index(id->flbas);
2421
2422 if (nvme_id_cns_ok(ns->ctrl, NVME_ID_CNS_CS_NS)) {
2423 ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm);
2424 if (ret < 0)
2425 goto out;
2426 }
2427
2428 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2429 ns->head->ids.csi == NVME_CSI_ZNS) {
2430 ret = nvme_query_zone_info(ns, lbaf, &zi);
2431 if (ret < 0)
2432 goto out;
2433 }
2434
2435 if (nvme_invalid_lba_sz(le64_to_cpu(id->nsze),
2436 id->lbaf[lbaf].ds - SECTOR_SHIFT, &capacity)) {
2437 dev_warn_once(ns->ctrl->device,
2438 "invalid LBA data size %u, skipping namespace\n",
2439 id->lbaf[lbaf].ds);
2440 ret = -ENODEV;
2441 goto out;
2442 }
2443
2444 lim = queue_limits_start_update(ns->disk->queue);
2445
2446 memflags = blk_mq_freeze_queue(ns->disk->queue);
2447 ns->head->lba_shift = id->lbaf[lbaf].ds;
2448 ns->head->nuse = le64_to_cpu(id->nuse);
2449 nvme_set_ctrl_limits(ns->ctrl, &lim, false);
2450 nvme_configure_metadata(ns->ctrl, ns->head, id, nvm, info);
2451 nvme_set_chunk_sectors(ns, id, &lim);
2452 if (!nvme_update_disk_info(ns, id, nvm, &lim))
2453 capacity = 0;
2454
2455 /*
2456 * A failed zone info query leaves zi zero-initialized, so skip the
2457 * zoned limits update instead of configuring the queue from it.
2458 * During a revalidation that keeps the zone geometry the queue was
2459 * last validated with; on a first scan the namespace is registered
2460 * without zoned limits, so that it is still available as a handle
2461 * for admin commands.
2462 */
2463 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2464 ns->head->ids.csi == NVME_CSI_ZNS) {
2465 if (zi.zone_size)
2466 nvme_update_zone_info(ns, &lim, &zi);
2467 else
2468 dev_warn(ns->ctrl->device,
2469 "zone info query failed for nsid %u, %s\n",
2470 ns->head->ns_id,
2471 blk_queue_is_zoned(ns->disk->queue) ?
2472 "keeping the previous zone limits" :
2473 "not enabling zoned mode");
2474 }
2475
2476 if ((ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT) && !info->no_vwc)
2477 lim.features |= BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA;
2478 else
2479 lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA);
2480
2481 if (info->is_rotational)
2482 lim.features |= BLK_FEAT_ROTATIONAL;
2483
2484 /*
2485 * Register a metadata profile for PI, or the plain non-integrity NVMe
2486 * metadata masquerading as Type 0 if supported, otherwise reject block
2487 * I/O to namespaces with metadata except when the namespace supports
2488 * PI, as it can strip/insert in that case.
2489 */
2490 if (!nvme_init_integrity(ns->head, &lim, info))
2491 capacity = 0;
2492
2493 lim.max_write_streams = ns->head->nr_plids;
2494 lim.write_stream_granularity = ns->head->write_stream_granularity;
2495
2496 /*
2497 * Only set the DEAC bit if the device guarantees that reads from
2498 * deallocated data return zeroes. While the DEAC bit does not
2499 * require that, it must be a no-op if reads from deallocated data
2500 * do not return zeroes.
2501 */
2502 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) {
2503 ns->head->features |= NVME_NS_DEAC;
2504 lim.max_hw_wzeroes_unmap_sectors = lim.max_write_zeroes_sectors;
2505 }
2506
2507 ret = queue_limits_commit_update(ns->disk->queue, &lim);
2508 if (ret) {
2509 blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2510 goto out;
2511 }
2512
2513 set_capacity_and_notify(ns->disk, capacity);
2514 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2515 set_bit(NVME_NS_READY, &ns->flags);
2516 blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2517
2518 if (blk_queue_is_zoned(ns->queue)) {
2519 ret = blk_revalidate_disk_zones(ns->disk);
2520 if (ret && !nvme_first_scan(ns->disk))
2521 goto out;
2522 }
2523
2524 ret = 0;
2525out:
2526 kfree(nvm);
2527 kfree(id);
2528 return ret;
2529}
2530
2531static void nvme_stack_zone_resources(struct queue_limits *t,
2532 const struct queue_limits *b)
2533{
2534 t->max_open_zones = min_not_zero(t->max_open_zones, b->max_open_zones);
2535 t->max_active_zones =
2536 min_not_zero(t->max_active_zones, b->max_active_zones);
2537}
2538
2539static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2540{
2541 bool unsupported = false;
2542 int ret;
2543
2544 switch (info->ids.csi) {
2545 case NVME_CSI_ZNS:
2546 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2547 dev_info(ns->ctrl->device,
2548 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2549 info->nsid);
2550 ret = nvme_update_ns_info_generic(ns, info);
2551 break;
2552 }
2553 ret = nvme_update_ns_info_block(ns, info);
2554 break;
2555 case NVME_CSI_NVM:
2556 ret = nvme_update_ns_info_block(ns, info);
2557 break;
2558 default:
2559 dev_info(ns->ctrl->device,
2560 "block device for nsid %u not supported (csi %u)\n",
2561 info->nsid, info->ids.csi);
2562 ret = nvme_update_ns_info_generic(ns, info);
2563 break;
2564 }
2565
2566 /*
2567 * If probing fails due an unsupported feature, hide the block device,
2568 * but still allow other access.
2569 */
2570 if (ret == -ENODEV) {
2571 ns->disk->flags |= GENHD_FL_HIDDEN;
2572 set_bit(NVME_NS_READY, &ns->flags);
2573 unsupported = true;
2574 ret = 0;
2575 }
2576
2577 if (!ret && nvme_ns_head_multipath(ns->head)) {
2578 struct queue_limits *ns_lim = &ns->disk->queue->limits;
2579 struct queue_limits lim;
2580 unsigned int memflags;
2581
2582 lim = queue_limits_start_update(ns->head->disk->queue);
2583 memflags = blk_mq_freeze_queue(ns->head->disk->queue);
2584 /*
2585 * queue_limits mixes values that are the hardware limitations
2586 * for bio splitting with what is the device configuration.
2587 *
2588 * For NVMe the device configuration can change after e.g. a
2589 * Format command, and we really want to pick up the new format
2590 * value here. But we must still stack the queue limits to the
2591 * least common denominator for multipathing to split the bios
2592 * properly.
2593 *
2594 * To work around this, we explicitly set the device
2595 * configuration to those that we just queried, but only stack
2596 * the splitting limits in to make sure we still obey possibly
2597 * lower limitations of other controllers.
2598 */
2599 lim.logical_block_size = ns_lim->logical_block_size;
2600 lim.physical_block_size = ns_lim->physical_block_size;
2601 lim.io_min = ns_lim->io_min;
2602 lim.io_opt = ns_lim->io_opt;
2603 queue_limits_stack_bdev(&lim, ns->disk->part0, 0,
2604 ns->head->disk->disk_name);
2605 if (lim.features & BLK_FEAT_ZONED)
2606 nvme_stack_zone_resources(&lim, ns_lim);
2607 if (unsupported)
2608 ns->head->disk->flags |= GENHD_FL_HIDDEN;
2609 else
2610 nvme_init_integrity(ns->head, &lim, info);
2611 lim.max_write_streams = ns_lim->max_write_streams;
2612 lim.write_stream_granularity = ns_lim->write_stream_granularity;
2613 ret = queue_limits_commit_update(ns->head->disk->queue, &lim);
2614 if (ret)
2615 goto unfreeze_head_queue;
2616
2617 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk));
2618 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2619 nvme_mpath_revalidate_paths(ns->head);
2620
2621unfreeze_head_queue:
2622 blk_mq_unfreeze_queue(ns->head->disk->queue, memflags);
2623
2624 /*
2625 * Wait until the head queue is unfrozen before revalidating
2626 * its zones. blk_revalidate_disk_zones() takes the queue limits
2627 * lock and then freezes the queue on its own, so it must not be
2628 * called with the queue already frozen. This is also what
2629 * nvme_update_ns_info_block() does for ns->disk.
2630 */
2631 if (!ret)
2632 ret = nvme_mpath_revalidate_zones(ns->head);
2633 }
2634
2635 return ret;
2636}
2637
2638int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16],
2639 enum blk_unique_id type)
2640{
2641 struct nvme_ns_ids *ids = &ns->head->ids;
2642
2643 if (type != BLK_UID_EUI64)
2644 return -EINVAL;
2645
2646 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) {
2647 memcpy(id, &ids->nguid, sizeof(ids->nguid));
2648 return sizeof(ids->nguid);
2649 }
2650 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) {
2651 memcpy(id, &ids->eui64, sizeof(ids->eui64));
2652 return sizeof(ids->eui64);
2653 }
2654
2655 return -EINVAL;
2656}
2657
2658static int nvme_get_unique_id(struct gendisk *disk, u8 id[16],
2659 enum blk_unique_id type)
2660{
2661 return nvme_ns_get_unique_id(disk->private_data, id, type);
2662}
2663
2664#ifdef CONFIG_BLK_SED_OPAL
2665static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2666 bool send)
2667{
2668 struct nvme_ctrl *ctrl = data;
2669 struct nvme_command cmd = { };
2670
2671 if (send)
2672 cmd.common.opcode = nvme_admin_security_send;
2673 else
2674 cmd.common.opcode = nvme_admin_security_recv;
2675 cmd.common.nsid = 0;
2676 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2677 cmd.common.cdw11 = cpu_to_le32(len);
2678
2679 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2680 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2681}
2682
2683static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2684{
2685 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2686 if (!ctrl->opal_dev)
2687 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2688 else if (was_suspended)
2689 opal_unlock_from_suspend(ctrl->opal_dev);
2690 } else {
2691 free_opal_dev(ctrl->opal_dev);
2692 ctrl->opal_dev = NULL;
2693 }
2694}
2695#else
2696static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2697{
2698}
2699#endif /* CONFIG_BLK_SED_OPAL */
2700
2701#ifdef CONFIG_BLK_DEV_ZONED
2702static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2703 unsigned int nr_zones, struct blk_report_zones_args *args)
2704{
2705 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, args);
2706}
2707#else
2708#define nvme_report_zones NULL
2709#endif /* CONFIG_BLK_DEV_ZONED */
2710
2711const struct block_device_operations nvme_bdev_ops = {
2712 .owner = THIS_MODULE,
2713 .ioctl = nvme_ioctl,
2714 .compat_ioctl = blkdev_compat_ptr_ioctl,
2715 .open = nvme_open,
2716 .release = nvme_release,
2717 .getgeo = nvme_getgeo,
2718 .get_unique_id = nvme_get_unique_id,
2719 .report_zones = nvme_report_zones,
2720 .pr_ops = &nvme_pr_ops,
2721};
2722
2723static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2724 u32 timeout, const char *op)
2725{
2726 unsigned long timeout_jiffies = jiffies + timeout * HZ;
2727 u32 csts;
2728 int ret;
2729
2730 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2731 if (csts == ~0)
2732 return -ENODEV;
2733 if ((csts & mask) == val)
2734 break;
2735
2736 usleep_range(1000, 2000);
2737 if (fatal_signal_pending(current))
2738 return -EINTR;
2739 if (time_after(jiffies, timeout_jiffies)) {
2740 dev_err(ctrl->device,
2741 "Device not ready; aborting %s, CSTS=0x%x\n",
2742 op, csts);
2743 return -ENODEV;
2744 }
2745 }
2746
2747 return ret;
2748}
2749
2750int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2751{
2752 int ret;
2753
2754 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2755 if (shutdown)
2756 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2757 else
2758 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2759
2760 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2761 if (ret)
2762 return ret;
2763
2764 if (shutdown) {
2765 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2766 NVME_CSTS_SHST_CMPLT,
2767 ctrl->shutdown_timeout, "shutdown");
2768 }
2769 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2770 msleep(NVME_QUIRK_DELAY_AMOUNT);
2771 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2772 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2773}
2774EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2775
2776int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2777{
2778 unsigned dev_page_min;
2779 u32 timeout;
2780 int ret;
2781
2782 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2783 if (ret) {
2784 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2785 return ret;
2786 }
2787 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2788
2789 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2790 dev_err(ctrl->device,
2791 "Minimum device page size %u too large for host (%u)\n",
2792 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2793 return -ENODEV;
2794 }
2795
2796 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2797 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2798 else
2799 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2800
2801 /*
2802 * Setting CRIME results in CSTS.RDY before the media is ready. This
2803 * makes it possible for media related commands to return the error
2804 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is
2805 * restructured to handle retries, disable CC.CRIME.
2806 */
2807 ctrl->ctrl_config &= ~NVME_CC_CRIME;
2808
2809 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2810 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2811 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2812 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2813 if (ret)
2814 return ret;
2815
2816 /* CAP value may change after initial CC write */
2817 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2818 if (ret)
2819 return ret;
2820
2821 timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2822 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2823 u32 crto, ready_timeout;
2824
2825 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2826 if (ret) {
2827 dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2828 ret);
2829 return ret;
2830 }
2831
2832 /*
2833 * CRTO should always be greater or equal to CAP.TO, but some
2834 * devices are known to get this wrong. Use the larger of the
2835 * two values.
2836 */
2837 ready_timeout = NVME_CRTO_CRWMT(crto);
2838
2839 if (ready_timeout < timeout)
2840 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2841 crto, ctrl->cap);
2842 else
2843 timeout = ready_timeout;
2844 }
2845
2846 ctrl->ctrl_config |= NVME_CC_ENABLE;
2847 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2848 if (ret)
2849 return ret;
2850 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2851 (timeout + 1) / 2, "initialisation");
2852}
2853EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2854
2855static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2856{
2857 __le64 ts;
2858 int ret;
2859
2860 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2861 return 0;
2862
2863 ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2864 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2865 NULL);
2866 if (ret)
2867 dev_warn_once(ctrl->device,
2868 "could not set timestamp (%d)\n", ret);
2869 return ret;
2870}
2871
2872static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2873{
2874 struct nvme_feat_host_behavior *host;
2875 u8 acre = 0, lbafee = 0;
2876 int ret;
2877
2878 /* Don't bother enabling the feature if retry delay is not reported */
2879 if (ctrl->crdt[0])
2880 acre = NVME_ENABLE_ACRE;
2881 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2882 lbafee = NVME_ENABLE_LBAFEE;
2883
2884 if (!acre && !lbafee)
2885 return 0;
2886
2887 host = kzalloc_obj(*host);
2888 if (!host)
2889 return 0;
2890
2891 host->acre = acre;
2892 host->lbafee = lbafee;
2893 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2894 host, sizeof(*host), NULL);
2895 kfree(host);
2896 return ret;
2897}
2898
2899/*
2900 * The function checks whether the given total (exlat + enlat) latency of
2901 * a power state allows the latter to be used as an APST transition target.
2902 * It does so by comparing the latency to the primary and secondary latency
2903 * tolerances defined by module params. If there's a match, the corresponding
2904 * timeout value is returned and the matching tolerance index (1 or 2) is
2905 * reported.
2906 */
2907static bool nvme_apst_get_transition_time(u64 total_latency,
2908 u64 *transition_time, unsigned *last_index)
2909{
2910 if (total_latency <= apst_primary_latency_tol_us) {
2911 if (*last_index == 1)
2912 return false;
2913 *last_index = 1;
2914 *transition_time = apst_primary_timeout_ms;
2915 return true;
2916 }
2917 if (apst_secondary_timeout_ms &&
2918 total_latency <= apst_secondary_latency_tol_us) {
2919 if (*last_index <= 2)
2920 return false;
2921 *last_index = 2;
2922 *transition_time = apst_secondary_timeout_ms;
2923 return true;
2924 }
2925 return false;
2926}
2927
2928/*
2929 * APST (Autonomous Power State Transition) lets us program a table of power
2930 * state transitions that the controller will perform automatically.
2931 *
2932 * Depending on module params, one of the two supported techniques will be used:
2933 *
2934 * - If the parameters provide explicit timeouts and tolerances, they will be
2935 * used to build a table with up to 2 non-operational states to transition to.
2936 * The default parameter values were selected based on the values used by
2937 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2938 * regeneration of the APST table in the event of switching between external
2939 * and battery power, the timeouts and tolerances reflect a compromise
2940 * between values used by Microsoft for AC and battery scenarios.
2941 * - If not, we'll configure the table with a simple heuristic: we are willing
2942 * to spend at most 2% of the time transitioning between power states.
2943 * Therefore, when running in any given state, we will enter the next
2944 * lower-power non-operational state after waiting 50 * (enlat + exlat)
2945 * microseconds, as long as that state's exit latency is under the requested
2946 * maximum latency.
2947 *
2948 * We will not autonomously enter any non-operational state for which the total
2949 * latency exceeds ps_max_latency_us.
2950 *
2951 * Users can set ps_max_latency_us to zero to turn off APST.
2952 */
2953static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2954{
2955 struct nvme_feat_auto_pst *table;
2956 unsigned apste = 0;
2957 u64 max_lat_us = 0;
2958 __le64 target = 0;
2959 int max_ps = -1;
2960 int state;
2961 int ret;
2962 unsigned last_lt_index = UINT_MAX;
2963
2964 /*
2965 * If APST isn't supported or if we haven't been initialized yet,
2966 * then don't do anything.
2967 */
2968 if (!ctrl->apsta)
2969 return 0;
2970
2971 if (ctrl->npss > 31) {
2972 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2973 return 0;
2974 }
2975
2976 table = kzalloc_obj(*table);
2977 if (!table)
2978 return 0;
2979
2980 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2981 /* Turn off APST. */
2982 dev_dbg(ctrl->device, "APST disabled\n");
2983 goto done;
2984 }
2985
2986 /*
2987 * Walk through all states from lowest- to highest-power.
2988 * According to the spec, lower-numbered states use more power. NPSS,
2989 * despite the name, is the index of the lowest-power state, not the
2990 * number of states.
2991 */
2992 for (state = (int)ctrl->npss; state >= 0; state--) {
2993 u64 total_latency_us, exit_latency_us, transition_ms;
2994
2995 if (target)
2996 table->entries[state] = target;
2997
2998 /*
2999 * Don't allow transitions to the deepest state if it's quirked
3000 * off.
3001 */
3002 if (state == ctrl->npss &&
3003 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
3004 continue;
3005
3006 /*
3007 * Is this state a useful non-operational state for higher-power
3008 * states to autonomously transition to?
3009 */
3010 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
3011 continue;
3012
3013 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
3014 if (exit_latency_us > ctrl->ps_max_latency_us)
3015 continue;
3016
3017 total_latency_us = exit_latency_us +
3018 le32_to_cpu(ctrl->psd[state].entry_lat);
3019
3020 /*
3021 * This state is good. It can be used as the APST idle target
3022 * for higher power states.
3023 */
3024 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
3025 if (!nvme_apst_get_transition_time(total_latency_us,
3026 &transition_ms, &last_lt_index))
3027 continue;
3028 } else {
3029 transition_ms = total_latency_us + 19;
3030 do_div(transition_ms, 20);
3031 if (transition_ms > (1 << 24) - 1)
3032 transition_ms = (1 << 24) - 1;
3033 }
3034
3035 target = cpu_to_le64((state << 3) | (transition_ms << 8));
3036 if (max_ps == -1)
3037 max_ps = state;
3038 if (total_latency_us > max_lat_us)
3039 max_lat_us = total_latency_us;
3040 }
3041
3042 if (max_ps == -1)
3043 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
3044 else
3045 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
3046 max_ps, max_lat_us, (int)sizeof(*table), table);
3047 apste = 1;
3048
3049done:
3050 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
3051 table, sizeof(*table), NULL);
3052 if (ret)
3053 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
3054 kfree(table);
3055 return ret;
3056}
3057
3058static void nvme_set_latency_tolerance(struct device *dev, s32 val)
3059{
3060 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3061 u64 latency;
3062
3063 switch (val) {
3064 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
3065 case PM_QOS_LATENCY_ANY:
3066 latency = U64_MAX;
3067 break;
3068
3069 default:
3070 latency = val;
3071 }
3072
3073 if (ctrl->ps_max_latency_us != latency) {
3074 ctrl->ps_max_latency_us = latency;
3075 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
3076 nvme_configure_apst(ctrl);
3077 }
3078}
3079
3080struct nvme_core_quirk_entry {
3081 /*
3082 * NVMe model and firmware strings are padded with spaces. For
3083 * simplicity, strings in the quirk table are padded with NULLs
3084 * instead.
3085 */
3086 u16 vid;
3087 const char *mn;
3088 const char *fr;
3089 unsigned long quirks;
3090};
3091
3092static const struct nvme_core_quirk_entry core_quirks[] = {
3093 {
3094 /*
3095 * This Toshiba device seems to die using any APST states. See:
3096 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
3097 */
3098 .vid = 0x1179,
3099 .mn = "THNSF5256GPUK TOSHIBA",
3100 .quirks = NVME_QUIRK_NO_APST,
3101 },
3102 {
3103 /*
3104 * This LiteON CL1-3D*-Q11 firmware version has a race
3105 * condition associated with actions related to suspend to idle
3106 * LiteON has resolved the problem in future firmware
3107 */
3108 .vid = 0x14a4,
3109 .fr = "22301111",
3110 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
3111 },
3112 {
3113 /*
3114 * This Kioxia CD6-V Series / HPE PE8030 device times out and
3115 * aborts I/O during any load, but more easily reproducible
3116 * with discards (fstrim).
3117 *
3118 * The device is left in a state where it is also not possible
3119 * to use "nvme set-feature" to disable APST, but booting with
3120 * nvme_core.default_ps_max_latency_us=0 works.
3121 */
3122 .vid = 0x1e0f,
3123 .mn = "KCD6XVUL6T40",
3124 .quirks = NVME_QUIRK_NO_APST,
3125 },
3126 {
3127 /*
3128 * The external Samsung X5 SSD fails initialization without a
3129 * delay before checking if it is ready and has a whole set of
3130 * other problems. To make this even more interesting, it
3131 * shares the PCI ID with internal Samsung 970 Evo Plus that
3132 * does not need or want these quirks.
3133 */
3134 .vid = 0x144d,
3135 .mn = "Samsung Portable SSD X5",
3136 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
3137 NVME_QUIRK_NO_DEEPEST_PS |
3138 NVME_QUIRK_IGNORE_DEV_SUBNQN,
3139 }
3140};
3141
3142/* match is null-terminated but idstr is space-padded. */
3143static bool string_matches(const char *idstr, const char *match, size_t len)
3144{
3145 size_t matchlen;
3146
3147 if (!match)
3148 return true;
3149
3150 matchlen = strlen(match);
3151 WARN_ON_ONCE(matchlen > len);
3152
3153 if (memcmp(idstr, match, matchlen))
3154 return false;
3155
3156 for (; matchlen < len; matchlen++)
3157 if (idstr[matchlen] != ' ')
3158 return false;
3159
3160 return true;
3161}
3162
3163static bool quirk_matches(const struct nvme_id_ctrl *id,
3164 const struct nvme_core_quirk_entry *q)
3165{
3166 return q->vid == le16_to_cpu(id->vid) &&
3167 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
3168 string_matches(id->fr, q->fr, sizeof(id->fr));
3169}
3170
3171static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
3172 struct nvme_id_ctrl *id)
3173{
3174 size_t nqnlen;
3175 int off;
3176
3177 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
3178 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
3179 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
3180 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
3181 return;
3182 }
3183
3184 if (ctrl->vs >= NVME_VS(1, 2, 1))
3185 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
3186 }
3187
3188 /*
3189 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
3190 * Base Specification 2.0. It is slightly different from the format
3191 * specified there due to historic reasons, and we can't change it now.
3192 */
3193 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
3194 "nqn.2014.08.org.nvmexpress:%04x%04x",
3195 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
3196 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
3197 off += sizeof(id->sn);
3198 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
3199 off += sizeof(id->mn);
3200 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
3201}
3202
3203static void nvme_release_subsystem(struct device *dev)
3204{
3205 struct nvme_subsystem *subsys =
3206 container_of(dev, struct nvme_subsystem, dev);
3207 struct nvme_effects_log *cel;
3208 unsigned long i;
3209
3210 if (subsys->instance >= 0)
3211 ida_free(&nvme_instance_ida, subsys->instance);
3212 xa_for_each(&subsys->cels, i, cel) {
3213 xa_erase(&subsys->cels, i);
3214 kfree(cel);
3215 }
3216 xa_destroy(&subsys->cels);
3217 kfree(subsys);
3218}
3219
3220static void nvme_destroy_subsystem(struct kref *ref)
3221{
3222 struct nvme_subsystem *subsys =
3223 container_of(ref, struct nvme_subsystem, ref);
3224
3225 mutex_lock(&nvme_subsystems_lock);
3226 list_del(&subsys->entry);
3227 mutex_unlock(&nvme_subsystems_lock);
3228
3229 ida_destroy(&subsys->ns_ida);
3230 device_del(&subsys->dev);
3231 put_device(&subsys->dev);
3232}
3233
3234static void nvme_put_subsystem(struct nvme_subsystem *subsys)
3235{
3236 kref_put(&subsys->ref, nvme_destroy_subsystem);
3237}
3238
3239static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
3240 __must_hold(&nvme_subsystems_lock)
3241{
3242 struct nvme_subsystem *subsys;
3243
3244 lockdep_assert_held(&nvme_subsystems_lock);
3245
3246 /*
3247 * Fail matches for discovery subsystems. This results
3248 * in each discovery controller bound to a unique subsystem.
3249 * This avoids issues with validating controller values
3250 * that can only be true when there is a single unique subsystem.
3251 * There may be multiple and completely independent entities
3252 * that provide discovery controllers.
3253 */
3254 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
3255 return NULL;
3256
3257 list_for_each_entry(subsys, &nvme_subsystems, entry) {
3258 if (strcmp(subsys->subnqn, subsysnqn))
3259 continue;
3260 if (!kref_get_unless_zero(&subsys->ref))
3261 continue;
3262 return subsys;
3263 }
3264
3265 return NULL;
3266}
3267
3268static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
3269{
3270 return ctrl->opts && ctrl->opts->discovery_nqn;
3271}
3272
3273static inline bool nvme_admin_ctrl(struct nvme_ctrl *ctrl)
3274{
3275 return ctrl->cntrltype == NVME_CTRL_ADMIN;
3276}
3277
3278static inline bool nvme_is_io_ctrl(struct nvme_ctrl *ctrl)
3279{
3280 return !nvme_discovery_ctrl(ctrl) && !nvme_admin_ctrl(ctrl);
3281}
3282
3283static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
3284 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3285 __must_hold(&nvme_subsystems_lock)
3286{
3287 struct nvme_ctrl *tmp;
3288
3289 lockdep_assert_held(&nvme_subsystems_lock);
3290
3291 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
3292 if (nvme_state_terminal(tmp))
3293 continue;
3294
3295 if (tmp->cntlid == ctrl->cntlid) {
3296 dev_err(ctrl->device,
3297 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
3298 ctrl->cntlid, dev_name(tmp->device),
3299 subsys->subnqn);
3300 return false;
3301 }
3302
3303 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
3304 nvme_discovery_ctrl(ctrl))
3305 continue;
3306
3307 dev_err(ctrl->device,
3308 "Subsystem does not support multiple controllers\n");
3309 return false;
3310 }
3311
3312 return true;
3313}
3314
3315static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3316 __context_unsafe(/* initialize unpublished/lock-guarded variables */)
3317{
3318 struct nvme_subsystem *subsys, *found;
3319 int ret;
3320
3321 subsys = kzalloc_obj(*subsys);
3322 if (!subsys)
3323 return -ENOMEM;
3324
3325 subsys->instance = -1;
3326 mutex_init(&subsys->lock);
3327 kref_init(&subsys->ref);
3328 INIT_LIST_HEAD(&subsys->ctrls);
3329 INIT_LIST_HEAD(&subsys->nsheads);
3330 xa_init(&subsys->cels);
3331 nvme_init_subnqn(subsys, ctrl, id);
3332 memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
3333 memcpy(subsys->model, id->mn, sizeof(subsys->model));
3334 subsys->vendor_id = le16_to_cpu(id->vid);
3335 subsys->cmic = id->cmic;
3336
3337 /* Versions prior to 1.4 don't necessarily report a valid type */
3338 if (id->cntrltype == NVME_CTRL_DISC ||
3339 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
3340 subsys->subtype = NVME_NQN_DISC;
3341 else
3342 subsys->subtype = NVME_NQN_NVME;
3343
3344 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
3345 dev_err(ctrl->device,
3346 "Subsystem %s is not a discovery controller",
3347 subsys->subnqn);
3348 kfree(subsys);
3349 return -EINVAL;
3350 }
3351 nvme_mpath_default_iopolicy(subsys);
3352
3353 subsys->dev.class = &nvme_subsys_class;
3354 subsys->dev.release = nvme_release_subsystem;
3355 subsys->dev.groups = nvme_subsys_attrs_groups;
3356 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
3357 device_initialize(&subsys->dev);
3358
3359 mutex_lock(&nvme_subsystems_lock);
3360 found = __nvme_find_get_subsystem(subsys->subnqn);
3361 if (found) {
3362 put_device(&subsys->dev);
3363 subsys = found;
3364
3365 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
3366 ret = -EINVAL;
3367 goto out_put_subsystem;
3368 }
3369 } else {
3370 ret = device_add(&subsys->dev);
3371 if (ret) {
3372 dev_err(ctrl->device,
3373 "failed to register subsystem device.\n");
3374 put_device(&subsys->dev);
3375 goto out_unlock;
3376 }
3377 ida_init(&subsys->ns_ida);
3378 list_add_tail(&subsys->entry, &nvme_subsystems);
3379 }
3380
3381 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
3382 dev_name(ctrl->device));
3383 if (ret) {
3384 dev_err(ctrl->device,
3385 "failed to create sysfs link from subsystem.\n");
3386 goto out_put_subsystem;
3387 }
3388
3389 if (!found)
3390 subsys->instance = ctrl->instance;
3391 ctrl->subsys = subsys;
3392 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
3393 mutex_unlock(&nvme_subsystems_lock);
3394 return 0;
3395
3396out_put_subsystem:
3397 nvme_put_subsystem(subsys);
3398out_unlock:
3399 mutex_unlock(&nvme_subsystems_lock);
3400 return ret;
3401}
3402
3403static int nvme_get_log_lsi(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page,
3404 u8 lsp, u8 csi, void *log, size_t size, u64 offset, u16 lsi)
3405{
3406 struct nvme_command c = { };
3407 u32 dwlen = nvme_bytes_to_numd(size);
3408
3409 c.get_log_page.opcode = nvme_admin_get_log_page;
3410 c.get_log_page.nsid = cpu_to_le32(nsid);
3411 c.get_log_page.lid = log_page;
3412 c.get_log_page.lsp = lsp;
3413 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
3414 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
3415 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
3416 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
3417 c.get_log_page.csi = csi;
3418 c.get_log_page.lsi = cpu_to_le16(lsi);
3419
3420 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
3421}
3422
3423int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
3424 void *log, size_t size, u64 offset)
3425{
3426 return nvme_get_log_lsi(ctrl, nsid, log_page, lsp, csi, log, size,
3427 offset, 0);
3428}
3429
3430static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
3431 struct nvme_effects_log **log)
3432{
3433 struct nvme_effects_log *old, *cel = xa_load(&ctrl->subsys->cels, csi);
3434 int ret;
3435
3436 if (cel)
3437 goto out;
3438
3439 cel = kzalloc_obj(*cel);
3440 if (!cel)
3441 return -ENOMEM;
3442
3443 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
3444 cel, sizeof(*cel), 0);
3445 if (ret) {
3446 kfree(cel);
3447 return ret;
3448 }
3449
3450 old = xa_store(&ctrl->subsys->cels, csi, cel, GFP_KERNEL);
3451 if (xa_is_err(old)) {
3452 kfree(cel);
3453 return xa_err(old);
3454 }
3455out:
3456 *log = cel;
3457 return 0;
3458}
3459
3460static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
3461{
3462 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
3463
3464 if (check_shl_overflow(1U, units + page_shift - 9, &val))
3465 return UINT_MAX;
3466 return val;
3467}
3468
3469static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3470{
3471 struct nvme_command c = { };
3472 struct nvme_id_ctrl_nvm *id;
3473 int ret;
3474
3475 /*
3476 * Even though NVMe spec explicitly states that MDTS is not applicable
3477 * to the write-zeroes, we are cautious and limit the size to the
3478 * controllers max_hw_sectors value, which is based on the MDTS field
3479 * and possibly other limiting factors.
3480 */
3481 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3482 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3483 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3484 else
3485 ctrl->max_zeroes_sectors = 0;
3486
3487 if (!nvme_is_io_ctrl(ctrl) ||
3488 !nvme_id_cns_ok(ctrl, NVME_ID_CNS_CS_CTRL) ||
3489 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3490 return 0;
3491
3492 id = kzalloc_obj(*id);
3493 if (!id)
3494 return -ENOMEM;
3495
3496 c.identify.opcode = nvme_admin_identify;
3497 c.identify.cns = NVME_ID_CNS_CS_CTRL;
3498 c.identify.csi = NVME_CSI_NVM;
3499
3500 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3501 if (ret)
3502 goto free_data;
3503
3504 ctrl->dmrl = id->dmrl;
3505 ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3506 if (id->wzsl && !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3507 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3508
3509free_data:
3510 if (ret > 0)
3511 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3512 kfree(id);
3513 return ret;
3514}
3515
3516static int nvme_init_effects_log(struct nvme_ctrl *ctrl,
3517 u8 csi, struct nvme_effects_log **log)
3518{
3519 struct nvme_effects_log *effects, *old;
3520
3521 effects = kzalloc_obj(*effects);
3522 if (!effects)
3523 return -ENOMEM;
3524
3525 old = xa_store(&ctrl->subsys->cels, csi, effects, GFP_KERNEL);
3526 if (xa_is_err(old)) {
3527 kfree(effects);
3528 return xa_err(old);
3529 }
3530
3531 *log = effects;
3532 return 0;
3533}
3534
3535static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3536{
3537 struct nvme_effects_log *log = ctrl->effects;
3538
3539 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3540 NVME_CMD_EFFECTS_NCC |
3541 NVME_CMD_EFFECTS_CSE_MASK);
3542 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3543 NVME_CMD_EFFECTS_CSE_MASK);
3544
3545 /*
3546 * The spec says the result of a security receive command depends on
3547 * the previous security send command. As such, many vendors log this
3548 * command as one to submitted only when no other commands to the same
3549 * namespace are outstanding. The intention is to tell the host to
3550 * prevent mixing security send and receive.
3551 *
3552 * This driver can only enforce such exclusive access against IO
3553 * queues, though. We are not readily able to enforce such a rule for
3554 * two commands to the admin queue, which is the only queue that
3555 * matters for this command.
3556 *
3557 * Rather than blindly freezing the IO queues for this effect that
3558 * doesn't even apply to IO, mask it off.
3559 */
3560 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3561
3562 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3563 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3564 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3565}
3566
3567static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3568{
3569 int ret = 0;
3570
3571 mutex_lock(&ctrl->subsys->lock);
3572 ctrl->effects = xa_load(&ctrl->subsys->cels, NVME_CSI_NVM);
3573 if (ctrl->effects)
3574 goto out_unlock;
3575
3576 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3577 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3578 if (ret < 0)
3579 goto out_unlock;
3580 }
3581
3582 if (!ctrl->effects) {
3583 ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3584 if (ret < 0)
3585 goto out_unlock;
3586 }
3587
3588 nvme_init_known_nvm_effects(ctrl);
3589out_unlock:
3590 mutex_unlock(&ctrl->subsys->lock);
3591 return ret;
3592}
3593
3594static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3595{
3596 /*
3597 * In fabrics we need to verify the cntlid matches the
3598 * admin connect
3599 */
3600 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3601 dev_err(ctrl->device,
3602 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3603 ctrl->cntlid, le16_to_cpu(id->cntlid));
3604 return -EINVAL;
3605 }
3606
3607 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3608 dev_err(ctrl->device,
3609 "keep-alive support is mandatory for fabrics\n");
3610 return -EINVAL;
3611 }
3612
3613 if (nvme_is_io_ctrl(ctrl) && ctrl->ioccsz < 4) {
3614 dev_err(ctrl->device,
3615 "I/O queue command capsule supported size %d < 4\n",
3616 ctrl->ioccsz);
3617 return -EINVAL;
3618 }
3619
3620 if (nvme_is_io_ctrl(ctrl) && ctrl->iorcsz < 1) {
3621 dev_err(ctrl->device,
3622 "I/O queue response capsule supported size %d < 1\n",
3623 ctrl->iorcsz);
3624 return -EINVAL;
3625 }
3626
3627 if (!ctrl->maxcmd) {
3628 dev_warn(ctrl->device,
3629 "Firmware bug: maximum outstanding commands is 0\n");
3630 ctrl->maxcmd = ctrl->sqsize + 1;
3631 }
3632
3633 return 0;
3634}
3635
3636static int nvme_init_identify(struct nvme_ctrl *ctrl)
3637{
3638 struct queue_limits lim;
3639 struct nvme_id_ctrl *id;
3640 u32 max_hw_sectors;
3641 bool prev_apst_enabled;
3642 int ret;
3643
3644 ret = nvme_identify_ctrl(ctrl, &id);
3645 if (ret) {
3646 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3647 return -EIO;
3648 }
3649
3650 if (!(ctrl->ops->flags & NVME_F_FABRICS))
3651 ctrl->cntlid = le16_to_cpu(id->cntlid);
3652
3653 if (!ctrl->identified) {
3654 unsigned int i;
3655
3656 /*
3657 * Check for quirks. Quirk can depend on firmware version,
3658 * so, in principle, the set of quirks present can change
3659 * across a reset. As a possible future enhancement, we
3660 * could re-scan for quirks every time we reinitialize
3661 * the device, but we'd have to make sure that the driver
3662 * behaves intelligently if the quirks change.
3663 */
3664 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3665 if (quirk_matches(id, &core_quirks[i]))
3666 ctrl->quirks |= core_quirks[i].quirks;
3667 }
3668
3669 ret = nvme_init_subsystem(ctrl, id);
3670 if (ret)
3671 goto out_free;
3672
3673 ret = nvme_init_effects(ctrl, id);
3674 if (ret)
3675 goto out_free;
3676 }
3677 memcpy(ctrl->subsys->firmware_rev, id->fr,
3678 sizeof(ctrl->subsys->firmware_rev));
3679
3680 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3681 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3682 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3683 }
3684
3685 ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3686 ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3687 ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3688
3689 ctrl->oacs = le16_to_cpu(id->oacs);
3690 ctrl->oncs = le16_to_cpu(id->oncs);
3691 ctrl->mtfa = le16_to_cpu(id->mtfa);
3692 ctrl->oaes = le32_to_cpu(id->oaes);
3693 ctrl->wctemp = le16_to_cpu(id->wctemp);
3694 ctrl->cctemp = le16_to_cpu(id->cctemp);
3695
3696 atomic_set(&ctrl->abort_limit, id->acl + 1);
3697 ctrl->vwc = id->vwc;
3698 if (id->mdts)
3699 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3700 else
3701 max_hw_sectors = UINT_MAX;
3702 ctrl->max_hw_sectors =
3703 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3704
3705 lim = queue_limits_start_update(ctrl->admin_q);
3706 nvme_set_ctrl_limits(ctrl, &lim, true);
3707 ret = queue_limits_commit_update(ctrl->admin_q, &lim);
3708 if (ret)
3709 goto out_free;
3710
3711 ctrl->sgls = le32_to_cpu(id->sgls);
3712 ctrl->kas = le16_to_cpu(id->kas);
3713 ctrl->max_namespaces = le32_to_cpu(id->mnan);
3714 ctrl->ctratt = le32_to_cpu(id->ctratt);
3715
3716 ctrl->cntrltype = id->cntrltype;
3717 ctrl->dctype = id->dctype;
3718
3719 if (id->rtd3e) {
3720 /* us -> s */
3721 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3722
3723 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3724 shutdown_timeout, 60);
3725
3726 if (ctrl->shutdown_timeout != shutdown_timeout)
3727 dev_info(ctrl->device,
3728 "D3 entry latency set to %u seconds\n",
3729 ctrl->shutdown_timeout);
3730 } else
3731 ctrl->shutdown_timeout = shutdown_timeout;
3732
3733 ctrl->npss = id->npss;
3734 ctrl->apsta = id->apsta;
3735 prev_apst_enabled = ctrl->apst_enabled;
3736 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3737 if (force_apst && id->apsta) {
3738 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3739 ctrl->apst_enabled = true;
3740 } else {
3741 ctrl->apst_enabled = false;
3742 }
3743 } else {
3744 ctrl->apst_enabled = id->apsta;
3745 }
3746 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3747
3748 if (ctrl->ops->flags & NVME_F_FABRICS) {
3749 ctrl->icdoff = le16_to_cpu(id->icdoff);
3750 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3751 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3752 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3753
3754 ret = nvme_check_ctrl_fabric_info(ctrl, id);
3755 if (ret)
3756 goto out_free;
3757 } else {
3758 ctrl->hmpre = le32_to_cpu(id->hmpre);
3759 ctrl->hmmin = le32_to_cpu(id->hmmin);
3760 ctrl->hmminds = le32_to_cpu(id->hmminds);
3761 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3762 }
3763
3764 ret = nvme_mpath_init_identify(ctrl, id);
3765 if (ret < 0)
3766 goto out_free;
3767
3768 if (ctrl->apst_enabled && !prev_apst_enabled)
3769 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3770 else if (!ctrl->apst_enabled && prev_apst_enabled)
3771 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3772 ctrl->awupf = le16_to_cpu(id->awupf);
3773out_free:
3774 kfree(id);
3775 return ret;
3776}
3777
3778/*
3779 * Initialize the cached copies of the Identify data and various controller
3780 * register in our nvme_ctrl structure. This should be called as soon as
3781 * the admin queue is fully up and running.
3782 */
3783int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3784{
3785 int ret;
3786
3787 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3788 if (ret) {
3789 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3790 return ret;
3791 }
3792
3793 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3794
3795 if (ctrl->vs >= NVME_VS(1, 1, 0))
3796 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3797
3798 ret = nvme_init_identify(ctrl);
3799 if (ret)
3800 return ret;
3801
3802 if (nvme_admin_ctrl(ctrl)) {
3803 /*
3804 * An admin controller has one admin queue, but no I/O queues.
3805 * Override queue_count so it only creates an admin queue.
3806 */
3807 dev_dbg(ctrl->device,
3808 "Subsystem %s is an administrative controller",
3809 ctrl->subsys->subnqn);
3810 ctrl->queue_count = 1;
3811 }
3812
3813 ret = nvme_configure_apst(ctrl);
3814 if (ret < 0)
3815 return ret;
3816
3817 ret = nvme_configure_timestamp(ctrl);
3818 if (ret < 0)
3819 return ret;
3820
3821 ret = nvme_configure_host_options(ctrl);
3822 if (ret < 0)
3823 return ret;
3824
3825 nvme_configure_opal(ctrl, was_suspended);
3826
3827 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3828 /*
3829 * Do not return errors unless we are in a controller reset,
3830 * the controller works perfectly fine without hwmon.
3831 */
3832 ret = nvme_hwmon_init(ctrl);
3833 if (ret == -EINTR)
3834 return ret;
3835
3836 if (!nvme_ctrl_sgl_supported(ctrl))
3837 dev_info(ctrl->device,
3838 "passthrough uses implicit buffer lengths\n");
3839 }
3840
3841 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3842 ctrl->identified = true;
3843
3844 nvme_start_keep_alive(ctrl);
3845
3846 return 0;
3847}
3848EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3849
3850static int nvme_dev_open(struct inode *inode, struct file *file)
3851{
3852 struct nvme_ctrl *ctrl =
3853 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3854
3855 switch (nvme_ctrl_state(ctrl)) {
3856 case NVME_CTRL_LIVE:
3857 break;
3858 default:
3859 return -EWOULDBLOCK;
3860 }
3861
3862 nvme_get_ctrl(ctrl);
3863 if (!try_module_get(ctrl->ops->module)) {
3864 nvme_put_ctrl(ctrl);
3865 return -EINVAL;
3866 }
3867
3868 file->private_data = ctrl;
3869 return 0;
3870}
3871
3872static int nvme_dev_release(struct inode *inode, struct file *file)
3873{
3874 struct nvme_ctrl *ctrl =
3875 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3876
3877 module_put(ctrl->ops->module);
3878 nvme_put_ctrl(ctrl);
3879 return 0;
3880}
3881
3882static const struct file_operations nvme_dev_fops = {
3883 .owner = THIS_MODULE,
3884 .open = nvme_dev_open,
3885 .release = nvme_dev_release,
3886 .unlocked_ioctl = nvme_dev_ioctl,
3887 .compat_ioctl = compat_ptr_ioctl,
3888 .uring_cmd = nvme_dev_uring_cmd,
3889};
3890
3891static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3892 unsigned nsid)
3893 __must_hold(&ctrl->subsys->lock)
3894{
3895 struct nvme_ns_head *h;
3896
3897 lockdep_assert_held(&ctrl->subsys->lock);
3898
3899 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3900 /*
3901 * Private namespaces can share NSIDs under some conditions.
3902 * In that case we can't use the same ns_head for namespaces
3903 * with the same NSID.
3904 */
3905 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3906 continue;
3907 if (nvme_tryget_ns_head(h))
3908 return h;
3909 }
3910
3911 return NULL;
3912}
3913
3914static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3915 struct nvme_ns_ids *ids)
3916 __must_hold(&subsys->lock)
3917{
3918 bool has_uuid = !uuid_is_null(&ids->uuid);
3919 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3920 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3921 struct nvme_ns_head *h;
3922
3923 lockdep_assert_held(&subsys->lock);
3924
3925 list_for_each_entry(h, &subsys->nsheads, entry) {
3926 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3927 return -EINVAL;
3928 if (has_nguid &&
3929 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3930 return -EINVAL;
3931 if (has_eui64 &&
3932 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3933 return -EINVAL;
3934 }
3935
3936 return 0;
3937}
3938
3939static void nvme_cdev_rel(struct device *dev)
3940{
3941 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3942 if (dev->parent->class == &nvme_class)
3943 nvme_put_ns(container_of(dev, struct nvme_ns, cdev_device));
3944 else
3945 nvme_put_ns_head(container_of(dev, struct nvme_ns_head,
3946 cdev_device));
3947}
3948
3949void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3950{
3951 cdev_device_del(cdev, cdev_device);
3952 put_device(cdev_device);
3953}
3954
3955int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3956 const struct file_operations *fops, struct module *owner,
3957 int ctrl, int head)
3958{
3959 int minor, ret;
3960
3961 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3962 if (minor < 0)
3963 return minor;
3964
3965 ret = dev_set_name(cdev_device, "ng%dn%d", ctrl, head);
3966 if (ret) {
3967 ida_free(&nvme_ns_chr_minor_ida, minor);
3968 return ret;
3969 }
3970 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3971 cdev_device->class = &nvme_ns_chr_class;
3972 cdev_device->release = nvme_cdev_rel;
3973 device_initialize(cdev_device);
3974 cdev_init(cdev, fops);
3975 cdev->owner = owner;
3976 ret = cdev_device_add(cdev, cdev_device);
3977 if (ret)
3978 put_device(cdev_device);
3979
3980 return ret;
3981}
3982
3983static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3984{
3985 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3986}
3987
3988static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3989{
3990 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3991 return 0;
3992}
3993
3994static const struct file_operations nvme_ns_chr_fops = {
3995 .owner = THIS_MODULE,
3996 .open = nvme_ns_chr_open,
3997 .release = nvme_ns_chr_release,
3998 .unlocked_ioctl = nvme_ns_chr_ioctl,
3999 .compat_ioctl = compat_ptr_ioctl,
4000 .uring_cmd = nvme_ns_chr_uring_cmd,
4001 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
4002};
4003
4004static void nvme_add_ns_cdev(struct nvme_ns *ns)
4005{
4006 ns->cdev_device.parent = ns->ctrl->device;
4007
4008 nvme_get_ns(ns); /* Undone in nvme_cdev_rel() */
4009 if (nvme_cdev_add(&ns->cdev, &ns->cdev_device,
4010 &nvme_ns_chr_fops, ns->ctrl->ops->module,
4011 ns->ctrl->instance, ns->head->instance)) {
4012 dev_err(ns->ctrl->device, "Unable to create the ng%dn%d device\n",
4013 ns->ctrl->instance, ns->head->instance);
4014 nvme_put_ns(ns);
4015 return;
4016 }
4017 set_bit(NVME_NS_CDEV_LIVE, &ns->flags);
4018}
4019
4020static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ns *ns,
4021 struct nvme_ns_info *info)
4022 __must_hold(&ns->ctrl->subsys->lock)
4023{
4024 struct nvme_ctrl *ctrl = ns->ctrl;
4025 struct nvme_ns_head *head;
4026 size_t size = sizeof(*head);
4027 int ret = -ENOMEM;
4028
4029#ifdef CONFIG_NVME_MULTIPATH
4030 size += nr_node_ids * sizeof(struct nvme_ns *);
4031#endif
4032
4033 head = kzalloc(size, GFP_KERNEL);
4034 if (!head)
4035 goto out;
4036 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
4037 if (ret < 0)
4038 goto out_free_head;
4039 head->instance = ret;
4040 INIT_LIST_HEAD(&head->list);
4041 ret = init_srcu_struct(&head->srcu);
4042 if (ret)
4043 goto out_ida_remove;
4044 head->subsys = ctrl->subsys;
4045 head->ns_id = info->nsid;
4046 head->ids = info->ids;
4047 head->shared = info->is_shared;
4048 head->rotational = info->is_rotational;
4049 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
4050 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
4051 kref_init(&head->ref);
4052 ns->head = head;
4053
4054 if (head->ids.csi) {
4055 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
4056 if (ret)
4057 goto out_cleanup_srcu;
4058 } else
4059 head->effects = ctrl->effects;
4060
4061 if (ctrl->ctratt & NVME_CTRL_ATTR_FDPS) {
4062 ret = nvme_query_fdp_info(ns, info);
4063 if (ret < 0)
4064 goto out_cleanup_srcu;
4065 }
4066
4067 ret = nvme_mpath_alloc_disk(ctrl, head);
4068 if (ret)
4069 goto out_cleanup_fdp;
4070
4071 list_add_tail(&head->entry, &ctrl->subsys->nsheads);
4072
4073 kref_get(&ctrl->subsys->ref);
4074
4075 return head;
4076out_cleanup_fdp:
4077 kfree(head->plids);
4078out_cleanup_srcu:
4079 cleanup_srcu_struct(&head->srcu);
4080out_ida_remove:
4081 ida_free(&ctrl->subsys->ns_ida, head->instance);
4082out_free_head:
4083 kfree(head);
4084 ns->head = NULL;
4085out:
4086 if (ret > 0)
4087 ret = blk_status_to_errno(nvme_error_status(ret));
4088 return ERR_PTR(ret);
4089}
4090
4091static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
4092 struct nvme_ns_ids *ids)
4093{
4094 struct nvme_subsystem *s;
4095 int ret = 0;
4096
4097 /*
4098 * Note that this check is racy as we try to avoid holding the global
4099 * lock over the whole ns_head creation. But it is only intended as
4100 * a sanity check anyway.
4101 */
4102 mutex_lock(&nvme_subsystems_lock);
4103 list_for_each_entry(s, &nvme_subsystems, entry) {
4104 if (s == this)
4105 continue;
4106 mutex_lock(&s->lock);
4107 ret = nvme_subsys_check_duplicate_ids(s, ids);
4108 mutex_unlock(&s->lock);
4109 if (ret)
4110 break;
4111 }
4112 mutex_unlock(&nvme_subsystems_lock);
4113
4114 return ret;
4115}
4116
4117static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
4118{
4119 struct nvme_ctrl *ctrl = ns->ctrl;
4120 struct nvme_ns_head *head = NULL;
4121 int ret;
4122
4123 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
4124 if (ret) {
4125 /*
4126 * We've found two different namespaces on two different
4127 * subsystems that report the same ID. This is pretty nasty
4128 * for anything that actually requires unique device
4129 * identification. In the kernel we need this for multipathing,
4130 * and in user space the /dev/disk/by-id/ links rely on it.
4131 *
4132 * If the device also claims to be multi-path capable back off
4133 * here now and refuse the probe the second device as this is a
4134 * recipe for data corruption. If not this is probably a
4135 * cheap consumer device if on the PCIe bus, so let the user
4136 * proceed and use the shiny toy, but warn that with changing
4137 * probing order (which due to our async probing could just be
4138 * device taking longer to startup) the other device could show
4139 * up at any time.
4140 */
4141 nvme_print_device_info(ctrl);
4142 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
4143 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
4144 info->is_shared)) {
4145 dev_err(ctrl->device,
4146 "ignoring nsid %u because of duplicate IDs\n",
4147 info->nsid);
4148 return ret;
4149 }
4150
4151 dev_err(ctrl->device,
4152 "clearing duplicate IDs for nsid %u\n", info->nsid);
4153 dev_err(ctrl->device,
4154 "use of /dev/disk/by-id/ may cause data corruption\n");
4155 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
4156 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
4157 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
4158 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
4159 }
4160
4161 mutex_lock(&ctrl->subsys->lock);
4162 head = nvme_find_ns_head(ctrl, info->nsid);
4163 if (!head) {
4164 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
4165 if (ret) {
4166 dev_err(ctrl->device,
4167 "duplicate IDs in subsystem for nsid %u\n",
4168 info->nsid);
4169 goto out_unlock;
4170 }
4171 head = nvme_alloc_ns_head(ns, info);
4172 if (IS_ERR(head)) {
4173 ret = PTR_ERR(head);
4174 goto out_unlock;
4175 }
4176 } else {
4177 ret = -EINVAL;
4178 if ((!info->is_shared || !head->shared) &&
4179 !list_empty(&head->list)) {
4180 dev_err(ctrl->device,
4181 "Duplicate unshared namespace %u\n",
4182 info->nsid);
4183 goto out_put_ns_head;
4184 }
4185 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
4186 dev_err(ctrl->device,
4187 "IDs don't match for shared namespace %u\n",
4188 info->nsid);
4189 goto out_put_ns_head;
4190 }
4191
4192 if (!multipath) {
4193 dev_warn(ctrl->device,
4194 "Found shared namespace %u, but multipathing not supported.\n",
4195 info->nsid);
4196 dev_warn_once(ctrl->device,
4197 "Shared namespace support requires core_nvme.multipath=Y.\n");
4198 }
4199 }
4200
4201 list_add_tail_rcu(&ns->siblings, &head->list);
4202 ns->head = head;
4203 mutex_unlock(&ctrl->subsys->lock);
4204
4205#ifdef CONFIG_NVME_MULTIPATH
4206 if (cancel_delayed_work(&head->remove_work))
4207 module_put(THIS_MODULE);
4208#endif
4209 return 0;
4210
4211out_put_ns_head:
4212 nvme_put_ns_head(head);
4213out_unlock:
4214 mutex_unlock(&ctrl->subsys->lock);
4215 return ret;
4216}
4217
4218struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4219{
4220 struct nvme_ns *ns, *ret = NULL;
4221 int srcu_idx;
4222
4223 srcu_idx = srcu_read_lock(&ctrl->srcu);
4224 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4225 srcu_read_lock_held(&ctrl->srcu)) {
4226 if (ns->head->ns_id == nsid) {
4227 if (!nvme_get_ns(ns))
4228 continue;
4229 ret = ns;
4230 break;
4231 }
4232 if (ns->head->ns_id > nsid)
4233 break;
4234 }
4235 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4236 return ret;
4237}
4238EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, "NVME_TARGET_PASSTHRU");
4239
4240/*
4241 * Add the namespace to the controller list while keeping the list ordered.
4242 */
4243static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
4244{
4245 struct nvme_ns *tmp;
4246
4247 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
4248 if (tmp->head->ns_id < ns->head->ns_id) {
4249 list_add_rcu(&ns->list, &tmp->list);
4250 return;
4251 }
4252 }
4253 list_add_rcu(&ns->list, &ns->ctrl->namespaces);
4254}
4255
4256static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
4257{
4258 struct queue_limits lim = { };
4259 struct nvme_ns *ns;
4260 struct gendisk *disk;
4261 int node = ctrl->numa_node;
4262 bool last_path = false;
4263
4264 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
4265 if (!ns)
4266 return;
4267
4268 if (ctrl->opts && ctrl->opts->data_digest)
4269 lim.features |= BLK_FEAT_STABLE_WRITES;
4270 if (ctrl->ops->supports_pci_p2pdma &&
4271 ctrl->ops->supports_pci_p2pdma(ctrl))
4272 lim.features |= BLK_FEAT_PCI_P2PDMA;
4273
4274 disk = blk_mq_alloc_disk(ctrl->tagset, &lim, ns);
4275 if (IS_ERR(disk))
4276 goto out_free_ns;
4277 disk->fops = &nvme_bdev_ops;
4278 disk->private_data = ns;
4279
4280 ns->disk = disk;
4281 ns->queue = disk->queue;
4282 ns->ctrl = ctrl;
4283 kref_init(&ns->kref);
4284
4285 if (nvme_init_ns_head(ns, info))
4286 goto out_cleanup_disk;
4287
4288 /*
4289 * If multipathing is enabled, the device name for all disks and not
4290 * just those that represent shared namespaces needs to be based on the
4291 * subsystem instance. Using the controller instance for private
4292 * namespaces could lead to naming collisions between shared and private
4293 * namespaces if they don't use a common numbering scheme.
4294 *
4295 * If multipathing is not enabled, disk names must use the controller
4296 * instance as shared namespaces will show up as multiple block
4297 * devices.
4298 */
4299 if (nvme_ns_head_multipath(ns->head)) {
4300 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
4301 ctrl->instance, ns->head->instance);
4302 disk->flags |= GENHD_FL_HIDDEN;
4303 } else if (multipath) {
4304 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
4305 ns->head->instance);
4306 } else {
4307 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
4308 ns->head->instance);
4309 }
4310
4311 if (nvme_update_ns_info(ns, info))
4312 goto out_unlink_ns;
4313
4314 mutex_lock(&ctrl->namespaces_lock);
4315 /*
4316 * Ensure that no namespaces are added to the ctrl list after the queues
4317 * are frozen, thereby avoiding a deadlock between scan and reset.
4318 */
4319 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
4320 mutex_unlock(&ctrl->namespaces_lock);
4321 goto out_unlink_ns;
4322 }
4323 blk_queue_rq_timeout(ns->queue, ctrl->io_timeout);
4324 nvme_ns_add_to_ctrl_list(ns);
4325 mutex_unlock(&ctrl->namespaces_lock);
4326 synchronize_srcu(&ctrl->srcu);
4327 nvme_get_ctrl(ctrl);
4328
4329 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
4330 goto out_cleanup_ns_from_list;
4331
4332 if (!nvme_ns_head_multipath(ns->head))
4333 nvme_add_ns_cdev(ns);
4334
4335 nvme_mpath_add_disk(ns, info->anagrpid);
4336 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
4337
4338 return;
4339
4340 out_cleanup_ns_from_list:
4341 nvme_put_ctrl(ctrl);
4342 mutex_lock(&ctrl->namespaces_lock);
4343 list_del_rcu(&ns->list);
4344 mutex_unlock(&ctrl->namespaces_lock);
4345 synchronize_srcu(&ctrl->srcu);
4346 out_unlink_ns:
4347 mutex_lock(&ctrl->subsys->lock);
4348 list_del_rcu(&ns->siblings);
4349 if (list_empty(&ns->head->list)) {
4350 list_del_init(&ns->head->entry);
4351 /*
4352 * If multipath is not configured, we still create a namespace
4353 * head (nshead), but head->disk is not initialized in that
4354 * case. As a result, only a single reference to nshead is held
4355 * (via kref_init()) when it is created. Therefore, ensure that
4356 * we do not release the reference to nshead twice if head->disk
4357 * is not present.
4358 */
4359 if (ns->head->disk)
4360 last_path = true;
4361 }
4362 mutex_unlock(&ctrl->subsys->lock);
4363
4364 /* guarantee not available in head->list */
4365 synchronize_srcu(&ns->head->srcu);
4366 if (last_path)
4367 nvme_put_ns_head(ns->head);
4368 nvme_put_ns_head(ns->head);
4369 out_cleanup_disk:
4370 put_disk(disk);
4371 out_free_ns:
4372 kfree(ns);
4373}
4374
4375static void nvme_ns_remove(struct nvme_ns *ns)
4376{
4377 bool last_path = false;
4378
4379 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
4380 return;
4381
4382 clear_bit(NVME_NS_READY, &ns->flags);
4383 set_capacity(ns->disk, 0);
4384 nvme_fault_inject_fini(&ns->fault_inject);
4385
4386 /*
4387 * Ensure that !NVME_NS_READY is seen by other threads to prevent
4388 * this ns going back into current_path.
4389 */
4390 synchronize_srcu(&ns->head->srcu);
4391
4392 /* wait for concurrent submissions */
4393 if (nvme_mpath_clear_current_path(ns))
4394 synchronize_srcu(&ns->head->srcu);
4395
4396 mutex_lock(&ns->ctrl->subsys->lock);
4397 list_del_rcu(&ns->siblings);
4398 if (list_empty(&ns->head->list)) {
4399 if (!nvme_mpath_queue_if_no_path(ns->head))
4400 list_del_init(&ns->head->entry);
4401 last_path = true;
4402 }
4403 mutex_unlock(&ns->ctrl->subsys->lock);
4404
4405 /* guarantee not available in head->list */
4406 synchronize_srcu(&ns->head->srcu);
4407
4408 if (!nvme_ns_head_multipath(ns->head)) {
4409 if (test_and_clear_bit(NVME_NS_CDEV_LIVE, &ns->flags))
4410 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
4411 }
4412
4413 nvme_mpath_remove_sysfs_link(ns);
4414
4415 del_gendisk(ns->disk);
4416
4417 mutex_lock(&ns->ctrl->namespaces_lock);
4418 list_del_rcu(&ns->list);
4419 mutex_unlock(&ns->ctrl->namespaces_lock);
4420 synchronize_srcu(&ns->ctrl->srcu);
4421
4422 if (last_path)
4423 nvme_mpath_remove_disk(ns->head);
4424 nvme_put_ns(ns);
4425}
4426
4427static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
4428{
4429 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
4430
4431 if (ns) {
4432 nvme_ns_remove(ns);
4433 nvme_put_ns(ns);
4434 }
4435}
4436
4437static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
4438{
4439 int ret = NVME_SC_INVALID_NS | NVME_STATUS_DNR;
4440
4441 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
4442 dev_err(ns->ctrl->device,
4443 "identifiers changed for nsid %u\n", ns->head->ns_id);
4444 goto out;
4445 }
4446
4447 ret = nvme_update_ns_info(ns, info);
4448out:
4449 /*
4450 * Only remove the namespace if we got a fatal error back from the
4451 * device, otherwise ignore the error and just move on.
4452 *
4453 * TODO: we should probably schedule a delayed retry here.
4454 */
4455 if (ret > 0 && (ret & NVME_STATUS_DNR))
4456 nvme_ns_remove(ns);
4457}
4458
4459static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4460{
4461 struct nvme_ns_info info = { .nsid = nsid };
4462 struct nvme_ns *ns;
4463 int ret = 1;
4464
4465 if (nvme_identify_ns_descs(ctrl, &info))
4466 return;
4467
4468 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
4469 dev_warn(ctrl->device,
4470 "command set not reported for nsid: %u\n", nsid);
4471 return;
4472 }
4473
4474 /*
4475 * If available try to use the Command Set Independent Identify Namespace
4476 * data structure to find all the generic information that is needed to
4477 * set up a namespace. If not fall back to the legacy version.
4478 */
4479 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
4480 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS) ||
4481 ctrl->vs >= NVME_VS(2, 0, 0))
4482 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
4483 if (ret > 0)
4484 ret = nvme_ns_info_from_identify(ctrl, &info);
4485
4486 if (info.is_removed)
4487 nvme_ns_remove_by_nsid(ctrl, nsid);
4488
4489 /*
4490 * Ignore the namespace if it is not ready. We will get an AEN once it
4491 * becomes ready and restart the scan.
4492 */
4493 if (ret || !info.is_ready)
4494 return;
4495
4496 ns = nvme_find_get_ns(ctrl, nsid);
4497 if (ns) {
4498 nvme_validate_ns(ns, &info);
4499 nvme_put_ns(ns);
4500 } else {
4501 nvme_alloc_ns(ctrl, &info);
4502 }
4503}
4504
4505/**
4506 * struct async_scan_info - keeps track of controller & NSIDs to scan
4507 * @ctrl: Controller on which namespaces are being scanned
4508 * @next_nsid: Index of next NSID to scan in ns_list
4509 * @ns_list: Pointer to list of NSIDs to scan
4510 *
4511 * Note: There is a single async_scan_info structure shared by all instances
4512 * of nvme_scan_ns_async() scanning a given controller, so the atomic
4513 * operations on next_nsid are critical to ensure each instance scans a unique
4514 * NSID.
4515 */
4516struct async_scan_info {
4517 struct nvme_ctrl *ctrl;
4518 atomic_t next_nsid;
4519 __le32 *ns_list;
4520};
4521
4522static void nvme_scan_ns_async(void *data, async_cookie_t cookie)
4523{
4524 struct async_scan_info *scan_info = data;
4525 int idx;
4526 u32 nsid;
4527
4528 idx = (u32)atomic_fetch_inc(&scan_info->next_nsid);
4529 nsid = le32_to_cpu(scan_info->ns_list[idx]);
4530
4531 nvme_scan_ns(scan_info->ctrl, nsid);
4532}
4533
4534static void nvme_remove_nsid_range(struct nvme_ctrl *ctrl, u32 start, u32 end)
4535{
4536 struct nvme_ns *ns, *next;
4537 LIST_HEAD(rm_list);
4538
4539 mutex_lock(&ctrl->namespaces_lock);
4540 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
4541 if (ns->head->ns_id >= end)
4542 break;
4543 if (ns->head->ns_id > start) {
4544 list_del_rcu(&ns->list);
4545 synchronize_srcu(&ctrl->srcu);
4546 list_add_tail_rcu(&ns->list, &rm_list);
4547 }
4548 }
4549 mutex_unlock(&ctrl->namespaces_lock);
4550
4551 list_for_each_entry_safe(ns, next, &rm_list, list)
4552 nvme_ns_remove(ns);
4553}
4554
4555static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
4556{
4557 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
4558 __le32 *ns_list;
4559 u32 prev = 0;
4560 int ret = 0, i;
4561 ASYNC_DOMAIN(domain);
4562 struct async_scan_info scan_info;
4563
4564 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
4565 if (!ns_list)
4566 return -ENOMEM;
4567
4568 scan_info.ctrl = ctrl;
4569 scan_info.ns_list = ns_list;
4570 for (;;) {
4571 struct nvme_command cmd = {
4572 .identify.opcode = nvme_admin_identify,
4573 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST,
4574 .identify.nsid = cpu_to_le32(prev),
4575 };
4576
4577 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
4578 NVME_IDENTIFY_DATA_SIZE);
4579 if (ret) {
4580 dev_warn(ctrl->device,
4581 "Identify NS List failed (status=0x%x)\n", ret);
4582 goto free;
4583 }
4584
4585 atomic_set(&scan_info.next_nsid, 0);
4586 for (i = 0; i < nr_entries; i++) {
4587 u32 nsid = le32_to_cpu(ns_list[i]);
4588
4589 if (!nsid) /* end of the list? */
4590 goto out;
4591 async_schedule_domain(nvme_scan_ns_async, &scan_info,
4592 &domain);
4593 if (prev + 1 < nsid)
4594 nvme_remove_nsid_range(ctrl, prev, nsid);
4595 prev = max(prev + 1, nsid);
4596 }
4597 async_synchronize_full_domain(&domain);
4598 }
4599 out:
4600 nvme_remove_nsid_range(ctrl, prev, UINT_MAX);
4601 free:
4602 async_synchronize_full_domain(&domain);
4603 kfree(ns_list);
4604 return ret;
4605}
4606
4607static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4608{
4609 struct nvme_id_ctrl *id;
4610 u32 nn, i;
4611
4612 if (nvme_identify_ctrl(ctrl, &id))
4613 return;
4614 nn = le32_to_cpu(id->nn);
4615 kfree(id);
4616
4617 for (i = 1; i <= nn; i++)
4618 nvme_scan_ns(ctrl, i);
4619
4620 nvme_remove_nsid_range(ctrl, nn, UINT_MAX);
4621}
4622
4623static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4624{
4625 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4626 __le32 *log;
4627 int error;
4628
4629 log = kzalloc(log_size, GFP_KERNEL);
4630 if (!log)
4631 return;
4632
4633 /*
4634 * We need to read the log to clear the AEN, but we don't want to rely
4635 * on it for the changed namespace information as userspace could have
4636 * raced with us in reading the log page, which could cause us to miss
4637 * updates.
4638 */
4639 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4640 NVME_CSI_NVM, log, log_size, 0);
4641 if (error)
4642 dev_warn(ctrl->device,
4643 "reading changed ns log failed: %d\n", error);
4644
4645 kfree(log);
4646}
4647
4648static void nvme_scan_work(struct work_struct *work)
4649{
4650 struct nvme_ctrl *ctrl =
4651 container_of(work, struct nvme_ctrl, scan_work);
4652 int ret;
4653
4654 /* No tagset on a live ctrl means IO queues could not created */
4655 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4656 return;
4657
4658 /*
4659 * Identify controller limits can change at controller reset due to
4660 * new firmware download, even though it is not common we cannot ignore
4661 * such scenario. Controller's non-mdts limits are reported in the unit
4662 * of logical blocks that is dependent on the format of attached
4663 * namespace. Hence re-read the limits at the time of ns allocation.
4664 */
4665 ret = nvme_init_non_mdts_limits(ctrl);
4666 if (ret < 0) {
4667 dev_warn(ctrl->device,
4668 "reading non-mdts-limits failed: %d\n", ret);
4669 return;
4670 }
4671
4672 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4673 dev_info(ctrl->device, "rescanning namespaces.\n");
4674 nvme_clear_changed_ns_log(ctrl);
4675 }
4676
4677 mutex_lock(&ctrl->scan_lock);
4678 if (!nvme_id_cns_ok(ctrl, NVME_ID_CNS_NS_ACTIVE_LIST)) {
4679 nvme_scan_ns_sequential(ctrl);
4680 } else {
4681 /*
4682 * Fall back to sequential scan if DNR is set to handle broken
4683 * devices which should support Identify NS List (as per the VS
4684 * they report) but don't actually support it.
4685 */
4686 ret = nvme_scan_ns_list(ctrl);
4687 if (ret > 0 && ret & NVME_STATUS_DNR)
4688 nvme_scan_ns_sequential(ctrl);
4689 }
4690 mutex_unlock(&ctrl->scan_lock);
4691
4692 /* Requeue if we have missed AENs */
4693 if (test_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events))
4694 nvme_queue_scan(ctrl);
4695#ifdef CONFIG_NVME_MULTIPATH
4696 else if (ctrl->ana_log_buf)
4697 /* Re-read the ANA log page to not miss updates */
4698 queue_work(nvme_wq, &ctrl->ana_work);
4699#endif
4700}
4701
4702/*
4703 * This function iterates the namespace list unlocked to allow recovery from
4704 * controller failure. It is up to the caller to ensure the namespace list is
4705 * not modified by scan work while this function is executing.
4706 */
4707void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4708{
4709 struct nvme_ns *ns, *next;
4710 LIST_HEAD(ns_list);
4711
4712 /*
4713 * make sure to requeue I/O to all namespaces as these
4714 * might result from the scan itself and must complete
4715 * for the scan_work to make progress
4716 */
4717 nvme_mpath_clear_ctrl_paths(ctrl);
4718
4719 /*
4720 * Unquiesce io queues so any pending IO won't hang, especially
4721 * those submitted from scan work
4722 */
4723 nvme_unquiesce_io_queues(ctrl);
4724
4725 /* prevent racing with ns scanning */
4726 flush_work(&ctrl->scan_work);
4727
4728 /*
4729 * The dead states indicates the controller was not gracefully
4730 * disconnected. In that case, we won't be able to flush any data while
4731 * removing the namespaces' disks; fail all the queues now to avoid
4732 * potentially having to clean up the failed sync later.
4733 */
4734 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4735 nvme_mark_namespaces_dead(ctrl);
4736
4737 /* this is a no-op when called from the controller reset handler */
4738 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4739
4740 mutex_lock(&ctrl->namespaces_lock);
4741 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu);
4742 mutex_unlock(&ctrl->namespaces_lock);
4743 synchronize_srcu(&ctrl->srcu);
4744
4745 list_for_each_entry_safe(ns, next, &ns_list, list)
4746 nvme_ns_remove(ns);
4747}
4748EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4749
4750static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4751{
4752 const struct nvme_ctrl *ctrl =
4753 container_of(dev, struct nvme_ctrl, ctrl_device);
4754 struct nvmf_ctrl_options *opts = ctrl->opts;
4755 int ret;
4756
4757 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4758 if (ret)
4759 return ret;
4760
4761 if (opts) {
4762 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4763 if (ret)
4764 return ret;
4765
4766 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4767 opts->trsvcid ?: "none");
4768 if (ret)
4769 return ret;
4770
4771 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4772 opts->host_traddr ?: "none");
4773 if (ret)
4774 return ret;
4775
4776 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4777 opts->host_iface ?: "none");
4778 }
4779 return ret;
4780}
4781
4782static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4783{
4784 char *envp[2] = { envdata, NULL };
4785
4786 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4787}
4788
4789static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4790{
4791 char *envp[2] = { NULL, NULL };
4792 u32 aen_result = ctrl->aen_result;
4793
4794 ctrl->aen_result = 0;
4795 if (!aen_result)
4796 return;
4797
4798 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4799 if (!envp[0])
4800 return;
4801 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4802 kfree(envp[0]);
4803}
4804
4805static void nvme_async_event_work(struct work_struct *work)
4806{
4807 struct nvme_ctrl *ctrl =
4808 container_of(work, struct nvme_ctrl, async_event_work);
4809
4810 nvme_aen_uevent(ctrl);
4811
4812 /*
4813 * The transport drivers must guarantee AER submission here is safe by
4814 * flushing ctrl async_event_work after changing the controller state
4815 * from LIVE and before freeing the admin queue.
4816 */
4817 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4818 ctrl->ops->submit_async_event(ctrl);
4819}
4820
4821static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4822{
4823
4824 u32 csts;
4825
4826 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4827 return false;
4828
4829 if (csts == ~0)
4830 return false;
4831
4832 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4833}
4834
4835static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4836{
4837 struct nvme_fw_slot_info_log *log;
4838 u8 next_fw_slot, cur_fw_slot;
4839
4840 log = kmalloc_obj(*log);
4841 if (!log)
4842 return;
4843
4844 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4845 log, sizeof(*log), 0)) {
4846 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4847 goto out_free_log;
4848 }
4849
4850 cur_fw_slot = log->afi & 0x7;
4851 next_fw_slot = (log->afi & 0x70) >> 4;
4852 if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) {
4853 dev_info(ctrl->device,
4854 "Firmware is activated after next Controller Level Reset\n");
4855 goto out_free_log;
4856 }
4857
4858 memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1],
4859 sizeof(ctrl->subsys->firmware_rev));
4860
4861out_free_log:
4862 kfree(log);
4863}
4864
4865static void nvme_fw_act_work(struct work_struct *work)
4866{
4867 struct nvme_ctrl *ctrl = container_of(work,
4868 struct nvme_ctrl, fw_act_work);
4869 unsigned long fw_act_timeout;
4870
4871 nvme_auth_stop(ctrl);
4872
4873 if (ctrl->mtfa)
4874 fw_act_timeout = jiffies + msecs_to_jiffies(ctrl->mtfa * 100);
4875 else
4876 fw_act_timeout = jiffies + secs_to_jiffies(admin_timeout);
4877
4878 nvme_quiesce_io_queues(ctrl);
4879 while (nvme_ctrl_pp_status(ctrl)) {
4880 if (time_after(jiffies, fw_act_timeout)) {
4881 dev_warn(ctrl->device,
4882 "Fw activation timeout, reset controller\n");
4883 nvme_try_sched_reset(ctrl);
4884 return;
4885 }
4886 msleep(100);
4887 }
4888
4889 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_CONNECTING) ||
4890 !nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4891 return;
4892
4893 nvme_unquiesce_io_queues(ctrl);
4894 /* read FW slot information to clear the AER */
4895 nvme_get_fw_slot_info(ctrl);
4896
4897 queue_work(nvme_wq, &ctrl->async_event_work);
4898}
4899
4900static u32 nvme_aer_type(u32 result)
4901{
4902 return result & 0x7;
4903}
4904
4905static u32 nvme_aer_subtype(u32 result)
4906{
4907 return (result & 0xff00) >> 8;
4908}
4909
4910static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4911{
4912 u32 aer_notice_type = nvme_aer_subtype(result);
4913 bool requeue = true;
4914
4915 switch (aer_notice_type) {
4916 case NVME_AER_NOTICE_NS_CHANGED:
4917 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4918 nvme_queue_scan(ctrl);
4919 break;
4920 case NVME_AER_NOTICE_FW_ACT_STARTING:
4921 /*
4922 * We are (ab)using the RESETTING state to prevent subsequent
4923 * recovery actions from interfering with the controller's
4924 * firmware activation.
4925 */
4926 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4927 requeue = false;
4928 queue_work(nvme_wq, &ctrl->fw_act_work);
4929 }
4930 break;
4931#ifdef CONFIG_NVME_MULTIPATH
4932 case NVME_AER_NOTICE_ANA:
4933 if (!ctrl->ana_log_buf)
4934 break;
4935 queue_work(nvme_wq, &ctrl->ana_work);
4936 break;
4937#endif
4938 case NVME_AER_NOTICE_DISC_CHANGED:
4939 ctrl->aen_result = result;
4940 break;
4941 default:
4942 dev_warn(ctrl->device, "async event result %08x\n", result);
4943 }
4944 return requeue;
4945}
4946
4947static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4948{
4949 dev_warn(ctrl->device,
4950 "resetting controller due to persistent internal error\n");
4951 nvme_reset_ctrl(ctrl);
4952}
4953
4954void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4955 volatile union nvme_result *res)
4956{
4957 u32 result = le32_to_cpu(res->u32);
4958 u32 aer_type = nvme_aer_type(result);
4959 u32 aer_subtype = nvme_aer_subtype(result);
4960 bool requeue = true;
4961
4962 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4963 return;
4964
4965 trace_nvme_async_event(ctrl, result);
4966 switch (aer_type) {
4967 case NVME_AER_NOTICE:
4968 requeue = nvme_handle_aen_notice(ctrl, result);
4969 break;
4970 case NVME_AER_ERROR:
4971 /*
4972 * For a persistent internal error, don't run async_event_work
4973 * to submit a new AER. The controller reset will do it.
4974 */
4975 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4976 nvme_handle_aer_persistent_error(ctrl);
4977 return;
4978 }
4979 fallthrough;
4980 case NVME_AER_SMART:
4981 case NVME_AER_CSS:
4982 case NVME_AER_VS:
4983 ctrl->aen_result = result;
4984 break;
4985 default:
4986 break;
4987 }
4988
4989 if (requeue)
4990 queue_work(nvme_wq, &ctrl->async_event_work);
4991}
4992EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4993
4994int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4995 const struct blk_mq_ops *ops, unsigned int cmd_size)
4996{
4997 int ret;
4998
4999 memset(set, 0, sizeof(*set));
5000 set->ops = ops;
5001 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
5002 if (ctrl->ops->flags & NVME_F_FABRICS)
5003 /* Reserved for fabric connect and keep alive */
5004 set->reserved_tags = 2;
5005 set->numa_node = ctrl->numa_node;
5006 if (ctrl->ops->flags & NVME_F_BLOCKING)
5007 set->flags |= BLK_MQ_F_BLOCKING;
5008 set->cmd_size = cmd_size;
5009 set->driver_data = ctrl;
5010 set->nr_hw_queues = 1;
5011 set->timeout = NVME_ADMIN_TIMEOUT;
5012 ret = blk_mq_alloc_tag_set(set);
5013 if (ret)
5014 return ret;
5015
5016 WARN_ON_ONCE(ctrl->admin_q);
5017
5018 ctrl->admin_q = blk_mq_alloc_queue(set, NULL, NULL);
5019 if (IS_ERR(ctrl->admin_q)) {
5020 ret = PTR_ERR(ctrl->admin_q);
5021 goto out_free_tagset;
5022 }
5023
5024 if (ctrl->ops->flags & NVME_F_FABRICS) {
5025 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL);
5026 if (IS_ERR(ctrl->fabrics_q)) {
5027 ret = PTR_ERR(ctrl->fabrics_q);
5028 goto out_cleanup_admin_q;
5029 }
5030 }
5031
5032 ctrl->admin_tagset = set;
5033 return 0;
5034
5035out_cleanup_admin_q:
5036 blk_mq_destroy_queue(ctrl->admin_q);
5037 blk_put_queue(ctrl->admin_q);
5038out_free_tagset:
5039 blk_mq_free_tag_set(set);
5040 ctrl->admin_q = NULL;
5041 ctrl->fabrics_q = NULL;
5042 return ret;
5043}
5044EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
5045
5046void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
5047{
5048 /*
5049 * As we're about to destroy the queue and free tagset
5050 * we can not have keep-alive work running.
5051 */
5052 nvme_stop_keep_alive(ctrl);
5053 blk_mq_destroy_queue(ctrl->admin_q);
5054 if (ctrl->fabrics_q)
5055 blk_mq_destroy_queue(ctrl->fabrics_q);
5056 blk_mq_free_tag_set(ctrl->admin_tagset);
5057}
5058EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
5059
5060int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
5061 const struct blk_mq_ops *ops, unsigned int nr_maps,
5062 unsigned int cmd_size)
5063{
5064 int ret;
5065
5066 memset(set, 0, sizeof(*set));
5067 set->ops = ops;
5068 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
5069 /*
5070 * Some Apple controllers requires tags to be unique across admin and
5071 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
5072 */
5073 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
5074 set->reserved_tags = NVME_AQ_DEPTH;
5075 else if (ctrl->ops->flags & NVME_F_FABRICS)
5076 /* Reserved for fabric connect */
5077 set->reserved_tags = 1;
5078 set->numa_node = ctrl->numa_node;
5079 if (ctrl->ops->flags & NVME_F_BLOCKING)
5080 set->flags |= BLK_MQ_F_BLOCKING;
5081 set->cmd_size = cmd_size;
5082 set->driver_data = ctrl;
5083 set->nr_hw_queues = ctrl->queue_count - 1;
5084 set->timeout = NVME_IO_TIMEOUT;
5085 set->nr_maps = nr_maps;
5086 ret = blk_mq_alloc_tag_set(set);
5087 if (ret)
5088 return ret;
5089
5090 if (ctrl->ops->flags & NVME_F_FABRICS) {
5091 struct queue_limits lim = {
5092 .features = BLK_FEAT_SKIP_TAGSET_QUIESCE,
5093 };
5094
5095 ctrl->connect_q = blk_mq_alloc_queue(set, &lim, NULL);
5096 if (IS_ERR(ctrl->connect_q)) {
5097 ret = PTR_ERR(ctrl->connect_q);
5098 goto out_free_tag_set;
5099 }
5100 }
5101
5102 ctrl->tagset = set;
5103 return 0;
5104
5105out_free_tag_set:
5106 blk_mq_free_tag_set(set);
5107 ctrl->connect_q = NULL;
5108 return ret;
5109}
5110EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
5111
5112void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
5113{
5114 if (ctrl->ops->flags & NVME_F_FABRICS) {
5115 blk_mq_destroy_queue(ctrl->connect_q);
5116 blk_put_queue(ctrl->connect_q);
5117 }
5118 blk_mq_free_tag_set(ctrl->tagset);
5119}
5120EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
5121
5122void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
5123{
5124 nvme_mpath_stop(ctrl);
5125 nvme_auth_stop(ctrl);
5126 nvme_stop_failfast_work(ctrl);
5127 flush_work(&ctrl->async_event_work);
5128 cancel_work_sync(&ctrl->fw_act_work);
5129 if (ctrl->ops->stop_ctrl)
5130 ctrl->ops->stop_ctrl(ctrl);
5131}
5132EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
5133
5134void nvme_start_ctrl(struct nvme_ctrl *ctrl)
5135{
5136 nvme_enable_aen(ctrl);
5137
5138 /*
5139 * persistent discovery controllers need to send indication to userspace
5140 * to re-read the discovery log page to learn about possible changes
5141 * that were missed. We identify persistent discovery controllers by
5142 * checking that they started once before, hence are reconnecting back.
5143 */
5144 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
5145 nvme_discovery_ctrl(ctrl)) {
5146 if (!ctrl->kato) {
5147 nvme_stop_keep_alive(ctrl);
5148 ctrl->kato = NVME_DEFAULT_KATO;
5149 nvme_start_keep_alive(ctrl);
5150 }
5151 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
5152 }
5153
5154 if (ctrl->queue_count > 1) {
5155 nvme_queue_scan(ctrl);
5156 nvme_unquiesce_io_queues(ctrl);
5157 nvme_mpath_update(ctrl);
5158 }
5159
5160 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
5161 nvme_change_uevent(ctrl, "NVME_EVENT=connected");
5162}
5163EXPORT_SYMBOL_GPL(nvme_start_ctrl);
5164
5165void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
5166{
5167 nvme_stop_keep_alive(ctrl);
5168 nvme_hwmon_exit(ctrl);
5169 nvme_fault_inject_fini(&ctrl->fault_inject);
5170 dev_pm_qos_hide_latency_tolerance(ctrl->device);
5171 cdev_device_del(&ctrl->cdev, ctrl->device);
5172 nvme_put_ctrl(ctrl);
5173}
5174EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
5175
5176static void nvme_free_ctrl(struct device *dev)
5177{
5178 struct nvme_ctrl *ctrl =
5179 container_of(dev, struct nvme_ctrl, ctrl_device);
5180 struct nvme_subsystem *subsys = ctrl->subsys;
5181
5182 if (ctrl->admin_q)
5183 blk_put_queue(ctrl->admin_q);
5184 if (ctrl->fabrics_q)
5185 blk_put_queue(ctrl->fabrics_q);
5186 if (!subsys || ctrl->instance != subsys->instance)
5187 ida_free(&nvme_instance_ida, ctrl->instance);
5188 nvme_mpath_uninit(ctrl);
5189 cleanup_srcu_struct(&ctrl->srcu);
5190 nvme_auth_stop(ctrl);
5191 nvme_auth_free(ctrl);
5192 __free_page(ctrl->discard_page);
5193 free_opal_dev(ctrl->opal_dev);
5194
5195 if (subsys) {
5196 mutex_lock(&nvme_subsystems_lock);
5197 list_del(&ctrl->subsys_entry);
5198 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
5199 mutex_unlock(&nvme_subsystems_lock);
5200 }
5201
5202 ctrl->ops->free_ctrl(ctrl);
5203
5204 if (subsys)
5205 nvme_put_subsystem(subsys);
5206}
5207
5208/*
5209 * Initialize a NVMe controller structures. This needs to be called during
5210 * earliest initialization so that we have the initialized structured around
5211 * during probing.
5212 *
5213 * On success, the caller must use the nvme_put_ctrl() to release this when
5214 * needed, which also invokes the ops->free_ctrl() callback.
5215 */
5216int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
5217 const struct nvme_ctrl_ops *ops, unsigned long quirks)
5218{
5219 int ret;
5220
5221 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
5222 ctrl->passthru_err_log_enabled = false;
5223 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
5224 spin_lock_init(&ctrl->lock);
5225 mutex_init(&ctrl->namespaces_lock);
5226
5227 ret = init_srcu_struct(&ctrl->srcu);
5228 if (ret)
5229 return ret;
5230
5231 mutex_init(&ctrl->scan_lock);
5232 INIT_LIST_HEAD(&ctrl->namespaces);
5233 ctrl->dev = dev;
5234 ctrl->ops = ops;
5235 ctrl->quirks = quirks;
5236 ctrl->numa_node = NUMA_NO_NODE;
5237 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
5238 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
5239 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
5240 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
5241 init_waitqueue_head(&ctrl->state_wq);
5242
5243 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
5244 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
5245 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
5246 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
5247 ctrl->ka_last_check_time = jiffies;
5248 ctrl->admin_timeout = NVME_ADMIN_TIMEOUT;
5249 ctrl->io_timeout = NVME_IO_TIMEOUT;
5250
5251 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
5252 PAGE_SIZE);
5253 ctrl->discard_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5254 if (!ctrl->discard_page) {
5255 ret = -ENOMEM;
5256 goto out;
5257 }
5258
5259 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
5260 if (ret < 0)
5261 goto out;
5262 ctrl->instance = ret;
5263
5264 ret = nvme_auth_init_ctrl(ctrl);
5265 if (ret)
5266 goto out_release_instance;
5267
5268 nvme_mpath_init_ctrl(ctrl);
5269
5270 device_initialize(&ctrl->ctrl_device);
5271 ctrl->device = &ctrl->ctrl_device;
5272 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
5273 ctrl->instance);
5274 ctrl->device->class = &nvme_class;
5275 ctrl->device->parent = ctrl->dev;
5276 if (ops->dev_attr_groups)
5277 ctrl->device->groups = ops->dev_attr_groups;
5278 else
5279 ctrl->device->groups = nvme_dev_attr_groups;
5280 ctrl->device->release = nvme_free_ctrl;
5281 dev_set_drvdata(ctrl->device, ctrl);
5282
5283 return ret;
5284
5285out_release_instance:
5286 ida_free(&nvme_instance_ida, ctrl->instance);
5287out:
5288 if (ctrl->discard_page)
5289 __free_page(ctrl->discard_page);
5290 cleanup_srcu_struct(&ctrl->srcu);
5291 return ret;
5292}
5293EXPORT_SYMBOL_GPL(nvme_init_ctrl);
5294
5295/*
5296 * On success, returns with an elevated controller reference and caller must
5297 * use nvme_uninit_ctrl() to properly free resources associated with the ctrl.
5298 */
5299int nvme_add_ctrl(struct nvme_ctrl *ctrl)
5300{
5301 int ret;
5302
5303 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
5304 if (ret)
5305 return ret;
5306
5307 cdev_init(&ctrl->cdev, &nvme_dev_fops);
5308 ctrl->cdev.owner = ctrl->ops->module;
5309 ret = cdev_device_add(&ctrl->cdev, ctrl->device);
5310 if (ret)
5311 return ret;
5312
5313 /*
5314 * Initialize latency tolerance controls. The sysfs files won't
5315 * be visible to userspace unless the device actually supports APST.
5316 */
5317 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
5318 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
5319 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
5320
5321 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
5322 nvme_get_ctrl(ctrl);
5323
5324 return 0;
5325}
5326EXPORT_SYMBOL_GPL(nvme_add_ctrl);
5327
5328/* let I/O to all namespaces fail in preparation for surprise removal */
5329void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
5330{
5331 struct nvme_ns *ns;
5332 int srcu_idx;
5333
5334 srcu_idx = srcu_read_lock(&ctrl->srcu);
5335 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5336 srcu_read_lock_held(&ctrl->srcu))
5337 blk_mark_disk_dead(ns->disk);
5338 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5339}
5340EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
5341
5342void nvme_unfreeze(struct nvme_ctrl *ctrl)
5343{
5344 struct nvme_ns *ns;
5345 int srcu_idx;
5346
5347 srcu_idx = srcu_read_lock(&ctrl->srcu);
5348 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5349 srcu_read_lock_held(&ctrl->srcu))
5350 blk_mq_unfreeze_queue_non_owner(ns->queue);
5351 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5352 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
5353}
5354EXPORT_SYMBOL_GPL(nvme_unfreeze);
5355
5356int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl)
5357{
5358 long timeout = ctrl->io_timeout;
5359 struct nvme_ns *ns;
5360 int srcu_idx;
5361
5362 srcu_idx = srcu_read_lock(&ctrl->srcu);
5363 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5364 srcu_read_lock_held(&ctrl->srcu)) {
5365 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
5366 if (timeout <= 0)
5367 break;
5368 }
5369 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5370 return timeout;
5371}
5372EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
5373
5374void nvme_wait_freeze(struct nvme_ctrl *ctrl)
5375{
5376 struct nvme_ns *ns;
5377 int srcu_idx;
5378
5379 srcu_idx = srcu_read_lock(&ctrl->srcu);
5380 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5381 srcu_read_lock_held(&ctrl->srcu))
5382 blk_mq_freeze_queue_wait(ns->queue);
5383 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5384}
5385EXPORT_SYMBOL_GPL(nvme_wait_freeze);
5386
5387void nvme_start_freeze(struct nvme_ctrl *ctrl)
5388{
5389 struct nvme_ns *ns;
5390 int srcu_idx;
5391
5392 set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
5393 srcu_idx = srcu_read_lock(&ctrl->srcu);
5394 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5395 srcu_read_lock_held(&ctrl->srcu))
5396 /*
5397 * Typical non_owner use case is from pci driver, in which
5398 * start_freeze is called from timeout work function, but
5399 * unfreeze is done in reset work context
5400 */
5401 blk_freeze_queue_start_non_owner(ns->queue);
5402 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5403}
5404EXPORT_SYMBOL_GPL(nvme_start_freeze);
5405
5406void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
5407{
5408 if (!ctrl->tagset)
5409 return;
5410 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5411 blk_mq_quiesce_tagset(ctrl->tagset);
5412 else
5413 blk_mq_wait_quiesce_done(ctrl->tagset);
5414}
5415EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
5416
5417void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
5418{
5419 if (!ctrl->tagset)
5420 return;
5421 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5422 blk_mq_unquiesce_tagset(ctrl->tagset);
5423}
5424EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
5425
5426void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
5427{
5428 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5429 blk_mq_quiesce_queue(ctrl->admin_q);
5430 else
5431 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
5432}
5433EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
5434
5435void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
5436{
5437 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5438 blk_mq_unquiesce_queue(ctrl->admin_q);
5439}
5440EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
5441
5442void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
5443{
5444 struct nvme_ns *ns;
5445 int srcu_idx;
5446
5447 srcu_idx = srcu_read_lock(&ctrl->srcu);
5448 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5449 srcu_read_lock_held(&ctrl->srcu))
5450 blk_sync_queue(ns->queue);
5451 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5452}
5453EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
5454
5455void nvme_sync_queues(struct nvme_ctrl *ctrl)
5456{
5457 nvme_sync_io_queues(ctrl);
5458 if (ctrl->admin_q)
5459 blk_sync_queue(ctrl->admin_q);
5460}
5461EXPORT_SYMBOL_GPL(nvme_sync_queues);
5462
5463struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
5464{
5465 if (file->f_op != &nvme_dev_fops)
5466 return NULL;
5467 return file->private_data;
5468}
5469EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, "NVME_TARGET_PASSTHRU");
5470
5471/*
5472 * Check we didn't inadvertently grow the command structure sizes:
5473 */
5474static inline void _nvme_check_size(void)
5475{
5476 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
5477 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
5478 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
5479 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
5480 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
5481 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
5482 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
5483 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
5484 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
5485 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
5486 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
5487 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
5488 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
5489 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
5490 NVME_IDENTIFY_DATA_SIZE);
5491 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
5492 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
5493 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
5494 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
5495 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
5496 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
5497 BUILD_BUG_ON(sizeof(struct nvme_endurance_group_log) != 512);
5498 BUILD_BUG_ON(sizeof(struct nvme_rotational_media_log) != 512);
5499 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
5500 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
5501 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
5502}
5503
5504
5505static int __init nvme_core_init(void)
5506{
5507 unsigned int wq_flags = WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS;
5508 int result = -ENOMEM;
5509
5510 _nvme_check_size();
5511
5512 nvme_wq = alloc_workqueue("nvme-wq", wq_flags, 0);
5513 if (!nvme_wq)
5514 goto out;
5515
5516 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", wq_flags, 0);
5517 if (!nvme_reset_wq)
5518 goto destroy_wq;
5519
5520 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", wq_flags, 0);
5521 if (!nvme_delete_wq)
5522 goto destroy_reset_wq;
5523
5524 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
5525 NVME_MINORS, "nvme");
5526 if (result < 0)
5527 goto destroy_delete_wq;
5528
5529 result = class_register(&nvme_class);
5530 if (result)
5531 goto unregister_chrdev;
5532
5533 result = class_register(&nvme_subsys_class);
5534 if (result)
5535 goto destroy_class;
5536
5537 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
5538 "nvme-generic");
5539 if (result < 0)
5540 goto destroy_subsys_class;
5541
5542 result = class_register(&nvme_ns_chr_class);
5543 if (result)
5544 goto unregister_generic_ns;
5545
5546 result = nvme_init_auth();
5547 if (result)
5548 goto destroy_ns_chr;
5549 return 0;
5550
5551destroy_ns_chr:
5552 class_unregister(&nvme_ns_chr_class);
5553unregister_generic_ns:
5554 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5555destroy_subsys_class:
5556 class_unregister(&nvme_subsys_class);
5557destroy_class:
5558 class_unregister(&nvme_class);
5559unregister_chrdev:
5560 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5561destroy_delete_wq:
5562 destroy_workqueue(nvme_delete_wq);
5563destroy_reset_wq:
5564 destroy_workqueue(nvme_reset_wq);
5565destroy_wq:
5566 destroy_workqueue(nvme_wq);
5567out:
5568 return result;
5569}
5570
5571static void __exit nvme_core_exit(void)
5572{
5573 nvme_exit_auth();
5574 class_unregister(&nvme_ns_chr_class);
5575 class_unregister(&nvme_subsys_class);
5576 class_unregister(&nvme_class);
5577 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5578 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5579 destroy_workqueue(nvme_delete_wq);
5580 destroy_workqueue(nvme_reset_wq);
5581 destroy_workqueue(nvme_wq);
5582 ida_destroy(&nvme_ns_chr_minor_ida);
5583 ida_destroy(&nvme_instance_ida);
5584}
5585
5586MODULE_LICENSE("GPL");
5587MODULE_VERSION("1.0");
5588MODULE_DESCRIPTION("NVMe host core framework");
5589module_init(nvme_core_init);
5590module_exit(nvme_core_exit);