| 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | # |
| 3 | # Phy drivers for Qualcomm and Atheros platforms |
| 4 | # |
| 5 | config PHY_ATH79_USB |
| 6 | tristate "Atheros AR71XX/9XXX USB PHY driver" |
| 7 | depends on OF && (ATH79 || COMPILE_TEST) |
| 8 | default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM |
| 9 | select RESET_CONTROLLER |
| 10 | select GENERIC_PHY |
| 11 | help |
| 12 | Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs. |
| 13 | |
| 14 | config PHY_QCOM_APQ8064_SATA |
| 15 | tristate "Qualcomm APQ8064 SATA SerDes/PHY driver" |
| 16 | depends on ARCH_QCOM |
| 17 | depends on HAS_IOMEM |
| 18 | depends on OF |
| 19 | select GENERIC_PHY |
| 20 | |
| 21 | config PHY_QCOM_EDP |
| 22 | tristate "Qualcomm eDP PHY driver" |
| 23 | depends on ARCH_QCOM || COMPILE_TEST |
| 24 | depends on OF |
| 25 | depends on COMMON_CLK |
| 26 | select GENERIC_PHY |
| 27 | help |
| 28 | Enable this driver to support the Qualcomm eDP PHY found in various |
| 29 | Qualcomm chipsets. |
| 30 | |
| 31 | config PHY_QCOM_IPQ4019_USB |
| 32 | tristate "Qualcomm IPQ4019 USB PHY driver" |
| 33 | depends on OF && (ARCH_QCOM || COMPILE_TEST) |
| 34 | select GENERIC_PHY |
| 35 | help |
| 36 | Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s. |
| 37 | |
| 38 | config PHY_QCOM_IPQ806X_SATA |
| 39 | tristate "Qualcomm IPQ806x SATA SerDes/PHY driver" |
| 40 | depends on ARCH_QCOM |
| 41 | depends on HAS_IOMEM |
| 42 | depends on OF |
| 43 | select GENERIC_PHY |
| 44 | |
| 45 | config PHY_QCOM_PCIE2 |
| 46 | tristate "Qualcomm PCIe Gen2 PHY Driver" |
| 47 | depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST) |
| 48 | select GENERIC_PHY |
| 49 | help |
| 50 | Enable this to support the Qualcomm PCIe PHY, used with the Synopsys |
| 51 | based PCIe controller. |
| 52 | |
| 53 | menuconfig PHY_QCOM_QMP |
| 54 | tristate "Qualcomm QMP PHY Drivers" |
| 55 | depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST) |
| 56 | |
| 57 | if PHY_QCOM_QMP |
| 58 | |
| 59 | config PHY_QCOM_QMP_COMBO |
| 60 | tristate "Qualcomm QMP Combo PHY Driver" |
| 61 | default PHY_QCOM_QMP |
| 62 | depends on TYPEC || TYPEC=n |
| 63 | depends on DRM || DRM=n |
| 64 | select GENERIC_PHY |
| 65 | select MFD_SYSCON |
| 66 | select DRM_AUX_BRIDGE if DRM_BRIDGE |
| 67 | help |
| 68 | Enable this to support the QMP Combo PHY transceiver that is used |
| 69 | with USB3 and DisplayPort controllers on Qualcomm chips. |
| 70 | |
| 71 | config PHY_QCOM_QMP_PCIE |
| 72 | tristate "Qualcomm QMP PCIe PHY Driver" |
| 73 | depends on PCI || COMPILE_TEST |
| 74 | select GENERIC_PHY |
| 75 | default PHY_QCOM_QMP |
| 76 | help |
| 77 | Enable this to support the QMP PCIe PHY transceiver that is used |
| 78 | with PCIe controllers on Qualcomm chips. |
| 79 | |
| 80 | config PHY_QCOM_QMP_PCIE_MULTIPHY |
| 81 | tristate "Qualcomm QMP PCIe Multi PHY Driver" |
| 82 | depends on PCI || COMPILE_TEST |
| 83 | select GENERIC_PHY |
| 84 | help |
| 85 | Enable this to support the QMP PCIe PHY transceiver that is used |
| 86 | with PCIe controllers on Qualcomm chips. This PHY is a single |
| 87 | multi-lane QMP block that can be configured either as one wide |
| 88 | link or as multiple narrower independent links (bifurcation). |
| 89 | |
| 90 | config PHY_QCOM_QMP_PCIE_8996 |
| 91 | tristate "Qualcomm QMP PCIe 8996 PHY Driver" |
| 92 | depends on PCI || COMPILE_TEST |
| 93 | select GENERIC_PHY |
| 94 | default PHY_QCOM_QMP |
| 95 | help |
| 96 | Enable this to support the QMP PCIe PHY transceiver that is used |
| 97 | with PCIe controllers on Qualcomm msm8996 chips. |
| 98 | |
| 99 | config PHY_QCOM_QMP_UFS |
| 100 | tristate "Qualcomm QMP UFS PHY Driver" |
| 101 | select GENERIC_PHY |
| 102 | default PHY_QCOM_QMP |
| 103 | help |
| 104 | Enable this to support the QMP UFS PHY transceiver that is used |
| 105 | with UFS controllers on Qualcomm chips. |
| 106 | |
| 107 | config PHY_QCOM_QMP_USB |
| 108 | tristate "Qualcomm QMP USB PHY Driver" |
| 109 | select GENERIC_PHY |
| 110 | default PHY_QCOM_QMP |
| 111 | help |
| 112 | Enable this to support the QMP USB PHY transceiver that is used |
| 113 | with USB3 controllers on Qualcomm chips. |
| 114 | |
| 115 | config PHY_QCOM_QMP_USB_LEGACY |
| 116 | tristate "Qualcomm QMP legacy USB PHY Driver" |
| 117 | select GENERIC_PHY |
| 118 | default n |
| 119 | help |
| 120 | Enable this legacy driver to support the QMP USB+DisplayPort Combo |
| 121 | PHY transceivers working only in USB3 mode on Qualcomm chips. This |
| 122 | driver exists only for compatibility with older device trees, |
| 123 | existing users have been migrated to PHY_QCOM_QMP_COMBO driver. |
| 124 | |
| 125 | endif # PHY_QCOM_QMP |
| 126 | |
| 127 | config PHY_QCOM_QUSB2 |
| 128 | tristate "Qualcomm QUSB2 PHY Driver" |
| 129 | depends on OF && (ARCH_QCOM || COMPILE_TEST) |
| 130 | depends on NVMEM || !NVMEM |
| 131 | select GENERIC_PHY |
| 132 | help |
| 133 | Enable this to support the HighSpeed QUSB2 PHY transceiver for USB |
| 134 | controllers on Qualcomm chips. This driver supports the high-speed |
| 135 | PHY which is usually paired with either the ChipIdea or Synopsys DWC3 |
| 136 | USB IPs on MSM SOCs. |
| 137 | |
| 138 | config PHY_QCOM_EUSB2_REPEATER |
| 139 | tristate "Qualcomm PMIC eUSB2 Repeater Driver" |
| 140 | depends on OF && (ARCH_QCOM || COMPILE_TEST) |
| 141 | select GENERIC_PHY |
| 142 | help |
| 143 | Enable support for the USB high-speed eUSB2 repeater on Qualcomm |
| 144 | PMICs. The repeater is paired with a Synopsys or M31 eUSB2 Phy |
| 145 | on Qualcomm SOCs. |
| 146 | |
| 147 | config PHY_QCOM_M31_USB |
| 148 | tristate "Qualcomm M31 HS PHY driver support" |
| 149 | depends on USB && (ARCH_QCOM || COMPILE_TEST) |
| 150 | select GENERIC_PHY |
| 151 | help |
| 152 | Enable this to support M31 HS PHY transceivers on Qualcomm chips |
| 153 | with DWC3 USB core. It handles PHY initialization, clock |
| 154 | management required after resetting the hardware and power |
| 155 | management. This driver is required even for peripheral only or |
| 156 | host only mode configurations. |
| 157 | |
| 158 | config PHY_QCOM_UNIPHY_PCIE_28LP |
| 159 | bool "PCIE UNIPHY 28LP PHY driver" |
| 160 | depends on ARCH_QCOM |
| 161 | depends on COMMON_CLK |
| 162 | depends on HAS_IOMEM |
| 163 | depends on OF |
| 164 | select GENERIC_PHY |
| 165 | help |
| 166 | Enable this to support the PCIe UNIPHY 28LP phy transceiver that |
| 167 | is used with PCIe controllers on Qualcomm IPQ5332 chips. It |
| 168 | handles PHY initialization, clock management required after |
| 169 | resetting the hardware and power management. |
| 170 | |
| 171 | config PHY_QCOM_M31_EUSB |
| 172 | tristate "Qualcomm M31 eUSB2 PHY driver support" |
| 173 | depends on USB && (ARCH_QCOM || COMPILE_TEST) |
| 174 | select GENERIC_PHY |
| 175 | help |
| 176 | Enable this to support M31 EUSB2 PHY transceivers on Qualcomm |
| 177 | chips with DWC3 USB core. It supports initializing and cleaning |
| 178 | up of the associated USB repeater that is paired with the eUSB2 |
| 179 | PHY. |
| 180 | |
| 181 | config PHY_QCOM_USB_HS |
| 182 | tristate "Qualcomm USB HS PHY module" |
| 183 | depends on USB_ULPI_BUS |
| 184 | depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in |
| 185 | select GENERIC_PHY |
| 186 | help |
| 187 | Support for the USB high-speed ULPI compliant phy on Qualcomm |
| 188 | chipsets. |
| 189 | |
| 190 | config PHY_QCOM_USB_SNPS_FEMTO_V2 |
| 191 | tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module" |
| 192 | depends on OF && (ARCH_QCOM || COMPILE_TEST) |
| 193 | select GENERIC_PHY |
| 194 | help |
| 195 | Enable support for the USB high-speed SNPS Femto phy on Qualcomm |
| 196 | chipsets. This PHY has differences in the register map compared |
| 197 | to the V1 variants. The PHY is paired with a Synopsys DWC3 USB |
| 198 | controller on Qualcomm SOCs. |
| 199 | |
| 200 | config PHY_QCOM_USB_HSIC |
| 201 | tristate "Qualcomm USB HSIC ULPI PHY module" |
| 202 | depends on USB_ULPI_BUS |
| 203 | select GENERIC_PHY |
| 204 | help |
| 205 | Support for the USB HSIC ULPI compliant PHY on QCOM chipsets. |
| 206 | |
| 207 | config PHY_QCOM_USB_HS_28NM |
| 208 | tristate "Qualcomm 28nm High-Speed PHY" |
| 209 | depends on OF && (ARCH_QCOM || COMPILE_TEST) |
| 210 | depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in |
| 211 | select GENERIC_PHY |
| 212 | help |
| 213 | Enable this to support the Qualcomm Synopsys DesignWare Core 28nm |
| 214 | High-Speed PHY driver. This driver supports the Hi-Speed PHY which |
| 215 | is usually paired with either the ChipIdea or Synopsys DWC3 USB |
| 216 | IPs on MSM SOCs. |
| 217 | |
| 218 | config PHY_QCOM_USB_SS |
| 219 | tristate "Qualcomm USB Super-Speed PHY driver" |
| 220 | depends on OF && (ARCH_QCOM || COMPILE_TEST) |
| 221 | depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in |
| 222 | select GENERIC_PHY |
| 223 | help |
| 224 | Enable this to support the Super-Speed USB transceiver on various |
| 225 | Qualcomm chipsets. |
| 226 | |
| 227 | config PHY_QCOM_IPQ806X_USB |
| 228 | tristate "Qualcomm IPQ806x DWC3 USB PHY driver" |
| 229 | depends on HAS_IOMEM |
| 230 | depends on OF && (ARCH_QCOM || COMPILE_TEST) |
| 231 | select GENERIC_PHY |
| 232 | help |
| 233 | This option enables support for the Synopsis PHYs present inside the |
| 234 | Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports |
| 235 | both HS and SS PHY controllers. |
| 236 | |
| 237 | config PHY_QCOM_SGMII_ETH |
| 238 | tristate "Qualcomm DWMAC SGMII SerDes/PHY driver" |
| 239 | depends on OF && (ARCH_QCOM || COMPILE_TEST) |
| 240 | depends on HAS_IOMEM |
| 241 | select GENERIC_PHY |
| 242 | help |
| 243 | Enable this to support the internal SerDes/SGMII PHY on various |
| 244 | Qualcomm chipsets. |