| 1 | |
| 2 | |
| 3 | * RTC class driver for "CMOS RTC": PCs, ACPI, etc
|
| 4 | *
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| 5 | * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
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| 6 | * Copyright (C) 2006 David Brownell (convert to new framework)
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| 7 |
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| 8 |
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| 9 | |
| 10 | * The original "cmos clock" chip was an MC146818 chip, now obsolete.
|
| 11 | * That defined the register interface now provided by all PCs, some
|
| 12 | * non-PC systems, and incorporated into ACPI. Modern PC chipsets
|
| 13 | * integrate an MC146818 clone in their southbridge, and boards use
|
| 14 | * that instead of discrete clones like the DS12887 or M48T86. There
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| 15 | * are also clones that connect using the LPC bus.
|
| 16 | *
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| 17 | * That register API is also used directly by various other drivers
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| 18 | * (notably for integrated NVRAM), infrastructure (x86 has code to
|
| 19 | * bypass the RTC framework, directly reading the RTC during boot
|
| 20 | * and updating minutes/seconds for systems using NTP synch) and
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| 21 | * utilities (like userspace 'hwclock', if no /dev node exists).
|
| 22 | *
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| 23 | * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
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| 24 | * interrupts disabled, holding the global rtc_lock, to exclude those
|
| 25 | * other drivers and utilities on correctly configured systems.
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| 26 |
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| 27 |
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| 28 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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| 29 |
|
| 30 | #include <linux/acpi.h>
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| 31 | #include <linux/kernel.h>
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| 32 | #include <linux/module.h>
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| 33 | #include <linux/init.h>
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| 34 | #include <linux/interrupt.h>
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| 35 | #include <linux/spinlock.h>
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| 36 | #include <linux/platform_device.h>
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| 37 | #include <linux/log2.h>
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| 38 | #include <linux/pm.h>
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| 39 | #include <linux/of.h>
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| 40 | #include <linux/of_platform.h>
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| 41 | #ifdef CONFIG_X86
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| 42 | #include <asm/i8259.h>
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| 43 | #include <asm/processor.h>
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| 44 | #include <linux/dmi.h>
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| 45 | #endif
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| 46 |
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| 47 |
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| 48 | #include <linux/mc146818rtc.h>
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| 49 |
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| 50 | #ifdef CONFIG_ACPI
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| 51 | |
| 52 | * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
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| 53 | *
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| 54 | * If cleared, ACPI SCI is only used to wake up the system from suspend
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| 55 | *
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| 56 | * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
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| 57 |
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| 58 |
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| 59 | static bool use_acpi_alarm;
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| 60 | module_param(use_acpi_alarm, bool, 0444);
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| 61 |
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| 62 | static inline int cmos_use_acpi_alarm(void)
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| 63 | {
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| 64 | return use_acpi_alarm;
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| 65 | }
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| 66 | #else
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| 67 |
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| 68 | static inline int cmos_use_acpi_alarm(void)
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| 69 | {
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| 70 | return 0;
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| 71 | }
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| 72 | #endif
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| 73 |
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| 74 | struct cmos_rtc {
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| 75 | struct rtc_device *rtc;
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| 76 | struct device *dev;
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| 77 | int irq;
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| 78 | struct resource *iomem;
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| 79 | time64_t alarm_expires;
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| 80 |
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| 81 | void (*wake_on)(struct device *);
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| 82 | void (*wake_off)(struct device *);
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| 83 |
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| 84 | u8 enabled_wake;
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| 85 | u8 suspend_ctrl;
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| 86 |
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| 87 |
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| 88 | u8 day_alrm;
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| 89 | u8 mon_alrm;
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| 90 | u8 century;
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| 91 |
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| 92 | struct rtc_wkalrm saved_wkalrm;
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| 93 | };
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| 94 |
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| 95 |
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| 96 | #define is_valid_irq(n) ((n) > 0)
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| 97 |
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| 98 | static const char driver_name[] = "rtc_cmos";
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| 99 |
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| 100 | |
| 101 | * always mask it against the irq enable bits in RTC_CONTROL. Bit values
|
| 102 | * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
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| 103 |
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| 104 | #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
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| 105 |
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| 106 | static inline int is_intr(u8 rtc_intr)
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| 107 | {
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| 108 | if (!(rtc_intr & RTC_IRQF))
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| 109 | return 0;
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| 110 | return rtc_intr & RTC_IRQMASK;
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| 111 | }
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| 112 |
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| 113 |
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| 114 |
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| 115 | |
| 116 | * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
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| 117 | * used in a broken "legacy replacement" mode. The breakage includes
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| 118 | * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
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| 119 | * other (better) use.
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| 120 | *
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| 121 | * When that broken mode is in use, platform glue provides a partial
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| 122 | * emulation of hardware RTC IRQ facilities using HPET #1. We don't
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| 123 | * want to use HPET for anything except those IRQs though...
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| 124 |
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| 125 | #ifdef CONFIG_HPET_EMULATE_RTC
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| 126 | #include <asm/hpet.h>
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| 127 | #else
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| 128 |
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| 129 | static inline int is_hpet_enabled(void)
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| 130 | {
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| 131 | return 0;
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| 132 | }
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| 133 |
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| 134 | static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
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| 135 | {
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| 136 | return 0;
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| 137 | }
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| 138 |
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| 139 | static inline int hpet_set_rtc_irq_bit(unsigned long mask)
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| 140 | {
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| 141 | return 0;
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| 142 | }
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| 143 |
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| 144 | static inline int
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| 145 | hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
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| 146 | {
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| 147 | return 0;
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| 148 | }
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| 149 |
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| 150 | static inline int hpet_set_periodic_freq(unsigned long freq)
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| 151 | {
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| 152 | return 0;
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| 153 | }
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| 154 |
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| 155 | static inline int hpet_rtc_timer_init(void)
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| 156 | {
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| 157 | return 0;
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| 158 | }
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| 159 |
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| 160 | extern irq_handler_t hpet_rtc_interrupt;
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| 161 |
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| 162 | static inline int hpet_register_irq_handler(irq_handler_t handler)
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| 163 | {
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| 164 | return 0;
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| 165 | }
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| 166 |
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| 167 | static inline int hpet_unregister_irq_handler(irq_handler_t handler)
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| 168 | {
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| 169 | return 0;
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| 170 | }
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| 171 |
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| 172 | #endif
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| 173 |
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| 174 |
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| 175 | static inline int use_hpet_alarm(void)
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| 176 | {
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| 177 | return is_hpet_enabled() && !cmos_use_acpi_alarm();
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| 178 | }
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| 179 |
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| 180 |
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| 181 |
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| 182 | #ifdef RTC_PORT
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| 183 |
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| 184 | |
| 185 | * for RTC and NVRAM and the second only for NVRAM. Caller must
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| 186 | * own rtc_lock ... and we won't worry about access during NMI.
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| 187 |
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| 188 | #define can_bank2 true
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| 189 |
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| 190 | static inline unsigned char cmos_read_bank2(unsigned char addr)
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| 191 | {
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| 192 | outb(addr, RTC_PORT(2));
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| 193 | return inb(RTC_PORT(3));
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| 194 | }
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| 195 |
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| 196 | static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
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| 197 | {
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| 198 | outb(addr, RTC_PORT(2));
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| 199 | outb(val, RTC_PORT(3));
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| 200 | }
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| 201 |
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| 202 | #else
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| 203 |
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| 204 | #define can_bank2 false
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| 205 |
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| 206 | static inline unsigned char cmos_read_bank2(unsigned char addr)
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| 207 | {
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| 208 | return 0;
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| 209 | }
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| 210 |
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| 211 | static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
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| 212 | {
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| 213 | }
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| 214 |
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| 215 | #endif
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| 216 |
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| 217 |
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| 218 |
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| 219 | static bool cmos_no_alarm(struct cmos_rtc *cmos)
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| 220 | {
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| 221 | return !is_valid_irq(cmos->irq) && !cmos_use_acpi_alarm();
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| 222 | }
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| 223 |
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| 224 | static int cmos_read_time(struct device *dev, struct rtc_time *t)
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| 225 | {
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| 226 | int ret;
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| 227 |
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| 228 | |
| 229 | * If pm_trace abused the RTC for storage, set the timespec to 0,
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| 230 | * which tells the caller that this RTC value is unusable.
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| 231 |
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| 232 | if (!pm_trace_rtc_valid())
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| 233 | return -EIO;
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| 234 |
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| 235 | ret = mc146818_get_time(t, 1000);
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| 236 | if (ret < 0) {
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| 237 | dev_err_ratelimited(dev, "unable to read current time\n");
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| 238 | return ret;
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| 239 | }
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| 240 |
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| 241 | return 0;
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| 242 | }
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| 243 |
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| 244 | static int cmos_set_time(struct device *dev, struct rtc_time *t)
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| 245 | {
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| 246 | |
| 247 | * takes effect exactly 500ms after we write the register.
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| 248 | * (Also queueing and other delays before we get this far.)
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| 249 |
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| 250 | return mc146818_set_time(t);
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| 251 | }
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| 252 |
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| 253 | struct cmos_read_alarm_callback_param {
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| 254 | struct cmos_rtc *cmos;
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| 255 | struct rtc_time *time;
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| 256 | unsigned char rtc_control;
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| 257 | };
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| 258 |
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| 259 | static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
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| 260 | void *param_in)
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| 261 | {
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| 262 | struct cmos_read_alarm_callback_param *p =
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| 263 | (struct cmos_read_alarm_callback_param *)param_in;
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| 264 | struct rtc_time *time = p->time;
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| 265 |
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| 266 | time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
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| 267 | time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
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| 268 | time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
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| 269 |
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| 270 | if (p->cmos->day_alrm) {
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| 271 |
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| 272 | time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
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| 273 | if (!time->tm_mday)
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| 274 | time->tm_mday = -1;
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| 275 |
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| 276 | if (p->cmos->mon_alrm) {
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| 277 | time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
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| 278 | if (!time->tm_mon)
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| 279 | time->tm_mon = -1;
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| 280 | }
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| 281 | }
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| 282 |
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| 283 | p->rtc_control = CMOS_READ(RTC_CONTROL);
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| 284 | }
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| 285 |
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| 286 | static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
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| 287 | {
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| 288 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
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| 289 | struct cmos_read_alarm_callback_param p = {
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| 290 | .cmos = cmos,
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| 291 | .time = &t->time,
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| 292 | };
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| 293 |
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| 294 |
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| 295 | if (cmos_no_alarm(cmos))
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| 296 | return -ETIMEDOUT;
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| 297 |
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| 298 | |
| 299 | * Some also support day and month, for alarms up to a year in
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| 300 | * the future.
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| 301 |
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| 302 |
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| 303 | |
| 304 | * update is in progress - during this time reads return bogus values
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| 305 | * and writes may fail silently. See for example "7th Generation Intel®
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| 306 | * Processor Family I/O for U/Y Platforms [...] Datasheet", section
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| 307 | * 27.7.1
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| 308 | *
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| 309 | * Use the mc146818_avoid_UIP() function to avoid this.
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| 310 |
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| 311 | if (!mc146818_avoid_UIP(cmos_read_alarm_callback, 10, &p))
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| 312 | return -EIO;
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| 313 |
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| 314 | if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
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| 315 | if (((unsigned)t->time.tm_sec) < 0x60)
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| 316 | t->time.tm_sec = bcd2bin(t->time.tm_sec);
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| 317 | else
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| 318 | t->time.tm_sec = -1;
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| 319 | if (((unsigned)t->time.tm_min) < 0x60)
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| 320 | t->time.tm_min = bcd2bin(t->time.tm_min);
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| 321 | else
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| 322 | t->time.tm_min = -1;
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| 323 | if (((unsigned)t->time.tm_hour) < 0x24)
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| 324 | t->time.tm_hour = bcd2bin(t->time.tm_hour);
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| 325 | else
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| 326 | t->time.tm_hour = -1;
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| 327 |
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| 328 | if (cmos->day_alrm) {
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| 329 | if (((unsigned)t->time.tm_mday) <= 0x31)
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| 330 | t->time.tm_mday = bcd2bin(t->time.tm_mday);
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| 331 | else
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| 332 | t->time.tm_mday = -1;
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| 333 |
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| 334 | if (cmos->mon_alrm) {
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| 335 | if (((unsigned)t->time.tm_mon) <= 0x12)
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| 336 | t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
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| 337 | else
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| 338 | t->time.tm_mon = -1;
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| 339 | }
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| 340 | }
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| 341 | }
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| 342 |
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| 343 | t->enabled = !!(p.rtc_control & RTC_AIE);
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| 344 | t->pending = 0;
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| 345 |
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| 346 | return 0;
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| 347 | }
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| 348 |
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| 349 | static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
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| 350 | {
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| 351 | unsigned char rtc_intr;
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| 352 |
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| 353 | |
| 354 | * allegedly some older rtcs need that to handle irqs properly
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| 355 |
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| 356 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
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| 357 |
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| 358 | if (use_hpet_alarm())
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| 359 | return;
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| 360 |
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| 361 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
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| 362 | if (is_intr(rtc_intr))
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| 363 | rtc_update_irq(cmos->rtc, 1, rtc_intr);
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| 364 | }
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| 365 |
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| 366 | static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
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| 367 | {
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| 368 | unsigned char rtc_control;
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| 369 |
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| 370 | |
| 371 | * before we enable new IRQs
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| 372 |
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| 373 | rtc_control = CMOS_READ(RTC_CONTROL);
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| 374 | cmos_checkintr(cmos, rtc_control);
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| 375 |
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| 376 | rtc_control |= mask;
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| 377 | CMOS_WRITE(rtc_control, RTC_CONTROL);
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| 378 | if (use_hpet_alarm())
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| 379 | hpet_set_rtc_irq_bit(mask);
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| 380 |
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| 381 | if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
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| 382 | if (cmos->wake_on)
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| 383 | cmos->wake_on(cmos->dev);
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| 384 | }
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| 385 |
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| 386 | cmos_checkintr(cmos, rtc_control);
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| 387 | }
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| 388 |
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| 389 | static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
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| 390 | {
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| 391 | unsigned char rtc_control;
|
| 392 |
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| 393 | rtc_control = CMOS_READ(RTC_CONTROL);
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| 394 | rtc_control &= ~mask;
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| 395 | CMOS_WRITE(rtc_control, RTC_CONTROL);
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| 396 | if (use_hpet_alarm())
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| 397 | hpet_mask_rtc_irq_bit(mask);
|
| 398 |
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| 399 | if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
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| 400 | if (cmos->wake_off)
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| 401 | cmos->wake_off(cmos->dev);
|
| 402 | }
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| 403 |
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| 404 | cmos_checkintr(cmos, rtc_control);
|
| 405 | }
|
| 406 |
|
| 407 | static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
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| 408 | {
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| 409 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
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| 410 | struct rtc_time now;
|
| 411 |
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| 412 | cmos_read_time(dev, &now);
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| 413 |
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| 414 | if (!cmos->day_alrm) {
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| 415 | time64_t t_max_date;
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| 416 | time64_t t_alrm;
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| 417 |
|
| 418 | t_max_date = rtc_tm_to_time64(&now);
|
| 419 | t_max_date += 24 * 60 * 60 - 1;
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| 420 | t_alrm = rtc_tm_to_time64(&t->time);
|
| 421 | if (t_alrm > t_max_date) {
|
| 422 | dev_err(dev,
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| 423 | "Alarms can be up to one day in the future\n");
|
| 424 | return -EINVAL;
|
| 425 | }
|
| 426 | } else if (!cmos->mon_alrm) {
|
| 427 | struct rtc_time max_date = now;
|
| 428 | time64_t t_max_date;
|
| 429 | time64_t t_alrm;
|
| 430 | int max_mday;
|
| 431 |
|
| 432 | if (max_date.tm_mon == 11) {
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| 433 | max_date.tm_mon = 0;
|
| 434 | max_date.tm_year += 1;
|
| 435 | } else {
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| 436 | max_date.tm_mon += 1;
|
| 437 | }
|
| 438 | max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
|
| 439 | if (max_date.tm_mday > max_mday)
|
| 440 | max_date.tm_mday = max_mday;
|
| 441 |
|
| 442 | t_max_date = rtc_tm_to_time64(&max_date);
|
| 443 | t_max_date -= 1;
|
| 444 | t_alrm = rtc_tm_to_time64(&t->time);
|
| 445 | if (t_alrm > t_max_date) {
|
| 446 | dev_err(dev,
|
| 447 | "Alarms can be up to one month in the future\n");
|
| 448 | return -EINVAL;
|
| 449 | }
|
| 450 | } else {
|
| 451 | struct rtc_time max_date = now;
|
| 452 | time64_t t_max_date;
|
| 453 | time64_t t_alrm;
|
| 454 | int max_mday;
|
| 455 |
|
| 456 | max_date.tm_year += 1;
|
| 457 | max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
|
| 458 | if (max_date.tm_mday > max_mday)
|
| 459 | max_date.tm_mday = max_mday;
|
| 460 |
|
| 461 | t_max_date = rtc_tm_to_time64(&max_date);
|
| 462 | t_max_date -= 1;
|
| 463 | t_alrm = rtc_tm_to_time64(&t->time);
|
| 464 | if (t_alrm > t_max_date) {
|
| 465 | dev_err(dev,
|
| 466 | "Alarms can be up to one year in the future\n");
|
| 467 | return -EINVAL;
|
| 468 | }
|
| 469 | }
|
| 470 |
|
| 471 | return 0;
|
| 472 | }
|
| 473 |
|
| 474 | struct cmos_set_alarm_callback_param {
|
| 475 | struct cmos_rtc *cmos;
|
| 476 | unsigned char mon, mday, hrs, min, sec;
|
| 477 | struct rtc_wkalrm *t;
|
| 478 | };
|
| 479 |
|
| 480 | |
| 481 | * once
|
| 482 |
|
| 483 | static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
|
| 484 | void *param_in)
|
| 485 | {
|
| 486 | struct cmos_set_alarm_callback_param *p =
|
| 487 | (struct cmos_set_alarm_callback_param *)param_in;
|
| 488 |
|
| 489 |
|
| 490 | cmos_irq_disable(p->cmos, RTC_AIE);
|
| 491 |
|
| 492 |
|
| 493 | CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
|
| 494 | CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
|
| 495 | CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
|
| 496 |
|
| 497 |
|
| 498 | if (p->cmos->day_alrm) {
|
| 499 | CMOS_WRITE(p->mday, p->cmos->day_alrm);
|
| 500 | if (p->cmos->mon_alrm)
|
| 501 | CMOS_WRITE(p->mon, p->cmos->mon_alrm);
|
| 502 | }
|
| 503 |
|
| 504 | if (use_hpet_alarm()) {
|
| 505 | |
| 506 | * FIXME the HPET alarm glue currently ignores day_alrm
|
| 507 | * and mon_alrm ...
|
| 508 |
|
| 509 | hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min,
|
| 510 | p->t->time.tm_sec);
|
| 511 | }
|
| 512 |
|
| 513 | if (p->t->enabled)
|
| 514 | cmos_irq_enable(p->cmos, RTC_AIE);
|
| 515 | }
|
| 516 |
|
| 517 | static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
| 518 | {
|
| 519 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 520 | struct cmos_set_alarm_callback_param p = {
|
| 521 | .cmos = cmos,
|
| 522 | .t = t
|
| 523 | };
|
| 524 | unsigned char rtc_control;
|
| 525 | int ret;
|
| 526 |
|
| 527 |
|
| 528 | if (cmos_no_alarm(cmos))
|
| 529 | return -EIO;
|
| 530 |
|
| 531 | ret = cmos_validate_alarm(dev, t);
|
| 532 | if (ret < 0)
|
| 533 | return ret;
|
| 534 |
|
| 535 | p.mon = t->time.tm_mon + 1;
|
| 536 | p.mday = t->time.tm_mday;
|
| 537 | p.hrs = t->time.tm_hour;
|
| 538 | p.min = t->time.tm_min;
|
| 539 | p.sec = t->time.tm_sec;
|
| 540 |
|
| 541 | spin_lock_irq(&rtc_lock);
|
| 542 | rtc_control = CMOS_READ(RTC_CONTROL);
|
| 543 | spin_unlock_irq(&rtc_lock);
|
| 544 |
|
| 545 | if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
|
| 546 |
|
| 547 | p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
|
| 548 | p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
|
| 549 | p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
|
| 550 | p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
|
| 551 | p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
|
| 552 | }
|
| 553 |
|
| 554 | |
| 555 | * Some Intel chipsets disconnect the alarm registers when the clock
|
| 556 | * update is in progress - during this time writes fail silently.
|
| 557 | *
|
| 558 | * Use mc146818_avoid_UIP() to avoid this.
|
| 559 |
|
| 560 | if (!mc146818_avoid_UIP(cmos_set_alarm_callback, 10, &p))
|
| 561 | return -ETIMEDOUT;
|
| 562 |
|
| 563 | cmos->alarm_expires = rtc_tm_to_time64(&t->time);
|
| 564 |
|
| 565 | return 0;
|
| 566 | }
|
| 567 |
|
| 568 | static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
|
| 569 | {
|
| 570 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 571 | unsigned long flags;
|
| 572 |
|
| 573 | spin_lock_irqsave(&rtc_lock, flags);
|
| 574 |
|
| 575 | if (enabled)
|
| 576 | cmos_irq_enable(cmos, RTC_AIE);
|
| 577 | else
|
| 578 | cmos_irq_disable(cmos, RTC_AIE);
|
| 579 |
|
| 580 | spin_unlock_irqrestore(&rtc_lock, flags);
|
| 581 | return 0;
|
| 582 | }
|
| 583 |
|
| 584 | #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
|
| 585 |
|
| 586 | static int cmos_procfs(struct device *dev, struct seq_file *seq)
|
| 587 | {
|
| 588 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 589 | unsigned char rtc_control, valid;
|
| 590 |
|
| 591 | spin_lock_irq(&rtc_lock);
|
| 592 | rtc_control = CMOS_READ(RTC_CONTROL);
|
| 593 | valid = CMOS_READ(RTC_VALID);
|
| 594 | spin_unlock_irq(&rtc_lock);
|
| 595 |
|
| 596 | |
| 597 | * (non-RTC) bit; and SQWE is ignored on many current systems.
|
| 598 |
|
| 599 | seq_printf(seq,
|
| 600 | "periodic_IRQ\t: %s\n"
|
| 601 | "update_IRQ\t: %s\n"
|
| 602 | "HPET_emulated\t: %s\n"
|
| 603 | |
| 604 | "BCD\t\t: %s\n"
|
| 605 | "DST_enable\t: %s\n"
|
| 606 | "periodic_freq\t: %d\n"
|
| 607 | "batt_status\t: %s\n",
|
| 608 | (rtc_control & RTC_PIE) ? "yes" : "no",
|
| 609 | (rtc_control & RTC_UIE) ? "yes" : "no",
|
| 610 | use_hpet_alarm() ? "yes" : "no",
|
| 611 | |
| 612 | (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
|
| 613 | (rtc_control & RTC_DST_EN) ? "yes" : "no",
|
| 614 | cmos->rtc->irq_freq,
|
| 615 | (valid & RTC_VRT) ? "okay" : "dead");
|
| 616 |
|
| 617 | return 0;
|
| 618 | }
|
| 619 |
|
| 620 | #else
|
| 621 | #define cmos_procfs NULL
|
| 622 | #endif
|
| 623 |
|
| 624 | static const struct rtc_class_ops cmos_rtc_ops = {
|
| 625 | .read_time = cmos_read_time,
|
| 626 | .set_time = cmos_set_time,
|
| 627 | .read_alarm = cmos_read_alarm,
|
| 628 | .set_alarm = cmos_set_alarm,
|
| 629 | .proc = cmos_procfs,
|
| 630 | .alarm_irq_enable = cmos_alarm_irq_enable,
|
| 631 | };
|
| 632 |
|
| 633 |
|
| 634 |
|
| 635 | |
| 636 | * All these chips have at least 64 bytes of address space, shared by
|
| 637 | * RTC registers and NVRAM. Most of those bytes of NVRAM are used
|
| 638 | * by boot firmware. Modern chips have 128 or 256 bytes.
|
| 639 |
|
| 640 |
|
| 641 | #define NVRAM_OFFSET (RTC_REG_D + 1)
|
| 642 |
|
| 643 | static int cmos_nvram_read(void *priv, unsigned int off, void *val,
|
| 644 | size_t count)
|
| 645 | {
|
| 646 | unsigned char *buf = val;
|
| 647 |
|
| 648 | off += NVRAM_OFFSET;
|
| 649 | for (; count; count--, off++, buf++) {
|
| 650 | guard(spinlock_irq)(&rtc_lock);
|
| 651 | if (off < 128)
|
| 652 | *buf = CMOS_READ(off);
|
| 653 | else if (can_bank2)
|
| 654 | *buf = cmos_read_bank2(off);
|
| 655 | else
|
| 656 | return -EIO;
|
| 657 | }
|
| 658 |
|
| 659 | return 0;
|
| 660 | }
|
| 661 |
|
| 662 | static int cmos_nvram_write(void *priv, unsigned int off, void *val,
|
| 663 | size_t count)
|
| 664 | {
|
| 665 | struct cmos_rtc *cmos = priv;
|
| 666 | unsigned char *buf = val;
|
| 667 |
|
| 668 | |
| 669 | * checksum on part of the NVRAM data. That's currently ignored
|
| 670 | * here. If userspace is smart enough to know what fields of
|
| 671 | * NVRAM to update, updating checksums is also part of its job.
|
| 672 |
|
| 673 | off += NVRAM_OFFSET;
|
| 674 | for (; count; count--, off++, buf++) {
|
| 675 |
|
| 676 | if (off == cmos->day_alrm
|
| 677 | || off == cmos->mon_alrm
|
| 678 | || off == cmos->century)
|
| 679 | continue;
|
| 680 |
|
| 681 | guard(spinlock_irq)(&rtc_lock);
|
| 682 | if (off < 128)
|
| 683 | CMOS_WRITE(*buf, off);
|
| 684 | else if (can_bank2)
|
| 685 | cmos_write_bank2(*buf, off);
|
| 686 | else
|
| 687 | return -EIO;
|
| 688 | }
|
| 689 |
|
| 690 | return 0;
|
| 691 | }
|
| 692 |
|
| 693 |
|
| 694 |
|
| 695 | static struct cmos_rtc cmos_rtc;
|
| 696 |
|
| 697 | static irqreturn_t cmos_interrupt(int irq, void *p)
|
| 698 | {
|
| 699 | u8 irqstat;
|
| 700 | u8 rtc_control;
|
| 701 | unsigned long flags;
|
| 702 |
|
| 703 | |
| 704 | * in a non-irq context.
|
| 705 |
|
| 706 | spin_lock_irqsave(&rtc_lock, flags);
|
| 707 |
|
| 708 | |
| 709 | * status is passed as arg1 instead of the irq number. But
|
| 710 | * always clear irq status, even when HPET is in the way.
|
| 711 | *
|
| 712 | * Note that HPET and RTC are almost certainly out of phase,
|
| 713 | * giving different IRQ status ...
|
| 714 |
|
| 715 | irqstat = CMOS_READ(RTC_INTR_FLAGS);
|
| 716 | rtc_control = CMOS_READ(RTC_CONTROL);
|
| 717 | if (use_hpet_alarm())
|
| 718 | irqstat = (unsigned long)irq & 0xF0;
|
| 719 |
|
| 720 | |
| 721 | * bios may have cleared it.
|
| 722 |
|
| 723 | if (!cmos_rtc.suspend_ctrl)
|
| 724 | irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
|
| 725 | else
|
| 726 | irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
|
| 727 |
|
| 728 | |
| 729 | * Similar code may be needed in system wakeup paths, in case the
|
| 730 | * alarm woke the system.
|
| 731 |
|
| 732 | if (irqstat & RTC_AIE) {
|
| 733 | cmos_rtc.suspend_ctrl &= ~RTC_AIE;
|
| 734 | rtc_control &= ~RTC_AIE;
|
| 735 | CMOS_WRITE(rtc_control, RTC_CONTROL);
|
| 736 | if (use_hpet_alarm())
|
| 737 | hpet_mask_rtc_irq_bit(RTC_AIE);
|
| 738 | CMOS_READ(RTC_INTR_FLAGS);
|
| 739 | }
|
| 740 | spin_unlock_irqrestore(&rtc_lock, flags);
|
| 741 |
|
| 742 | if (is_intr(irqstat)) {
|
| 743 | rtc_update_irq(p, 1, irqstat);
|
| 744 | return IRQ_HANDLED;
|
| 745 | } else
|
| 746 | return IRQ_NONE;
|
| 747 | }
|
| 748 |
|
| 749 | #ifdef CONFIG_ACPI
|
| 750 |
|
| 751 | #include <linux/acpi.h>
|
| 752 |
|
| 753 | static u32 rtc_handler(void *context)
|
| 754 | {
|
| 755 | struct device *dev = context;
|
| 756 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 757 | unsigned char rtc_control = 0;
|
| 758 | unsigned char rtc_intr;
|
| 759 | unsigned long flags;
|
| 760 |
|
| 761 |
|
| 762 | |
| 763 | * Always update rtc irq when ACPI is used as RTC Alarm.
|
| 764 | * Or else, ACPI SCI is enabled during suspend/resume only,
|
| 765 | * update rtc irq in that case.
|
| 766 |
|
| 767 | if (cmos_use_acpi_alarm())
|
| 768 | cmos_interrupt(0, (void *)cmos->rtc);
|
| 769 | else {
|
| 770 |
|
| 771 | spin_lock_irqsave(&rtc_lock, flags);
|
| 772 | if (cmos_rtc.suspend_ctrl)
|
| 773 | rtc_control = CMOS_READ(RTC_CONTROL);
|
| 774 | if (rtc_control & RTC_AIE) {
|
| 775 | cmos_rtc.suspend_ctrl &= ~RTC_AIE;
|
| 776 | CMOS_WRITE(rtc_control, RTC_CONTROL);
|
| 777 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
|
| 778 | rtc_update_irq(cmos->rtc, 1, rtc_intr);
|
| 779 | }
|
| 780 | spin_unlock_irqrestore(&rtc_lock, flags);
|
| 781 | }
|
| 782 |
|
| 783 | pm_wakeup_hard_event(dev);
|
| 784 | acpi_clear_event(ACPI_EVENT_RTC);
|
| 785 | acpi_disable_event(ACPI_EVENT_RTC, 0);
|
| 786 | return ACPI_INTERRUPT_HANDLED;
|
| 787 | }
|
| 788 |
|
| 789 | static void acpi_rtc_event_setup(struct device *dev)
|
| 790 | {
|
| 791 | if (acpi_disabled)
|
| 792 | return;
|
| 793 |
|
| 794 | acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
|
| 795 | |
| 796 | * After the RTC handler is installed, the Fixed_RTC event should
|
| 797 | * be disabled. Only when the RTC alarm is set will it be enabled.
|
| 798 |
|
| 799 | acpi_clear_event(ACPI_EVENT_RTC);
|
| 800 | acpi_disable_event(ACPI_EVENT_RTC, 0);
|
| 801 | }
|
| 802 |
|
| 803 | static void acpi_rtc_event_cleanup(void)
|
| 804 | {
|
| 805 | if (acpi_disabled)
|
| 806 | return;
|
| 807 |
|
| 808 | acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler);
|
| 809 | }
|
| 810 |
|
| 811 | static void rtc_wake_on(struct device *dev)
|
| 812 | {
|
| 813 | acpi_clear_event(ACPI_EVENT_RTC);
|
| 814 | acpi_enable_event(ACPI_EVENT_RTC, 0);
|
| 815 | }
|
| 816 |
|
| 817 | static void rtc_wake_off(struct device *dev)
|
| 818 | {
|
| 819 | acpi_disable_event(ACPI_EVENT_RTC, 0);
|
| 820 | }
|
| 821 |
|
| 822 | #ifdef CONFIG_X86
|
| 823 | static void use_acpi_alarm_quirks(void)
|
| 824 | {
|
| 825 | if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
|
| 826 | return;
|
| 827 |
|
| 828 | switch (boot_cpu_data.x86_vendor) {
|
| 829 | case X86_VENDOR_INTEL:
|
| 830 | if (dmi_get_bios_year() < 2015)
|
| 831 | return;
|
| 832 | break;
|
| 833 | case X86_VENDOR_AMD:
|
| 834 | case X86_VENDOR_HYGON:
|
| 835 | if (dmi_get_bios_year() < 2021)
|
| 836 | return;
|
| 837 | break;
|
| 838 | default:
|
| 839 | return;
|
| 840 | }
|
| 841 |
|
| 842 | use_acpi_alarm = true;
|
| 843 | }
|
| 844 | #else
|
| 845 | static inline void use_acpi_alarm_quirks(void) { }
|
| 846 | #endif
|
| 847 |
|
| 848 | static void acpi_cmos_wake_setup(struct device *dev)
|
| 849 | {
|
| 850 | if (acpi_disabled)
|
| 851 | return;
|
| 852 |
|
| 853 | use_acpi_alarm_quirks();
|
| 854 |
|
| 855 | cmos_rtc.wake_on = rtc_wake_on;
|
| 856 | cmos_rtc.wake_off = rtc_wake_off;
|
| 857 |
|
| 858 |
|
| 859 | if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
|
| 860 | dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
|
| 861 | acpi_gbl_FADT.month_alarm);
|
| 862 | acpi_gbl_FADT.month_alarm = 0;
|
| 863 | }
|
| 864 |
|
| 865 | cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
|
| 866 | cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
|
| 867 | cmos_rtc.century = acpi_gbl_FADT.century;
|
| 868 |
|
| 869 | if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
|
| 870 | dev_info(dev, "RTC can wake from S4\n");
|
| 871 |
|
| 872 |
|
| 873 | device_init_wakeup(dev, true);
|
| 874 | }
|
| 875 |
|
| 876 | static void cmos_check_acpi_rtc_status(struct device *dev,
|
| 877 | unsigned char *rtc_control)
|
| 878 | {
|
| 879 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 880 | acpi_event_status rtc_status;
|
| 881 | acpi_status status;
|
| 882 |
|
| 883 | if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
|
| 884 | return;
|
| 885 |
|
| 886 | status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
|
| 887 | if (ACPI_FAILURE(status)) {
|
| 888 | dev_err(dev, "Could not get RTC status\n");
|
| 889 | } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
|
| 890 | unsigned char mask;
|
| 891 | *rtc_control &= ~RTC_AIE;
|
| 892 | CMOS_WRITE(*rtc_control, RTC_CONTROL);
|
| 893 | mask = CMOS_READ(RTC_INTR_FLAGS);
|
| 894 | rtc_update_irq(cmos->rtc, 1, mask);
|
| 895 | }
|
| 896 | }
|
| 897 |
|
| 898 | #else
|
| 899 |
|
| 900 | static inline void acpi_rtc_event_setup(struct device *dev)
|
| 901 | {
|
| 902 | }
|
| 903 |
|
| 904 | static inline void acpi_rtc_event_cleanup(void)
|
| 905 | {
|
| 906 | }
|
| 907 |
|
| 908 | static inline void acpi_cmos_wake_setup(struct device *dev)
|
| 909 | {
|
| 910 | }
|
| 911 |
|
| 912 | static inline void cmos_check_acpi_rtc_status(struct device *dev,
|
| 913 | unsigned char *rtc_control)
|
| 914 | {
|
| 915 | }
|
| 916 | #endif
|
| 917 |
|
| 918 | #ifdef CONFIG_PNP
|
| 919 | #define INITSECTION
|
| 920 |
|
| 921 | #else
|
| 922 | #define INITSECTION __init
|
| 923 | #endif
|
| 924 |
|
| 925 | #define SECS_PER_DAY (24 * 60 * 60)
|
| 926 | #define SECS_PER_MONTH (28 * SECS_PER_DAY)
|
| 927 | #define SECS_PER_YEAR (365 * SECS_PER_DAY)
|
| 928 |
|
| 929 | static int INITSECTION
|
| 930 | cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
|
| 931 | {
|
| 932 | struct cmos_rtc_board_info *info = dev_get_platdata(dev);
|
| 933 | int retval = 0;
|
| 934 | unsigned char rtc_control;
|
| 935 | unsigned address_space;
|
| 936 | u32 flags = 0;
|
| 937 | bool hpet_registered = false;
|
| 938 | struct nvmem_config nvmem_cfg = {
|
| 939 | .name = "cmos_nvram",
|
| 940 | .word_size = 1,
|
| 941 | .stride = 1,
|
| 942 | .reg_read = cmos_nvram_read,
|
| 943 | .reg_write = cmos_nvram_write,
|
| 944 | .priv = &cmos_rtc,
|
| 945 | };
|
| 946 |
|
| 947 |
|
| 948 | if (cmos_rtc.dev)
|
| 949 | return -EBUSY;
|
| 950 |
|
| 951 | if (!ports)
|
| 952 | return -ENODEV;
|
| 953 |
|
| 954 | |
| 955 | *
|
| 956 | * REVISIT non-x86 systems may instead use memory space resources
|
| 957 | * (needing ioremap etc), not i/o space resources like this ...
|
| 958 |
|
| 959 | if (RTC_IOMAPPED)
|
| 960 | ports = request_region(ports->start, resource_size(ports),
|
| 961 | driver_name);
|
| 962 | else
|
| 963 | ports = request_mem_region(ports->start, resource_size(ports),
|
| 964 | driver_name);
|
| 965 | if (!ports) {
|
| 966 | dev_dbg(dev, "i/o registers already in use\n");
|
| 967 | return -EBUSY;
|
| 968 | }
|
| 969 |
|
| 970 | cmos_rtc.irq = rtc_irq;
|
| 971 | cmos_rtc.iomem = ports;
|
| 972 |
|
| 973 | |
| 974 | * driver did, but don't reject unknown configs. Old hardware
|
| 975 | * won't address 128 bytes. Newer chips have multiple banks,
|
| 976 | * though they may not be listed in one I/O resource.
|
| 977 |
|
| 978 | #if defined(CONFIG_ATARI)
|
| 979 | address_space = 64;
|
| 980 | #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
|
| 981 | || defined(__sparc__) || defined(__mips__) \
|
| 982 | || defined(__powerpc__)
|
| 983 | address_space = 128;
|
| 984 | #else
|
| 985 | #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
|
| 986 | address_space = 128;
|
| 987 | #endif
|
| 988 | if (can_bank2 && ports->end > (ports->start + 1))
|
| 989 | address_space = 256;
|
| 990 |
|
| 991 | |
| 992 | * board specific setup provides it as appropriate. Systems where
|
| 993 | * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
|
| 994 | * some almost-clones) can provide hooks to make that behave.
|
| 995 | *
|
| 996 | * Note that ACPI doesn't preclude putting these registers into
|
| 997 | * "extended" areas of the chip, including some that we won't yet
|
| 998 | * expect CMOS_READ and friends to handle.
|
| 999 |
|
| 1000 | if (info) {
|
| 1001 | if (info->flags)
|
| 1002 | flags = info->flags;
|
| 1003 | if (info->address_space)
|
| 1004 | address_space = info->address_space;
|
| 1005 |
|
| 1006 | cmos_rtc.day_alrm = info->rtc_day_alarm;
|
| 1007 | cmos_rtc.mon_alrm = info->rtc_mon_alarm;
|
| 1008 | cmos_rtc.century = info->rtc_century;
|
| 1009 |
|
| 1010 | if (info->wake_on && info->wake_off) {
|
| 1011 | cmos_rtc.wake_on = info->wake_on;
|
| 1012 | cmos_rtc.wake_off = info->wake_off;
|
| 1013 | }
|
| 1014 | } else {
|
| 1015 | acpi_cmos_wake_setup(dev);
|
| 1016 | }
|
| 1017 |
|
| 1018 | if (cmos_rtc.day_alrm >= 128)
|
| 1019 | cmos_rtc.day_alrm = 0;
|
| 1020 |
|
| 1021 | if (cmos_rtc.mon_alrm >= 128)
|
| 1022 | cmos_rtc.mon_alrm = 0;
|
| 1023 |
|
| 1024 | if (cmos_rtc.century >= 128)
|
| 1025 | cmos_rtc.century = 0;
|
| 1026 |
|
| 1027 | cmos_rtc.dev = dev;
|
| 1028 | dev_set_drvdata(dev, &cmos_rtc);
|
| 1029 |
|
| 1030 | cmos_rtc.rtc = devm_rtc_allocate_device(dev);
|
| 1031 | if (IS_ERR(cmos_rtc.rtc)) {
|
| 1032 | retval = PTR_ERR(cmos_rtc.rtc);
|
| 1033 | goto cleanup0;
|
| 1034 | }
|
| 1035 |
|
| 1036 | if (cmos_rtc.mon_alrm)
|
| 1037 | cmos_rtc.rtc->alarm_offset_max = SECS_PER_YEAR - 1;
|
| 1038 | else if (cmos_rtc.day_alrm)
|
| 1039 | cmos_rtc.rtc->alarm_offset_max = SECS_PER_MONTH - 1;
|
| 1040 | else
|
| 1041 | cmos_rtc.rtc->alarm_offset_max = SECS_PER_DAY - 1;
|
| 1042 |
|
| 1043 | rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
|
| 1044 |
|
| 1045 | if (!mc146818_does_rtc_work()) {
|
| 1046 | dev_warn(dev, "broken or not accessible\n");
|
| 1047 | retval = -ENXIO;
|
| 1048 | goto cleanup1;
|
| 1049 | }
|
| 1050 |
|
| 1051 | spin_lock_irq(&rtc_lock);
|
| 1052 |
|
| 1053 | if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
|
| 1054 | |
| 1055 | *
|
| 1056 | * REVISIT it's been reported that at least one x86_64 ALI
|
| 1057 | * mobo doesn't use 32KHz here ... for portability we might
|
| 1058 | * need to do something about other clock frequencies.
|
| 1059 |
|
| 1060 | cmos_rtc.rtc->irq_freq = 1024;
|
| 1061 | if (use_hpet_alarm())
|
| 1062 | hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
|
| 1063 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
|
| 1064 | }
|
| 1065 |
|
| 1066 |
|
| 1067 | if (is_valid_irq(rtc_irq))
|
| 1068 | cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
|
| 1069 |
|
| 1070 | rtc_control = CMOS_READ(RTC_CONTROL);
|
| 1071 |
|
| 1072 | spin_unlock_irq(&rtc_lock);
|
| 1073 |
|
| 1074 | if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
|
| 1075 | dev_warn(dev, "only 24-hr supported\n");
|
| 1076 | retval = -ENXIO;
|
| 1077 | goto cleanup1;
|
| 1078 | }
|
| 1079 |
|
| 1080 | if (use_hpet_alarm())
|
| 1081 | hpet_rtc_timer_init();
|
| 1082 |
|
| 1083 | if (is_valid_irq(rtc_irq)) {
|
| 1084 | irq_handler_t rtc_cmos_int_handler;
|
| 1085 |
|
| 1086 | if (use_hpet_alarm()) {
|
| 1087 | rtc_cmos_int_handler = hpet_rtc_interrupt;
|
| 1088 | retval = hpet_register_irq_handler(cmos_interrupt);
|
| 1089 | if (retval) {
|
| 1090 | hpet_mask_rtc_irq_bit(RTC_IRQMASK);
|
| 1091 | dev_warn(dev, "hpet_register_irq_handler "
|
| 1092 | " failed in rtc_init().");
|
| 1093 | goto cleanup1;
|
| 1094 | }
|
| 1095 | hpet_registered = true;
|
| 1096 | } else
|
| 1097 | rtc_cmos_int_handler = cmos_interrupt;
|
| 1098 |
|
| 1099 | retval = request_irq(rtc_irq, rtc_cmos_int_handler,
|
| 1100 | 0, dev_name(&cmos_rtc.rtc->dev),
|
| 1101 | cmos_rtc.rtc);
|
| 1102 | if (retval < 0) {
|
| 1103 | dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
|
| 1104 | goto cleanup1;
|
| 1105 | }
|
| 1106 | } else if (!cmos_use_acpi_alarm()) {
|
| 1107 | clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
|
| 1108 | }
|
| 1109 |
|
| 1110 | cmos_rtc.rtc->ops = &cmos_rtc_ops;
|
| 1111 |
|
| 1112 | retval = devm_rtc_register_device(cmos_rtc.rtc);
|
| 1113 | if (retval)
|
| 1114 | goto cleanup2;
|
| 1115 |
|
| 1116 |
|
| 1117 | cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
|
| 1118 |
|
| 1119 |
|
| 1120 | nvmem_cfg.size = address_space - NVRAM_OFFSET;
|
| 1121 | devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
|
| 1122 |
|
| 1123 | |
| 1124 | * Everything has gone well so far, so by default register a handler for
|
| 1125 | * the ACPI RTC fixed event.
|
| 1126 |
|
| 1127 | if (!info)
|
| 1128 | acpi_rtc_event_setup(dev);
|
| 1129 |
|
| 1130 | dev_info(dev, "%s%s, %d bytes nvram%s\n",
|
| 1131 | cmos_no_alarm(&cmos_rtc) ? "no alarms" :
|
| 1132 | cmos_rtc.mon_alrm ? "alarms up to one year" :
|
| 1133 | cmos_rtc.day_alrm ? "alarms up to one month" :
|
| 1134 | "alarms up to one day",
|
| 1135 | cmos_rtc.century ? ", y3k" : "",
|
| 1136 | nvmem_cfg.size,
|
| 1137 | use_hpet_alarm() ? ", hpet irqs" : "");
|
| 1138 |
|
| 1139 | return 0;
|
| 1140 |
|
| 1141 | cleanup2:
|
| 1142 | if (is_valid_irq(rtc_irq))
|
| 1143 | free_irq(rtc_irq, cmos_rtc.rtc);
|
| 1144 | cleanup1:
|
| 1145 | if (hpet_registered) {
|
| 1146 | hpet_mask_rtc_irq_bit(RTC_IRQMASK);
|
| 1147 | hpet_unregister_irq_handler(cmos_interrupt);
|
| 1148 | }
|
| 1149 | cmos_rtc.dev = NULL;
|
| 1150 | cleanup0:
|
| 1151 | if (RTC_IOMAPPED)
|
| 1152 | release_region(ports->start, resource_size(ports));
|
| 1153 | else
|
| 1154 | release_mem_region(ports->start, resource_size(ports));
|
| 1155 | return retval;
|
| 1156 | }
|
| 1157 |
|
| 1158 | static void cmos_do_shutdown(int rtc_irq)
|
| 1159 | {
|
| 1160 | spin_lock_irq(&rtc_lock);
|
| 1161 | if (!cmos_no_alarm(&cmos_rtc))
|
| 1162 | cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
|
| 1163 | spin_unlock_irq(&rtc_lock);
|
| 1164 | }
|
| 1165 |
|
| 1166 | static void cmos_do_remove(struct device *dev)
|
| 1167 | {
|
| 1168 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 1169 | struct resource *ports;
|
| 1170 |
|
| 1171 | cmos_do_shutdown(cmos->irq);
|
| 1172 |
|
| 1173 | if (is_valid_irq(cmos->irq)) {
|
| 1174 | free_irq(cmos->irq, cmos->rtc);
|
| 1175 | if (use_hpet_alarm())
|
| 1176 | hpet_unregister_irq_handler(cmos_interrupt);
|
| 1177 | }
|
| 1178 |
|
| 1179 | if (!dev_get_platdata(dev))
|
| 1180 | acpi_rtc_event_cleanup();
|
| 1181 |
|
| 1182 | cmos->rtc = NULL;
|
| 1183 |
|
| 1184 | ports = cmos->iomem;
|
| 1185 | if (RTC_IOMAPPED)
|
| 1186 | release_region(ports->start, resource_size(ports));
|
| 1187 | else
|
| 1188 | release_mem_region(ports->start, resource_size(ports));
|
| 1189 | cmos->iomem = NULL;
|
| 1190 |
|
| 1191 | cmos->dev = NULL;
|
| 1192 | }
|
| 1193 |
|
| 1194 | static int cmos_aie_poweroff(struct device *dev)
|
| 1195 | {
|
| 1196 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 1197 | struct rtc_time now;
|
| 1198 | time64_t t_now;
|
| 1199 | int retval = 0;
|
| 1200 | unsigned char rtc_control;
|
| 1201 |
|
| 1202 | if (!cmos->alarm_expires)
|
| 1203 | return -EINVAL;
|
| 1204 |
|
| 1205 | spin_lock_irq(&rtc_lock);
|
| 1206 | rtc_control = CMOS_READ(RTC_CONTROL);
|
| 1207 | spin_unlock_irq(&rtc_lock);
|
| 1208 |
|
| 1209 |
|
| 1210 | if (rtc_control & RTC_AIE)
|
| 1211 | return -EBUSY;
|
| 1212 |
|
| 1213 | cmos_read_time(dev, &now);
|
| 1214 | t_now = rtc_tm_to_time64(&now);
|
| 1215 |
|
| 1216 | |
| 1217 | * When enabling "RTC wake-up" in BIOS setup, the machine reboots
|
| 1218 | * automatically right after shutdown on some buggy boxes.
|
| 1219 | * This automatic rebooting issue won't happen when the alarm
|
| 1220 | * time is larger than now+1 seconds.
|
| 1221 | *
|
| 1222 | * If the alarm time is equal to now+1 seconds, the issue can be
|
| 1223 | * prevented by cancelling the alarm.
|
| 1224 |
|
| 1225 | if (cmos->alarm_expires == t_now + 1) {
|
| 1226 | struct rtc_wkalrm alarm;
|
| 1227 |
|
| 1228 |
|
| 1229 | rtc_time64_to_tm(t_now - 1, &alarm.time);
|
| 1230 | alarm.enabled = 0;
|
| 1231 | retval = cmos_set_alarm(dev, &alarm);
|
| 1232 | } else if (cmos->alarm_expires > t_now + 1) {
|
| 1233 | retval = -EBUSY;
|
| 1234 | }
|
| 1235 |
|
| 1236 | return retval;
|
| 1237 | }
|
| 1238 |
|
| 1239 | static int cmos_suspend(struct device *dev)
|
| 1240 | {
|
| 1241 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 1242 | unsigned char tmp;
|
| 1243 |
|
| 1244 |
|
| 1245 | spin_lock_irq(&rtc_lock);
|
| 1246 | cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
|
| 1247 | if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
|
| 1248 | unsigned char mask;
|
| 1249 |
|
| 1250 | if (device_may_wakeup(dev))
|
| 1251 | mask = RTC_IRQMASK & ~RTC_AIE;
|
| 1252 | else
|
| 1253 | mask = RTC_IRQMASK;
|
| 1254 | tmp &= ~mask;
|
| 1255 | CMOS_WRITE(tmp, RTC_CONTROL);
|
| 1256 | if (use_hpet_alarm())
|
| 1257 | hpet_mask_rtc_irq_bit(mask);
|
| 1258 | cmos_checkintr(cmos, tmp);
|
| 1259 | }
|
| 1260 | spin_unlock_irq(&rtc_lock);
|
| 1261 |
|
| 1262 | if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
|
| 1263 | cmos->enabled_wake = 1;
|
| 1264 | if (cmos->wake_on)
|
| 1265 | cmos->wake_on(dev);
|
| 1266 | else
|
| 1267 | enable_irq_wake(cmos->irq);
|
| 1268 | }
|
| 1269 |
|
| 1270 | memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
|
| 1271 | cmos_read_alarm(dev, &cmos->saved_wkalrm);
|
| 1272 |
|
| 1273 | dev_dbg(dev, "suspend%s, ctrl %02x\n",
|
| 1274 | (tmp & RTC_AIE) ? ", alarm may wake" : "",
|
| 1275 | tmp);
|
| 1276 |
|
| 1277 | return 0;
|
| 1278 | }
|
| 1279 |
|
| 1280 | |
| 1281 | * after a detour through G3 "mechanical off", although the ACPI spec
|
| 1282 | * says wakeup should only work from G1/S4 "hibernate". To most users,
|
| 1283 | * distinctions between S4 and S5 are pointless. So when the hardware
|
| 1284 | * allows, don't draw that distinction.
|
| 1285 |
|
| 1286 | static inline int cmos_poweroff(struct device *dev)
|
| 1287 | {
|
| 1288 | if (!IS_ENABLED(CONFIG_PM))
|
| 1289 | return -ENOSYS;
|
| 1290 |
|
| 1291 | return cmos_suspend(dev);
|
| 1292 | }
|
| 1293 |
|
| 1294 | static void cmos_check_wkalrm(struct device *dev)
|
| 1295 | {
|
| 1296 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 1297 | struct rtc_wkalrm current_alarm;
|
| 1298 | time64_t t_now;
|
| 1299 | time64_t t_current_expires;
|
| 1300 | time64_t t_saved_expires;
|
| 1301 | struct rtc_time now;
|
| 1302 |
|
| 1303 |
|
| 1304 | if (!(cmos->suspend_ctrl & RTC_AIE))
|
| 1305 | return;
|
| 1306 |
|
| 1307 | cmos_read_time(dev, &now);
|
| 1308 | t_now = rtc_tm_to_time64(&now);
|
| 1309 |
|
| 1310 | |
| 1311 | * ACPI RTC wake event is cleared after resume from STR,
|
| 1312 | * ACK the rtc irq here
|
| 1313 |
|
| 1314 | if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
|
| 1315 | cmos_interrupt(0, (void *)cmos->rtc);
|
| 1316 | return;
|
| 1317 | }
|
| 1318 |
|
| 1319 | memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm));
|
| 1320 | cmos_read_alarm(dev, ¤t_alarm);
|
| 1321 | t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
|
| 1322 | t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
|
| 1323 | if (t_current_expires != t_saved_expires ||
|
| 1324 | cmos->saved_wkalrm.enabled != current_alarm.enabled) {
|
| 1325 | cmos_set_alarm(dev, &cmos->saved_wkalrm);
|
| 1326 | }
|
| 1327 | }
|
| 1328 |
|
| 1329 | static int __maybe_unused cmos_resume(struct device *dev)
|
| 1330 | {
|
| 1331 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 1332 | unsigned char tmp;
|
| 1333 |
|
| 1334 | if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
|
| 1335 | if (cmos->wake_off)
|
| 1336 | cmos->wake_off(dev);
|
| 1337 | else
|
| 1338 | disable_irq_wake(cmos->irq);
|
| 1339 | cmos->enabled_wake = 0;
|
| 1340 | }
|
| 1341 |
|
| 1342 |
|
| 1343 | cmos_check_wkalrm(dev);
|
| 1344 |
|
| 1345 | spin_lock_irq(&rtc_lock);
|
| 1346 | tmp = cmos->suspend_ctrl;
|
| 1347 | cmos->suspend_ctrl = 0;
|
| 1348 |
|
| 1349 | if (tmp & RTC_IRQMASK) {
|
| 1350 | unsigned char mask;
|
| 1351 |
|
| 1352 | if (device_may_wakeup(dev) && use_hpet_alarm())
|
| 1353 | hpet_rtc_timer_init();
|
| 1354 |
|
| 1355 | do {
|
| 1356 | CMOS_WRITE(tmp, RTC_CONTROL);
|
| 1357 | if (use_hpet_alarm())
|
| 1358 | hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
|
| 1359 |
|
| 1360 | mask = CMOS_READ(RTC_INTR_FLAGS);
|
| 1361 | mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
|
| 1362 | if (!use_hpet_alarm() || !is_intr(mask))
|
| 1363 | break;
|
| 1364 |
|
| 1365 | |
| 1366 | * the wake alarm's irq
|
| 1367 |
|
| 1368 | rtc_update_irq(cmos->rtc, 1, mask);
|
| 1369 | tmp &= ~RTC_AIE;
|
| 1370 | hpet_mask_rtc_irq_bit(RTC_AIE);
|
| 1371 | } while (mask & RTC_AIE);
|
| 1372 |
|
| 1373 | if (tmp & RTC_AIE)
|
| 1374 | cmos_check_acpi_rtc_status(dev, &tmp);
|
| 1375 | }
|
| 1376 | spin_unlock_irq(&rtc_lock);
|
| 1377 |
|
| 1378 | dev_dbg(dev, "resume, ctrl %02x\n", tmp);
|
| 1379 |
|
| 1380 | return 0;
|
| 1381 | }
|
| 1382 |
|
| 1383 | static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
|
| 1384 |
|
| 1385 | #ifdef CONFIG_OF
|
| 1386 | static const struct of_device_id of_cmos_match[] = {
|
| 1387 | {
|
| 1388 | .compatible = "motorola,mc146818",
|
| 1389 | },
|
| 1390 | { },
|
| 1391 | };
|
| 1392 | MODULE_DEVICE_TABLE(of, of_cmos_match);
|
| 1393 |
|
| 1394 | static __init void cmos_of_init(struct platform_device *pdev)
|
| 1395 | {
|
| 1396 | struct device_node *node = pdev->dev.of_node;
|
| 1397 | const __be32 *val;
|
| 1398 |
|
| 1399 | if (!node)
|
| 1400 | return;
|
| 1401 |
|
| 1402 | val = of_get_property(node, "ctrl-reg", NULL);
|
| 1403 | if (val)
|
| 1404 | CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
|
| 1405 |
|
| 1406 | val = of_get_property(node, "freq-reg", NULL);
|
| 1407 | if (val)
|
| 1408 | CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
|
| 1409 | }
|
| 1410 | #else
|
| 1411 | static inline void cmos_of_init(struct platform_device *pdev) {}
|
| 1412 | #endif
|
| 1413 |
|
| 1414 | #ifdef CONFIG_ACPI
|
| 1415 | static const struct acpi_device_id acpi_cmos_rtc_ids[] = {
|
| 1416 | ACPI_CMOS_RTC_IDS
|
| 1417 | };
|
| 1418 | MODULE_DEVICE_TABLE(acpi, acpi_cmos_rtc_ids);
|
| 1419 | #endif
|
| 1420 |
|
| 1421 |
|
| 1422 |
|
| 1423 | |
| 1424 | * unavailable ... this could happen even on (older) PCs.
|
| 1425 |
|
| 1426 |
|
| 1427 | static int __init cmos_platform_probe(struct platform_device *pdev)
|
| 1428 | {
|
| 1429 | struct resource *resource;
|
| 1430 | int irq;
|
| 1431 |
|
| 1432 | cmos_of_init(pdev);
|
| 1433 |
|
| 1434 | if (RTC_IOMAPPED)
|
| 1435 | resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
|
| 1436 | else
|
| 1437 | resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
| 1438 | irq = platform_get_irq_optional(pdev, 0);
|
| 1439 | if (irq < 0) {
|
| 1440 | irq = -1;
|
| 1441 | #ifdef CONFIG_X86
|
| 1442 | |
| 1443 | * On some x86 systems, the IRQ is not defined, but it should
|
| 1444 | * always be safe to hardcode it on systems with a legacy PIC.
|
| 1445 |
|
| 1446 | if (nr_legacy_irqs())
|
| 1447 | irq = RTC_IRQ;
|
| 1448 | #endif
|
| 1449 | }
|
| 1450 |
|
| 1451 | return cmos_do_probe(&pdev->dev, resource, irq);
|
| 1452 | }
|
| 1453 |
|
| 1454 | static void cmos_platform_remove(struct platform_device *pdev)
|
| 1455 | {
|
| 1456 | cmos_do_remove(&pdev->dev);
|
| 1457 | }
|
| 1458 |
|
| 1459 | static void cmos_platform_shutdown(struct platform_device *pdev)
|
| 1460 | {
|
| 1461 | struct device *dev = &pdev->dev;
|
| 1462 | struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
| 1463 |
|
| 1464 | if (system_state == SYSTEM_POWER_OFF) {
|
| 1465 | int retval = cmos_poweroff(dev);
|
| 1466 |
|
| 1467 | if (cmos_aie_poweroff(dev) < 0 && !retval)
|
| 1468 | return;
|
| 1469 | }
|
| 1470 |
|
| 1471 | cmos_do_shutdown(cmos->irq);
|
| 1472 | }
|
| 1473 |
|
| 1474 |
|
| 1475 | MODULE_ALIAS("platform:rtc_cmos");
|
| 1476 |
|
| 1477 | static struct platform_driver cmos_platform_driver = {
|
| 1478 | .remove = cmos_platform_remove,
|
| 1479 | .shutdown = cmos_platform_shutdown,
|
| 1480 | .driver = {
|
| 1481 | .name = driver_name,
|
| 1482 | .pm = &cmos_pm_ops,
|
| 1483 | .of_match_table = of_match_ptr(of_cmos_match),
|
| 1484 | .acpi_match_table = ACPI_PTR(acpi_cmos_rtc_ids),
|
| 1485 | }
|
| 1486 | };
|
| 1487 |
|
| 1488 | static bool platform_driver_registered;
|
| 1489 |
|
| 1490 | static int __init cmos_init(void)
|
| 1491 | {
|
| 1492 | int retval;
|
| 1493 |
|
| 1494 | if (cmos_rtc.dev)
|
| 1495 | return 0;
|
| 1496 |
|
| 1497 | retval = platform_driver_probe(&cmos_platform_driver, cmos_platform_probe);
|
| 1498 | if (retval)
|
| 1499 | return retval;
|
| 1500 |
|
| 1501 | platform_driver_registered = true;
|
| 1502 |
|
| 1503 | return 0;
|
| 1504 | }
|
| 1505 | module_init(cmos_init);
|
| 1506 |
|
| 1507 | static void __exit cmos_exit(void)
|
| 1508 | {
|
| 1509 | if (platform_driver_registered)
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| 1510 | platform_driver_unregister(&cmos_platform_driver);
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| 1511 | }
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| 1512 | module_exit(cmos_exit);
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| 1513 |
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| 1514 |
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| 1515 | MODULE_AUTHOR("David Brownell");
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| 1516 | MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
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| 1517 | MODULE_LICENSE("GPL");
|