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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Haoyu HYM8563 RTC driver
4 *
5 * Copyright (C) 2013 MundoReader S.L.
6 * Author: Heiko Stuebner <[email protected]>
7 *
8 * based on rtc-HYM8563
9 * Copyright (C) 2010 ROCKCHIP, Inc.
10 */
11
12#include <linux/module.h>
13#include <linux/clk-provider.h>
14#include <linux/i2c.h>
15#include <linux/bcd.h>
16#include <linux/rtc.h>
17
18#define HYM8563_CTL1 0x00
19#define HYM8563_CTL1_TEST BIT(7)
20#define HYM8563_CTL1_STOP BIT(5)
21#define HYM8563_CTL1_TESTC BIT(3)
22
23#define HYM8563_CTL2 0x01
24#define HYM8563_CTL2_TI_TP BIT(4)
25#define HYM8563_CTL2_AF BIT(3)
26#define HYM8563_CTL2_TF BIT(2)
27#define HYM8563_CTL2_AIE BIT(1)
28#define HYM8563_CTL2_TIE BIT(0)
29
30#define HYM8563_SEC 0x02
31#define HYM8563_SEC_VL BIT(7)
32#define HYM8563_SEC_MASK 0x7f
33
34#define HYM8563_MIN 0x03
35#define HYM8563_MIN_MASK 0x7f
36
37#define HYM8563_HOUR 0x04
38#define HYM8563_HOUR_MASK 0x3f
39
40#define HYM8563_DAY 0x05
41#define HYM8563_DAY_MASK 0x3f
42
43#define HYM8563_WEEKDAY 0x06
44#define HYM8563_WEEKDAY_MASK 0x07
45
46#define HYM8563_MONTH 0x07
47#define HYM8563_MONTH_CENTURY BIT(7)
48#define HYM8563_MONTH_MASK 0x1f
49
50#define HYM8563_YEAR 0x08
51
52#define HYM8563_ALM_MIN 0x09
53#define HYM8563_ALM_HOUR 0x0a
54#define HYM8563_ALM_DAY 0x0b
55#define HYM8563_ALM_WEEK 0x0c
56
57/* Each alarm check can be disabled by setting this bit in the register */
58#define HYM8563_ALM_BIT_DISABLE BIT(7)
59
60#define HYM8563_CLKOUT 0x0d
61#define HYM8563_CLKOUT_ENABLE BIT(7)
62#define HYM8563_CLKOUT_32768 0
63#define HYM8563_CLKOUT_1024 1
64#define HYM8563_CLKOUT_32 2
65#define HYM8563_CLKOUT_1 3
66#define HYM8563_CLKOUT_MASK 3
67
68#define HYM8563_TMR_CTL 0x0e
69#define HYM8563_TMR_CTL_ENABLE BIT(7)
70#define HYM8563_TMR_CTL_4096 0
71#define HYM8563_TMR_CTL_64 1
72#define HYM8563_TMR_CTL_1 2
73#define HYM8563_TMR_CTL_1_60 3
74#define HYM8563_TMR_CTL_MASK 3
75
76#define HYM8563_TMR_CNT 0x0f
77
78struct hym8563 {
79 struct i2c_client *client;
80 struct rtc_device *rtc;
81#ifdef CONFIG_COMMON_CLK
82 struct clk_hw clkout_hw;
83#endif
84};
85
86/*
87 * RTC handling
88 */
89
90static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
91{
92 struct i2c_client *client = to_i2c_client(dev);
93 u8 buf[7];
94 int ret;
95
96 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
97 if (ret < 0)
98 return ret;
99
100 if (buf[0] & HYM8563_SEC_VL) {
101 dev_warn(&client->dev,
102 "no valid clock/calendar values available\n");
103 return -EINVAL;
104 }
105
106 tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
107 tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
108 tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
109 tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
110 tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
111 tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
112 tm->tm_year = bcd2bin(buf[6]) + 100;
113
114 return 0;
115}
116
117static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
118{
119 struct i2c_client *client = to_i2c_client(dev);
120 u8 buf[7];
121 int ret;
122
123 /* Years >= 2100 are to far in the future, 19XX is to early */
124 if (tm->tm_year < 100 || tm->tm_year >= 200)
125 return -EINVAL;
126
127 buf[0] = bin2bcd(tm->tm_sec);
128 buf[1] = bin2bcd(tm->tm_min);
129 buf[2] = bin2bcd(tm->tm_hour);
130 buf[3] = bin2bcd(tm->tm_mday);
131 buf[4] = bin2bcd(tm->tm_wday);
132 buf[5] = bin2bcd(tm->tm_mon + 1);
133
134 /*
135 * While the HYM8563 has a century flag in the month register,
136 * it does not seem to carry it over a subsequent write/read.
137 * So we'll limit ourself to 100 years, starting at 2000 for now.
138 */
139 buf[6] = bin2bcd(tm->tm_year - 100);
140
141 /*
142 * CTL1 only contains TEST-mode bits apart from stop,
143 * so no need to read the value first
144 */
145 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
146 HYM8563_CTL1_STOP);
147 if (ret < 0)
148 return ret;
149
150 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
151 if (ret < 0)
152 return ret;
153
154 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
155 if (ret < 0)
156 return ret;
157
158 return 0;
159}
160
161static int hym8563_rtc_alarm_irq_enable(struct device *dev,
162 unsigned int enabled)
163{
164 struct i2c_client *client = to_i2c_client(dev);
165 int data;
166
167 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
168 if (data < 0)
169 return data;
170
171 if (enabled)
172 data |= HYM8563_CTL2_AIE;
173 else
174 data &= ~HYM8563_CTL2_AIE;
175
176 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
177};
178
179static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
180{
181 struct i2c_client *client = to_i2c_client(dev);
182 struct rtc_time *alm_tm = &alm->time;
183 u8 buf[4];
184 int ret;
185
186 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
187 if (ret < 0)
188 return ret;
189
190 /* The alarm only has a minute accuracy */
191 alm_tm->tm_sec = 0;
192
193 alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
194 -1 :
195 bcd2bin(buf[0] & HYM8563_MIN_MASK);
196 alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
197 -1 :
198 bcd2bin(buf[1] & HYM8563_HOUR_MASK);
199 alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
200 -1 :
201 bcd2bin(buf[2] & HYM8563_DAY_MASK);
202 alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
203 -1 :
204 bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
205
206 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
207 if (ret < 0)
208 return ret;
209
210 if (ret & HYM8563_CTL2_AIE)
211 alm->enabled = 1;
212
213 return 0;
214}
215
216static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
217{
218 struct i2c_client *client = to_i2c_client(dev);
219 struct rtc_time *alm_tm = &alm->time;
220 u8 buf[4];
221 int ret;
222
223 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
224 if (ret < 0)
225 return ret;
226
227 ret &= ~HYM8563_CTL2_AIE;
228
229 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
230 if (ret < 0)
231 return ret;
232
233 buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
234 bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
235
236 buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
237 bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
238
239 buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
240 bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
241
242 buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
243 bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
244
245 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
246 if (ret < 0)
247 return ret;
248
249 return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
250}
251
252static const struct rtc_class_ops hym8563_rtc_ops = {
253 .read_time = hym8563_rtc_read_time,
254 .set_time = hym8563_rtc_set_time,
255 .alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
256 .read_alarm = hym8563_rtc_read_alarm,
257 .set_alarm = hym8563_rtc_set_alarm,
258};
259
260/*
261 * Handling of the clkout
262 */
263
264#ifdef CONFIG_COMMON_CLK
265#define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
266
267static int clkout_rates[] = {
268 32768,
269 1024,
270 32,
271 1,
272};
273
274static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
275 unsigned long parent_rate)
276{
277 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
278 struct i2c_client *client = hym8563->client;
279 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
280
281 if (ret < 0)
282 return 0;
283
284 ret &= HYM8563_CLKOUT_MASK;
285 return clkout_rates[ret];
286}
287
288static int hym8563_clkout_determine_rate(struct clk_hw *hw,
289 struct clk_rate_request *req)
290{
291 int i;
292
293 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
294 if (clkout_rates[i] <= req->rate) {
295 req->rate = clkout_rates[i];
296
297 return 0;
298 }
299
300 req->rate = clkout_rates[0];
301
302 return 0;
303}
304
305static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
306 unsigned long parent_rate)
307{
308 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
309 struct i2c_client *client = hym8563->client;
310 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
311 int i;
312
313 if (ret < 0)
314 return ret;
315
316 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
317 if (clkout_rates[i] == rate) {
318 ret &= ~HYM8563_CLKOUT_MASK;
319 ret |= i;
320 return i2c_smbus_write_byte_data(client,
321 HYM8563_CLKOUT, ret);
322 }
323
324 return -EINVAL;
325}
326
327static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
328{
329 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
330 struct i2c_client *client = hym8563->client;
331 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
332
333 if (ret < 0)
334 return ret;
335
336 if (enable)
337 ret |= HYM8563_CLKOUT_ENABLE;
338 else
339 ret &= ~HYM8563_CLKOUT_ENABLE;
340
341 return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
342}
343
344static int hym8563_clkout_prepare(struct clk_hw *hw)
345{
346 return hym8563_clkout_control(hw, 1);
347}
348
349static void hym8563_clkout_unprepare(struct clk_hw *hw)
350{
351 hym8563_clkout_control(hw, 0);
352}
353
354static int hym8563_clkout_is_prepared(struct clk_hw *hw)
355{
356 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
357 struct i2c_client *client = hym8563->client;
358 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
359
360 if (ret < 0)
361 return ret;
362
363 return !!(ret & HYM8563_CLKOUT_ENABLE);
364}
365
366static const struct clk_ops hym8563_clkout_ops = {
367 .prepare = hym8563_clkout_prepare,
368 .unprepare = hym8563_clkout_unprepare,
369 .is_prepared = hym8563_clkout_is_prepared,
370 .recalc_rate = hym8563_clkout_recalc_rate,
371 .determine_rate = hym8563_clkout_determine_rate,
372 .set_rate = hym8563_clkout_set_rate,
373};
374
375static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
376{
377 struct i2c_client *client = hym8563->client;
378 struct device_node *node = client->dev.of_node;
379 struct clk_init_data init = {};
380 struct clk *clk;
381 int ret;
382
383 ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
384 0);
385 if (ret < 0)
386 return ERR_PTR(ret);
387
388 init.name = "hym8563-clkout";
389 init.ops = &hym8563_clkout_ops;
390 init.flags = 0;
391 init.parent_names = NULL;
392 init.num_parents = 0;
393 hym8563->clkout_hw.init = &init;
394
395 /* optional override of the clockname */
396 of_property_read_string(node, "clock-output-names", &init.name);
397
398 /* register the clock */
399 clk = clk_register(&client->dev, &hym8563->clkout_hw);
400
401 if (!IS_ERR(clk))
402 of_clk_add_provider(node, of_clk_src_simple_get, clk);
403
404 return clk;
405}
406#endif
407
408/*
409 * The alarm interrupt is implemented as a level-low interrupt in the
410 * hym8563, while the timer interrupt uses a falling edge.
411 * We don't use the timer at all, so the interrupt is requested to
412 * use the level-low trigger.
413 */
414static irqreturn_t hym8563_irq(int irq, void *dev_id)
415{
416 struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
417 struct i2c_client *client = hym8563->client;
418 int data, ret;
419
420 rtc_lock(hym8563->rtc);
421
422 /* Clear the alarm flag */
423
424 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
425 if (data < 0) {
426 dev_err(&client->dev, "%s: error reading i2c data %d\n",
427 __func__, data);
428 goto out;
429 }
430
431 data &= ~HYM8563_CTL2_AF;
432
433 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
434 if (ret < 0) {
435 dev_err(&client->dev, "%s: error writing i2c data %d\n",
436 __func__, ret);
437 }
438
439out:
440 rtc_unlock(hym8563->rtc);
441 return IRQ_HANDLED;
442}
443
444static int hym8563_init_device(struct i2c_client *client)
445{
446 int ret;
447
448 /* Clear stop flag if present */
449 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
450 if (ret < 0)
451 return ret;
452
453 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
454 if (ret < 0)
455 return ret;
456
457 /* Disable alarm and timer interrupts */
458 ret &= ~HYM8563_CTL2_AIE;
459 ret &= ~HYM8563_CTL2_TIE;
460
461 /* Clear any pending alarm and timer flags */
462 if (ret & HYM8563_CTL2_AF)
463 ret &= ~HYM8563_CTL2_AF;
464
465 if (ret & HYM8563_CTL2_TF)
466 ret &= ~HYM8563_CTL2_TF;
467
468 ret &= ~HYM8563_CTL2_TI_TP;
469
470 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
471}
472
473#ifdef CONFIG_PM_SLEEP
474static int hym8563_suspend(struct device *dev)
475{
476 struct i2c_client *client = to_i2c_client(dev);
477 int ret;
478
479 if (device_may_wakeup(dev)) {
480 ret = enable_irq_wake(client->irq);
481 if (ret) {
482 dev_err(dev, "enable_irq_wake failed, %d\n", ret);
483 return ret;
484 }
485 }
486
487 return 0;
488}
489
490static int hym8563_resume(struct device *dev)
491{
492 struct i2c_client *client = to_i2c_client(dev);
493
494 if (device_may_wakeup(dev))
495 disable_irq_wake(client->irq);
496
497 return 0;
498}
499#endif
500
501static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
502
503static int hym8563_probe(struct i2c_client *client)
504{
505 struct hym8563 *hym8563;
506 int ret;
507
508 hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
509 if (!hym8563)
510 return -ENOMEM;
511
512 hym8563->rtc = devm_rtc_allocate_device(&client->dev);
513 if (IS_ERR(hym8563->rtc))
514 return PTR_ERR(hym8563->rtc);
515
516 hym8563->client = client;
517 i2c_set_clientdata(client, hym8563);
518
519 ret = hym8563_init_device(client);
520 if (ret) {
521 dev_err(&client->dev, "could not init device, %d\n", ret);
522 return ret;
523 }
524
525 if (client->irq > 0) {
526 unsigned long irqflags = IRQF_TRIGGER_LOW;
527
528 if (dev_fwnode(&client->dev))
529 irqflags = 0;
530
531 ret = devm_request_threaded_irq(&client->dev, client->irq,
532 NULL, hym8563_irq,
533 irqflags | IRQF_ONESHOT,
534 client->name, hym8563);
535 if (ret < 0) {
536 dev_err(&client->dev, "irq %d request failed, %d\n",
537 client->irq, ret);
538 return ret;
539 }
540 }
541
542 if (client->irq > 0 ||
543 device_property_read_bool(&client->dev, "wakeup-source")) {
544 device_init_wakeup(&client->dev, true);
545 }
546
547 /* check state of calendar information */
548 ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
549 if (ret < 0)
550 return ret;
551
552 dev_dbg(&client->dev, "rtc information is %s\n",
553 (ret & HYM8563_SEC_VL) ? "invalid" : "valid");
554
555 hym8563->rtc->ops = &hym8563_rtc_ops;
556 set_bit(RTC_FEATURE_ALARM_RES_MINUTE, hym8563->rtc->features);
557 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, hym8563->rtc->features);
558
559#ifdef CONFIG_COMMON_CLK
560 hym8563_clkout_register_clk(hym8563);
561#endif
562
563 return devm_rtc_register_device(hym8563->rtc);
564}
565
566static const struct i2c_device_id hym8563_id[] = {
567 { .name = "hym8563" },
568 { }
569};
570MODULE_DEVICE_TABLE(i2c, hym8563_id);
571
572static const struct of_device_id hym8563_dt_idtable[] = {
573 { .compatible = "haoyu,hym8563" },
574 {},
575};
576MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
577
578static struct i2c_driver hym8563_driver = {
579 .driver = {
580 .name = "rtc-hym8563",
581 .pm = &hym8563_pm_ops,
582 .of_match_table = hym8563_dt_idtable,
583 },
584 .probe = hym8563_probe,
585 .id_table = hym8563_id,
586};
587
588module_i2c_driver(hym8563_driver);
589
590MODULE_AUTHOR("Heiko Stuebner <[email protected]>");
591MODULE_DESCRIPTION("HYM8563 RTC driver");
592MODULE_LICENSE("GPL");