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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * RTC driver for the interal RTC block in the Amlogic Meson6, Meson8,
4 * Meson8b and Meson8m2 SoCs.
5 *
6 * The RTC is split in to two parts, the AHB front end and a simple serial
7 * connection to the actual registers. This driver manages both parts.
8 *
9 * Copyright (c) 2018 Martin Blumenstingl <[email protected]>
10 * Copyright (c) 2015 Ben Dooks <[email protected]> for Codethink Ltd
11 * Based on origin by Carlo Caione <[email protected]>
12 */
13
14#include <linux/bitfield.h>
15#include <linux/delay.h>
16#include <linux/io.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/nvmem-provider.h>
20#include <linux/of.h>
21#include <linux/platform_device.h>
22#include <linux/regmap.h>
23#include <linux/regulator/consumer.h>
24#include <linux/reset.h>
25#include <linux/rtc.h>
26
27/* registers accessed from cpu bus */
28#define RTC_ADDR0 0x00
29 #define RTC_ADDR0_LINE_SCLK BIT(0)
30 #define RTC_ADDR0_LINE_SEN BIT(1)
31 #define RTC_ADDR0_LINE_SDI BIT(2)
32 #define RTC_ADDR0_START_SER BIT(17)
33 #define RTC_ADDR0_WAIT_SER BIT(22)
34 #define RTC_ADDR0_DATA GENMASK(31, 24)
35
36#define RTC_ADDR1 0x04
37 #define RTC_ADDR1_SDO BIT(0)
38 #define RTC_ADDR1_S_READY BIT(1)
39
40#define RTC_ADDR2 0x08
41#define RTC_ADDR3 0x0c
42
43#define RTC_REG4 0x10
44 #define RTC_REG4_STATIC_VALUE GENMASK(7, 0)
45
46/* rtc registers accessed via rtc-serial interface */
47#define RTC_COUNTER (0)
48#define RTC_SEC_ADJ (2)
49#define RTC_REGMEM_0 (4)
50#define RTC_REGMEM_1 (5)
51#define RTC_REGMEM_2 (6)
52#define RTC_REGMEM_3 (7)
53
54#define RTC_ADDR_BITS (3) /* number of address bits to send */
55#define RTC_DATA_BITS (32) /* number of data bits to tx/rx */
56
57#define MESON_STATIC_BIAS_CUR (0x5 << 1)
58#define MESON_STATIC_VOLTAGE (0x3 << 11)
59#define MESON_STATIC_DEFAULT (MESON_STATIC_BIAS_CUR | MESON_STATIC_VOLTAGE)
60
61struct meson_rtc {
62 struct device *dev; /* device we bound from */
63 struct reset_control *reset; /* reset source */
64 struct regulator *vdd; /* voltage input */
65 struct regmap *peripheral; /* peripheral registers */
66 struct regmap *serial; /* serial registers */
67};
68
69static const struct regmap_config meson_rtc_peripheral_regmap_config = {
70 .name = "peripheral-registers",
71 .reg_bits = 8,
72 .val_bits = 32,
73 .reg_stride = 4,
74 .max_register = RTC_REG4,
75};
76
77/* RTC front-end serialiser controls */
78
79static void meson_rtc_sclk_pulse(struct meson_rtc *rtc)
80{
81 udelay(5);
82 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, 0);
83 udelay(5);
84 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK,
85 RTC_ADDR0_LINE_SCLK);
86}
87
88static void meson_rtc_send_bit(struct meson_rtc *rtc, unsigned int bit)
89{
90 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI,
91 bit ? RTC_ADDR0_LINE_SDI : 0);
92 meson_rtc_sclk_pulse(rtc);
93}
94
95static void meson_rtc_send_bits(struct meson_rtc *rtc, u32 data,
96 unsigned int nr)
97{
98 u32 bit = 1 << (nr - 1);
99
100 while (bit) {
101 meson_rtc_send_bit(rtc, data & bit);
102 bit >>= 1;
103 }
104}
105
106static void meson_rtc_set_dir(struct meson_rtc *rtc, u32 mode)
107{
108 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN, 0);
109 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, 0);
110 meson_rtc_send_bit(rtc, mode);
111 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, 0);
112}
113
114static u32 meson_rtc_get_data(struct meson_rtc *rtc)
115{
116 u32 tmp, val = 0;
117 int bit;
118
119 for (bit = 0; bit < RTC_DATA_BITS; bit++) {
120 meson_rtc_sclk_pulse(rtc);
121 val <<= 1;
122
123 regmap_read(rtc->peripheral, RTC_ADDR1, &tmp);
124 val |= tmp & RTC_ADDR1_SDO;
125 }
126
127 return val;
128}
129
130static int meson_rtc_get_bus(struct meson_rtc *rtc)
131{
132 int ret, retries;
133 u32 val;
134
135 /* prepare bus for transfers, set all lines low */
136 val = RTC_ADDR0_LINE_SDI | RTC_ADDR0_LINE_SEN | RTC_ADDR0_LINE_SCLK;
137 regmap_update_bits(rtc->peripheral, RTC_ADDR0, val, 0);
138
139 for (retries = 0; retries < 3; retries++) {
140 /* wait for the bus to be ready */
141 if (!regmap_read_poll_timeout(rtc->peripheral, RTC_ADDR1, val,
142 val & RTC_ADDR1_S_READY, 10,
143 10000))
144 return 0;
145
146 dev_warn(rtc->dev, "failed to get bus, resetting RTC\n");
147
148 ret = reset_control_reset(rtc->reset);
149 if (ret)
150 return ret;
151 }
152
153 dev_err(rtc->dev, "bus is not ready\n");
154 return -ETIMEDOUT;
155}
156
157static int meson_rtc_serial_bus_reg_read(void *context, unsigned int reg,
158 unsigned int *data)
159{
160 struct meson_rtc *rtc = context;
161 int ret;
162
163 ret = meson_rtc_get_bus(rtc);
164 if (ret)
165 return ret;
166
167 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN,
168 RTC_ADDR0_LINE_SEN);
169 meson_rtc_send_bits(rtc, reg, RTC_ADDR_BITS);
170 meson_rtc_set_dir(rtc, 0);
171 *data = meson_rtc_get_data(rtc);
172
173 return 0;
174}
175
176static int meson_rtc_serial_bus_reg_write(void *context, unsigned int reg,
177 unsigned int data)
178{
179 struct meson_rtc *rtc = context;
180 int ret;
181
182 ret = meson_rtc_get_bus(rtc);
183 if (ret)
184 return ret;
185
186 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN,
187 RTC_ADDR0_LINE_SEN);
188 meson_rtc_send_bits(rtc, data, RTC_DATA_BITS);
189 meson_rtc_send_bits(rtc, reg, RTC_ADDR_BITS);
190 meson_rtc_set_dir(rtc, 1);
191
192 return 0;
193}
194
195static const struct regmap_bus meson_rtc_serial_bus = {
196 .reg_read = meson_rtc_serial_bus_reg_read,
197 .reg_write = meson_rtc_serial_bus_reg_write,
198};
199
200static const struct regmap_config meson_rtc_serial_regmap_config = {
201 .name = "serial-registers",
202 .reg_bits = 4,
203 .reg_stride = 1,
204 .val_bits = 32,
205 .max_register = RTC_REGMEM_3,
206 .fast_io = false,
207};
208
209static int meson_rtc_write_static(struct meson_rtc *rtc, u32 data)
210{
211 u32 tmp;
212
213 regmap_write(rtc->peripheral, RTC_REG4,
214 FIELD_PREP(RTC_REG4_STATIC_VALUE, (data >> 8)));
215
216 /* write the static value and start the auto serializer */
217 tmp = FIELD_PREP(RTC_ADDR0_DATA, (data & 0xff)) | RTC_ADDR0_START_SER;
218 regmap_update_bits(rtc->peripheral, RTC_ADDR0,
219 RTC_ADDR0_DATA | RTC_ADDR0_START_SER, tmp);
220
221 /* wait for the auto serializer to complete */
222 return regmap_read_poll_timeout(rtc->peripheral, RTC_REG4, tmp,
223 !(tmp & RTC_ADDR0_WAIT_SER), 10,
224 10000);
225}
226
227/* RTC interface layer functions */
228
229static int meson_rtc_gettime(struct device *dev, struct rtc_time *tm)
230{
231 struct meson_rtc *rtc = dev_get_drvdata(dev);
232 u32 time;
233 int ret;
234
235 ret = regmap_read(rtc->serial, RTC_COUNTER, &time);
236 if (!ret)
237 rtc_time64_to_tm(time, tm);
238
239 return ret;
240}
241
242static int meson_rtc_settime(struct device *dev, struct rtc_time *tm)
243{
244 struct meson_rtc *rtc = dev_get_drvdata(dev);
245
246 return regmap_write(rtc->serial, RTC_COUNTER, rtc_tm_to_time64(tm));
247}
248
249static const struct rtc_class_ops meson_rtc_ops = {
250 .read_time = meson_rtc_gettime,
251 .set_time = meson_rtc_settime,
252};
253
254/* NVMEM interface layer functions */
255
256static int meson_rtc_regmem_read(void *context, unsigned int offset,
257 void *buf, size_t bytes)
258{
259 struct meson_rtc *rtc = context;
260 unsigned int read_offset, read_size;
261
262 read_offset = RTC_REGMEM_0 + (offset / 4);
263 read_size = bytes / 4;
264
265 return regmap_bulk_read(rtc->serial, read_offset, buf, read_size);
266}
267
268static int meson_rtc_regmem_write(void *context, unsigned int offset,
269 void *buf, size_t bytes)
270{
271 struct meson_rtc *rtc = context;
272 unsigned int write_offset, write_size;
273
274 write_offset = RTC_REGMEM_0 + (offset / 4);
275 write_size = bytes / 4;
276
277 return regmap_bulk_write(rtc->serial, write_offset, buf, write_size);
278}
279
280static int meson_rtc_probe(struct platform_device *pdev)
281{
282 struct nvmem_config meson_rtc_nvmem_config = {
283 .name = "meson-rtc-regmem",
284 .type = NVMEM_TYPE_BATTERY_BACKED,
285 .word_size = 4,
286 .stride = 4,
287 .size = 4 * 4,
288 .reg_read = meson_rtc_regmem_read,
289 .reg_write = meson_rtc_regmem_write,
290 };
291 struct device *dev = &pdev->dev;
292 struct meson_rtc *rtc;
293 struct rtc_device *rtc_dev;
294 void __iomem *base;
295 int ret;
296 u32 tm;
297
298 rtc = devm_kzalloc(dev, sizeof(struct meson_rtc), GFP_KERNEL);
299 if (!rtc)
300 return -ENOMEM;
301
302 rtc_dev = devm_rtc_allocate_device(dev);
303 if (IS_ERR(rtc_dev))
304 return PTR_ERR(rtc_dev);
305
306 platform_set_drvdata(pdev, rtc);
307
308 rtc->dev = dev;
309
310 rtc_dev->ops = &meson_rtc_ops;
311 rtc_dev->range_max = U32_MAX;
312
313 base = devm_platform_ioremap_resource(pdev, 0);
314 if (IS_ERR(base))
315 return PTR_ERR(base);
316
317 rtc->peripheral = devm_regmap_init_mmio(dev, base,
318 &meson_rtc_peripheral_regmap_config);
319 if (IS_ERR(rtc->peripheral)) {
320 dev_err(dev, "failed to create peripheral regmap\n");
321 return PTR_ERR(rtc->peripheral);
322 }
323
324 rtc->reset = devm_reset_control_get(dev, NULL);
325 if (IS_ERR(rtc->reset)) {
326 dev_err(dev, "missing reset line\n");
327 return PTR_ERR(rtc->reset);
328 }
329
330 rtc->vdd = devm_regulator_get(dev, "vdd");
331 if (IS_ERR(rtc->vdd)) {
332 dev_err(dev, "failed to get the vdd-supply\n");
333 return PTR_ERR(rtc->vdd);
334 }
335
336 ret = regulator_enable(rtc->vdd);
337 if (ret) {
338 dev_err(dev, "failed to enable vdd-supply\n");
339 return ret;
340 }
341
342 ret = meson_rtc_write_static(rtc, MESON_STATIC_DEFAULT);
343 if (ret) {
344 dev_err(dev, "failed to set static values\n");
345 goto out_disable_vdd;
346 }
347
348 rtc->serial = devm_regmap_init(dev, &meson_rtc_serial_bus, rtc,
349 &meson_rtc_serial_regmap_config);
350 if (IS_ERR(rtc->serial)) {
351 dev_err(dev, "failed to create serial regmap\n");
352 ret = PTR_ERR(rtc->serial);
353 goto out_disable_vdd;
354 }
355
356 /*
357 * check if we can read RTC counter, if not then the RTC is probably
358 * not functional. If it isn't probably best to not bind.
359 */
360 ret = regmap_read(rtc->serial, RTC_COUNTER, &tm);
361 if (ret) {
362 dev_err(dev, "cannot read RTC counter, RTC not functional\n");
363 goto out_disable_vdd;
364 }
365
366 meson_rtc_nvmem_config.priv = rtc;
367 ret = devm_rtc_nvmem_register(rtc_dev, &meson_rtc_nvmem_config);
368 if (ret)
369 goto out_disable_vdd;
370
371 ret = devm_rtc_register_device(rtc_dev);
372 if (ret)
373 goto out_disable_vdd;
374
375 return 0;
376
377out_disable_vdd:
378 regulator_disable(rtc->vdd);
379 return ret;
380}
381
382static const __maybe_unused struct of_device_id meson_rtc_dt_match[] = {
383 { .compatible = "amlogic,meson6-rtc", },
384 { .compatible = "amlogic,meson8-rtc", },
385 { .compatible = "amlogic,meson8b-rtc", },
386 { .compatible = "amlogic,meson8m2-rtc", },
387 { },
388};
389MODULE_DEVICE_TABLE(of, meson_rtc_dt_match);
390
391static struct platform_driver meson_rtc_driver = {
392 .probe = meson_rtc_probe,
393 .driver = {
394 .name = "meson-rtc",
395 .of_match_table = of_match_ptr(meson_rtc_dt_match),
396 },
397};
398module_platform_driver(meson_rtc_driver);
399
400MODULE_DESCRIPTION("Amlogic Meson RTC Driver");
401MODULE_AUTHOR("Ben Dooks <[email protected]>");
402MODULE_AUTHOR("Martin Blumenstingl <[email protected]>");
403MODULE_LICENSE("GPL v2");
404MODULE_ALIAS("platform:meson-rtc");