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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for MediaTek SoC based RTC
4 *
5 * Copyright (C) 2017 Sean Wang <[email protected]>
6 */
7
8#include <linux/clk.h>
9#include <linux/interrupt.h>
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/platform_device.h>
13#include <linux/rtc.h>
14
15#define MTK_RTC_DEV KBUILD_MODNAME
16
17#define MTK_RTC_PWRCHK1 0x4
18#define RTC_PWRCHK1_MAGIC 0xc6
19
20#define MTK_RTC_PWRCHK2 0x8
21#define RTC_PWRCHK2_MAGIC 0x9a
22
23#define MTK_RTC_KEY 0xc
24#define RTC_KEY_MAGIC 0x59
25
26#define MTK_RTC_PROT1 0x10
27#define RTC_PROT1_MAGIC 0xa3
28
29#define MTK_RTC_PROT2 0x14
30#define RTC_PROT2_MAGIC 0x57
31
32#define MTK_RTC_PROT3 0x18
33#define RTC_PROT3_MAGIC 0x67
34
35#define MTK_RTC_PROT4 0x1c
36#define RTC_PROT4_MAGIC 0xd2
37
38#define MTK_RTC_CTL 0x20
39#define RTC_RC_STOP BIT(0)
40
41#define MTK_RTC_DEBNCE 0x2c
42#define RTC_DEBNCE_MASK GENMASK(2, 0)
43
44#define MTK_RTC_INT 0x30
45#define RTC_INT_AL_STA BIT(4)
46
47/*
48 * Ranges from 0x40 to 0x78 provide RTC time setup for year, month,
49 * day of month, day of week, hour, minute and second.
50 */
51#define MTK_RTC_TREG(_t, _f) (0x40 + (0x4 * (_f)) + ((_t) * 0x20))
52
53#define MTK_RTC_AL_CTL 0x7c
54#define RTC_AL_EN BIT(0)
55#define RTC_AL_ALL GENMASK(7, 0)
56
57/*
58 * The offset is used in the translation for the year between in struct
59 * rtc_time and in hardware register MTK_RTC_TREG(x,MTK_YEA)
60 */
61#define MTK_RTC_TM_YR_OFFSET 100
62
63/*
64 * The lowest value for the valid tm_year. RTC hardware would take incorrectly
65 * tm_year 100 as not a leap year and thus it is also required being excluded
66 * from the valid options.
67 */
68#define MTK_RTC_TM_YR_L (MTK_RTC_TM_YR_OFFSET + 1)
69
70/*
71 * The most year the RTC can hold is 99 and the next to 99 in year register
72 * would be wraparound to 0, for MT7622.
73 */
74#define MTK_RTC_HW_YR_LIMIT 99
75
76/* The highest value for the valid tm_year */
77#define MTK_RTC_TM_YR_H (MTK_RTC_TM_YR_OFFSET + MTK_RTC_HW_YR_LIMIT)
78
79/* Simple macro helps to check whether the hardware supports the tm_year */
80#define MTK_RTC_TM_YR_VALID(_y) ((_y) >= MTK_RTC_TM_YR_L && \
81 (_y) <= MTK_RTC_TM_YR_H)
82
83/* Types of the function the RTC provides are time counter and alarm. */
84enum {
85 MTK_TC,
86 MTK_AL,
87};
88
89/* Indexes are used for the pointer to relevant registers in MTK_RTC_TREG */
90enum {
91 MTK_YEA,
92 MTK_MON,
93 MTK_DOM,
94 MTK_DOW,
95 MTK_HOU,
96 MTK_MIN,
97 MTK_SEC
98};
99
100struct mtk_rtc {
101 struct rtc_device *rtc;
102 void __iomem *base;
103 int irq;
104 struct clk *clk;
105};
106
107static void mtk_w32(struct mtk_rtc *rtc, u32 reg, u32 val)
108{
109 writel_relaxed(val, rtc->base + reg);
110}
111
112static u32 mtk_r32(struct mtk_rtc *rtc, u32 reg)
113{
114 return readl_relaxed(rtc->base + reg);
115}
116
117static void mtk_rmw(struct mtk_rtc *rtc, u32 reg, u32 mask, u32 set)
118{
119 u32 val;
120
121 val = mtk_r32(rtc, reg);
122 val &= ~mask;
123 val |= set;
124 mtk_w32(rtc, reg, val);
125}
126
127static void mtk_set(struct mtk_rtc *rtc, u32 reg, u32 val)
128{
129 mtk_rmw(rtc, reg, 0, val);
130}
131
132static void mtk_clr(struct mtk_rtc *rtc, u32 reg, u32 val)
133{
134 mtk_rmw(rtc, reg, val, 0);
135}
136
137static void mtk_rtc_hw_init(struct mtk_rtc *hw)
138{
139 /* The setup of the init sequence is for allowing RTC got to work */
140 mtk_w32(hw, MTK_RTC_PWRCHK1, RTC_PWRCHK1_MAGIC);
141 mtk_w32(hw, MTK_RTC_PWRCHK2, RTC_PWRCHK2_MAGIC);
142 mtk_w32(hw, MTK_RTC_KEY, RTC_KEY_MAGIC);
143 mtk_w32(hw, MTK_RTC_PROT1, RTC_PROT1_MAGIC);
144 mtk_w32(hw, MTK_RTC_PROT2, RTC_PROT2_MAGIC);
145 mtk_w32(hw, MTK_RTC_PROT3, RTC_PROT3_MAGIC);
146 mtk_w32(hw, MTK_RTC_PROT4, RTC_PROT4_MAGIC);
147 mtk_rmw(hw, MTK_RTC_DEBNCE, RTC_DEBNCE_MASK, 0);
148 mtk_clr(hw, MTK_RTC_CTL, RTC_RC_STOP);
149}
150
151static void mtk_rtc_get_alarm_or_time(struct mtk_rtc *hw, struct rtc_time *tm,
152 int time_alarm)
153{
154 u32 year, mon, mday, wday, hour, min, sec;
155
156 /*
157 * Read again until the field of the second is not changed which
158 * ensures all fields in the consistent state. Note that MTK_SEC must
159 * be read first. In this way, it guarantees the others remain not
160 * changed when the results for two MTK_SEC consecutive reads are same.
161 */
162 do {
163 sec = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC));
164 min = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_MIN));
165 hour = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_HOU));
166 wday = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_DOW));
167 mday = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_DOM));
168 mon = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_MON));
169 year = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_YEA));
170 } while (sec != mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC)));
171
172 tm->tm_sec = sec;
173 tm->tm_min = min;
174 tm->tm_hour = hour;
175 tm->tm_wday = wday;
176 tm->tm_mday = mday;
177 tm->tm_mon = mon - 1;
178
179 /* Rebase to the absolute year which userspace queries */
180 tm->tm_year = year + MTK_RTC_TM_YR_OFFSET;
181}
182
183static void mtk_rtc_set_alarm_or_time(struct mtk_rtc *hw, struct rtc_time *tm,
184 int time_alarm)
185{
186 u32 year;
187
188 /* Rebase to the relative year which RTC hardware requires */
189 year = tm->tm_year - MTK_RTC_TM_YR_OFFSET;
190
191 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_YEA), year);
192 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_MON), tm->tm_mon + 1);
193 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_DOW), tm->tm_wday);
194 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_DOM), tm->tm_mday);
195 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_HOU), tm->tm_hour);
196 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_MIN), tm->tm_min);
197 mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC), tm->tm_sec);
198}
199
200static irqreturn_t mtk_rtc_alarmirq(int irq, void *id)
201{
202 struct mtk_rtc *hw = (struct mtk_rtc *)id;
203 u32 irq_sta;
204
205 irq_sta = mtk_r32(hw, MTK_RTC_INT);
206 if (irq_sta & RTC_INT_AL_STA) {
207 /* Stop alarm also implicitly disables the alarm interrupt */
208 mtk_w32(hw, MTK_RTC_AL_CTL, 0);
209 rtc_update_irq(hw->rtc, 1, RTC_IRQF | RTC_AF);
210
211 /* Ack alarm interrupt status */
212 mtk_w32(hw, MTK_RTC_INT, RTC_INT_AL_STA);
213 return IRQ_HANDLED;
214 }
215
216 return IRQ_NONE;
217}
218
219static int mtk_rtc_gettime(struct device *dev, struct rtc_time *tm)
220{
221 struct mtk_rtc *hw = dev_get_drvdata(dev);
222
223 mtk_rtc_get_alarm_or_time(hw, tm, MTK_TC);
224
225 return 0;
226}
227
228static int mtk_rtc_settime(struct device *dev, struct rtc_time *tm)
229{
230 struct mtk_rtc *hw = dev_get_drvdata(dev);
231
232 if (!MTK_RTC_TM_YR_VALID(tm->tm_year))
233 return -EINVAL;
234
235 /* Stop time counter before setting a new one*/
236 mtk_set(hw, MTK_RTC_CTL, RTC_RC_STOP);
237
238 mtk_rtc_set_alarm_or_time(hw, tm, MTK_TC);
239
240 /* Restart the time counter */
241 mtk_clr(hw, MTK_RTC_CTL, RTC_RC_STOP);
242
243 return 0;
244}
245
246static int mtk_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
247{
248 struct mtk_rtc *hw = dev_get_drvdata(dev);
249 struct rtc_time *alrm_tm = &wkalrm->time;
250
251 mtk_rtc_get_alarm_or_time(hw, alrm_tm, MTK_AL);
252
253 wkalrm->enabled = !!(mtk_r32(hw, MTK_RTC_AL_CTL) & RTC_AL_EN);
254 wkalrm->pending = !!(mtk_r32(hw, MTK_RTC_INT) & RTC_INT_AL_STA);
255
256 return 0;
257}
258
259static int mtk_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
260{
261 struct mtk_rtc *hw = dev_get_drvdata(dev);
262 struct rtc_time *alrm_tm = &wkalrm->time;
263
264 if (!MTK_RTC_TM_YR_VALID(alrm_tm->tm_year))
265 return -EINVAL;
266
267 /*
268 * Stop the alarm also implicitly including disables interrupt before
269 * setting a new one.
270 */
271 mtk_clr(hw, MTK_RTC_AL_CTL, RTC_AL_EN);
272
273 /*
274 * Avoid contention between mtk_rtc_setalarm and IRQ handler so that
275 * disabling the interrupt and awaiting for pending IRQ handler to
276 * complete.
277 */
278 synchronize_irq(hw->irq);
279
280 mtk_rtc_set_alarm_or_time(hw, alrm_tm, MTK_AL);
281
282 /* Restart the alarm with the new setup */
283 mtk_w32(hw, MTK_RTC_AL_CTL, RTC_AL_ALL);
284
285 return 0;
286}
287
288static const struct rtc_class_ops mtk_rtc_ops = {
289 .read_time = mtk_rtc_gettime,
290 .set_time = mtk_rtc_settime,
291 .read_alarm = mtk_rtc_getalarm,
292 .set_alarm = mtk_rtc_setalarm,
293};
294
295static const struct of_device_id mtk_rtc_match[] = {
296 { .compatible = "mediatek,mt7622-rtc" },
297 { .compatible = "mediatek,soc-rtc" },
298 {},
299};
300MODULE_DEVICE_TABLE(of, mtk_rtc_match);
301
302static int mtk_rtc_probe(struct platform_device *pdev)
303{
304 struct mtk_rtc *hw;
305 int ret;
306
307 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
308 if (!hw)
309 return -ENOMEM;
310
311 platform_set_drvdata(pdev, hw);
312
313 hw->base = devm_platform_ioremap_resource(pdev, 0);
314 if (IS_ERR(hw->base))
315 return PTR_ERR(hw->base);
316
317 hw->clk = devm_clk_get(&pdev->dev, "rtc");
318 if (IS_ERR(hw->clk)) {
319 dev_err(&pdev->dev, "No clock\n");
320 return PTR_ERR(hw->clk);
321 }
322
323 ret = clk_prepare_enable(hw->clk);
324 if (ret)
325 return ret;
326
327 hw->irq = platform_get_irq(pdev, 0);
328 if (hw->irq < 0) {
329 ret = hw->irq;
330 goto err;
331 }
332
333 ret = devm_request_irq(&pdev->dev, hw->irq, mtk_rtc_alarmirq,
334 0, dev_name(&pdev->dev), hw);
335 if (ret) {
336 dev_err(&pdev->dev, "Can't request IRQ\n");
337 goto err;
338 }
339
340 mtk_rtc_hw_init(hw);
341
342 device_init_wakeup(&pdev->dev, true);
343
344 hw->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
345 &mtk_rtc_ops, THIS_MODULE);
346 if (IS_ERR(hw->rtc)) {
347 ret = PTR_ERR(hw->rtc);
348 dev_err(&pdev->dev, "Unable to register device\n");
349 goto err;
350 }
351
352 return 0;
353err:
354 clk_disable_unprepare(hw->clk);
355
356 return ret;
357}
358
359static void mtk_rtc_remove(struct platform_device *pdev)
360{
361 struct mtk_rtc *hw = platform_get_drvdata(pdev);
362
363 clk_disable_unprepare(hw->clk);
364}
365
366#ifdef CONFIG_PM_SLEEP
367static int mtk_rtc_suspend(struct device *dev)
368{
369 struct mtk_rtc *hw = dev_get_drvdata(dev);
370
371 if (device_may_wakeup(dev))
372 enable_irq_wake(hw->irq);
373
374 return 0;
375}
376
377static int mtk_rtc_resume(struct device *dev)
378{
379 struct mtk_rtc *hw = dev_get_drvdata(dev);
380
381 if (device_may_wakeup(dev))
382 disable_irq_wake(hw->irq);
383
384 return 0;
385}
386
387static SIMPLE_DEV_PM_OPS(mtk_rtc_pm_ops, mtk_rtc_suspend, mtk_rtc_resume);
388
389#define MTK_RTC_PM_OPS (&mtk_rtc_pm_ops)
390#else /* CONFIG_PM */
391#define MTK_RTC_PM_OPS NULL
392#endif /* CONFIG_PM */
393
394static struct platform_driver mtk_rtc_driver = {
395 .probe = mtk_rtc_probe,
396 .remove = mtk_rtc_remove,
397 .driver = {
398 .name = MTK_RTC_DEV,
399 .of_match_table = mtk_rtc_match,
400 .pm = MTK_RTC_PM_OPS,
401 },
402};
403
404module_platform_driver(mtk_rtc_driver);
405
406MODULE_DESCRIPTION("MediaTek SoC based RTC Driver");
407MODULE_AUTHOR("Sean Wang <[email protected]>");
408MODULE_LICENSE("GPL");