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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * drivers/rtc/rtc-pl031.c
4 *
5 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
6 *
7 * Author: Deepak Saxena <[email protected]>
8 *
9 * Copyright 2006 (c) MontaVista Software, Inc.
10 *
11 * Author: Mian Yousaf Kaukab <[email protected]>
12 * Copyright 2010 (c) ST-Ericsson AB
13 */
14#include <linux/module.h>
15#include <linux/rtc.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/amba/bus.h>
19#include <linux/io.h>
20#include <linux/bcd.h>
21#include <linux/delay.h>
22#include <linux/pm_wakeirq.h>
23#include <linux/slab.h>
24
25/*
26 * Register definitions
27 */
28#define RTC_DR 0x00 /* Data read register */
29#define RTC_MR 0x04 /* Match register */
30#define RTC_LR 0x08 /* Data load register */
31#define RTC_CR 0x0c /* Control register */
32#define RTC_IMSC 0x10 /* Interrupt mask and set register */
33#define RTC_RIS 0x14 /* Raw interrupt status register */
34#define RTC_MIS 0x18 /* Masked interrupt status register */
35#define RTC_ICR 0x1c /* Interrupt clear register */
36/* ST variants have additional timer functionality */
37#define RTC_TDR 0x20 /* Timer data read register */
38#define RTC_TLR 0x24 /* Timer data load register */
39#define RTC_TCR 0x28 /* Timer control register */
40#define RTC_YDR 0x30 /* Year data read register */
41#define RTC_YMR 0x34 /* Year match register */
42#define RTC_YLR 0x38 /* Year data load register */
43
44#define RTC_CR_EN (1 << 0) /* counter enable bit */
45#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
46
47#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
48
49/* Common bit definitions for Interrupt status and control registers */
50#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
51#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
52
53/* Common bit definations for ST v2 for reading/writing time */
54#define RTC_SEC_SHIFT 0
55#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
56#define RTC_MIN_SHIFT 6
57#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
58#define RTC_HOUR_SHIFT 12
59#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
60#define RTC_WDAY_SHIFT 17
61#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
62#define RTC_MDAY_SHIFT 20
63#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
64#define RTC_MON_SHIFT 25
65#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
66
67#define RTC_TIMER_FREQ 32768
68
69/**
70 * struct pl031_vendor_data - per-vendor variations
71 * @ops: the vendor-specific operations used on this silicon version
72 * @clockwatch: if this is an ST Microelectronics silicon version with a
73 * clockwatch function
74 * @st_weekday: if this is an ST Microelectronics silicon version that need
75 * the weekday fix
76 * @irqflags: special IRQ flags per variant
77 * @range_min: minimum date/time supported by the RTC
78 * @range_max: maximum date/time supported by the RTC
79 */
80struct pl031_vendor_data {
81 struct rtc_class_ops ops;
82 bool clockwatch;
83 bool st_weekday;
84 unsigned long irqflags;
85 time64_t range_min;
86 timeu64_t range_max;
87};
88
89struct pl031_local {
90 struct pl031_vendor_data *vendor;
91 struct rtc_device *rtc;
92 void __iomem *base;
93};
94
95static int pl031_alarm_irq_enable(struct device *dev,
96 unsigned int enabled)
97{
98 struct pl031_local *ldata = dev_get_drvdata(dev);
99 unsigned long imsc;
100
101 /* Clear any pending alarm interrupts. */
102 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
103
104 imsc = readl(ldata->base + RTC_IMSC);
105
106 if (enabled == 1)
107 writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
108 else
109 writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
110
111 return 0;
112}
113
114/*
115 * Convert Gregorian date to ST v2 RTC format.
116 */
117static int pl031_stv2_tm_to_time(struct device *dev,
118 struct rtc_time *tm, unsigned long *st_time,
119 unsigned long *bcd_year)
120{
121 int year = tm->tm_year + 1900;
122 int wday = tm->tm_wday;
123
124 /* wday masking is not working in hardware so wday must be valid */
125 if (wday < -1 || wday > 6) {
126 dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
127 return -EINVAL;
128 } else if (wday == -1) {
129 /* wday is not provided, calculate it here */
130 struct rtc_time calc_tm;
131
132 rtc_time64_to_tm(rtc_tm_to_time64(tm), &calc_tm);
133 wday = calc_tm.tm_wday;
134 }
135
136 *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
137
138 *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
139 | (tm->tm_mday << RTC_MDAY_SHIFT)
140 | ((wday + 1) << RTC_WDAY_SHIFT)
141 | (tm->tm_hour << RTC_HOUR_SHIFT)
142 | (tm->tm_min << RTC_MIN_SHIFT)
143 | (tm->tm_sec << RTC_SEC_SHIFT);
144
145 return 0;
146}
147
148/*
149 * Convert ST v2 RTC format to Gregorian date.
150 */
151static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
152 struct rtc_time *tm)
153{
154 tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
155 tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
156 tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
157 tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
158 tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
159 tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
160 tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
161
162 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
163 tm->tm_year -= 1900;
164
165 return 0;
166}
167
168static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
169{
170 struct pl031_local *ldata = dev_get_drvdata(dev);
171
172 pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
173 readl(ldata->base + RTC_YDR), tm);
174
175 return 0;
176}
177
178static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
179{
180 unsigned long time;
181 unsigned long bcd_year;
182 struct pl031_local *ldata = dev_get_drvdata(dev);
183 int ret;
184
185 ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
186 if (ret == 0) {
187 writel(bcd_year, ldata->base + RTC_YLR);
188 writel(time, ldata->base + RTC_LR);
189 }
190
191 return ret;
192}
193
194static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
195{
196 struct pl031_local *ldata = dev_get_drvdata(dev);
197 int ret;
198
199 ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
200 readl(ldata->base + RTC_YMR), &alarm->time);
201
202 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
203 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
204
205 return ret;
206}
207
208static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
209{
210 struct pl031_local *ldata = dev_get_drvdata(dev);
211 unsigned long time;
212 unsigned long bcd_year;
213 int ret;
214
215 ret = pl031_stv2_tm_to_time(dev, &alarm->time,
216 &time, &bcd_year);
217 if (ret == 0) {
218 writel(bcd_year, ldata->base + RTC_YMR);
219 writel(time, ldata->base + RTC_MR);
220
221 pl031_alarm_irq_enable(dev, alarm->enabled);
222 }
223
224 return ret;
225}
226
227static irqreturn_t pl031_interrupt(int irq, void *dev_id)
228{
229 struct pl031_local *ldata = dev_id;
230 unsigned long rtcmis;
231 unsigned long events = 0;
232
233 rtcmis = readl(ldata->base + RTC_MIS);
234 if (rtcmis & RTC_BIT_AI) {
235 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
236 events |= (RTC_AF | RTC_IRQF);
237 rtc_update_irq(ldata->rtc, 1, events);
238
239 return IRQ_HANDLED;
240 }
241
242 return IRQ_NONE;
243}
244
245static int pl031_read_time(struct device *dev, struct rtc_time *tm)
246{
247 struct pl031_local *ldata = dev_get_drvdata(dev);
248
249 rtc_time64_to_tm(readl(ldata->base + RTC_DR), tm);
250
251 return 0;
252}
253
254static int pl031_set_time(struct device *dev, struct rtc_time *tm)
255{
256 struct pl031_local *ldata = dev_get_drvdata(dev);
257
258 writel(rtc_tm_to_time64(tm), ldata->base + RTC_LR);
259
260 return 0;
261}
262
263static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
264{
265 struct pl031_local *ldata = dev_get_drvdata(dev);
266
267 rtc_time64_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
268
269 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
270 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
271
272 return 0;
273}
274
275static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
276{
277 struct pl031_local *ldata = dev_get_drvdata(dev);
278
279 writel(rtc_tm_to_time64(&alarm->time), ldata->base + RTC_MR);
280 pl031_alarm_irq_enable(dev, alarm->enabled);
281
282 return 0;
283}
284
285static void pl031_remove(struct amba_device *adev)
286{
287 struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
288
289 if (adev->irq[0])
290 free_irq(adev->irq[0], ldata);
291 amba_release_regions(adev);
292}
293
294static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
295{
296 int ret;
297 struct pl031_local *ldata;
298 struct pl031_vendor_data *vendor = id->data;
299 struct rtc_class_ops *ops;
300 unsigned long time, data;
301
302 ret = amba_request_regions(adev, NULL);
303 if (ret)
304 goto err_req;
305
306 ldata = devm_kzalloc(&adev->dev, sizeof(struct pl031_local),
307 GFP_KERNEL);
308 ops = devm_kmemdup(&adev->dev, &vendor->ops, sizeof(vendor->ops),
309 GFP_KERNEL);
310 if (!ldata || !ops) {
311 ret = -ENOMEM;
312 goto out;
313 }
314
315 ldata->vendor = vendor;
316 ldata->base = devm_ioremap(&adev->dev, adev->res.start,
317 resource_size(&adev->res));
318 if (!ldata->base) {
319 ret = -ENOMEM;
320 goto out;
321 }
322
323 amba_set_drvdata(adev, ldata);
324
325 dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
326 dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
327
328 data = readl(ldata->base + RTC_CR);
329 /* Enable the clockwatch on ST Variants */
330 if (vendor->clockwatch)
331 data |= RTC_CR_CWEN;
332 else
333 data |= RTC_CR_EN;
334 writel(data, ldata->base + RTC_CR);
335
336 /*
337 * On ST PL031 variants, the RTC reset value does not provide correct
338 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
339 */
340 if (vendor->st_weekday) {
341 if (readl(ldata->base + RTC_YDR) == 0x2000) {
342 time = readl(ldata->base + RTC_DR);
343 if ((time &
344 (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
345 == 0x02120000) {
346 time = time | (0x7 << RTC_WDAY_SHIFT);
347 writel(0x2000, ldata->base + RTC_YLR);
348 writel(time, ldata->base + RTC_LR);
349 }
350 }
351 }
352
353 devm_device_init_wakeup(&adev->dev);
354 ldata->rtc = devm_rtc_allocate_device(&adev->dev);
355 if (IS_ERR(ldata->rtc)) {
356 ret = PTR_ERR(ldata->rtc);
357 goto out;
358 }
359
360 if (!adev->irq[0])
361 clear_bit(RTC_FEATURE_ALARM, ldata->rtc->features);
362
363 ldata->rtc->ops = ops;
364 ldata->rtc->range_min = vendor->range_min;
365 ldata->rtc->range_max = vendor->range_max;
366
367 ret = devm_rtc_register_device(ldata->rtc);
368 if (ret)
369 goto out;
370
371 if (adev->irq[0]) {
372 ret = request_irq(adev->irq[0], pl031_interrupt,
373 vendor->irqflags, "rtc-pl031", ldata);
374 if (ret)
375 goto out;
376 devm_pm_set_wake_irq(&adev->dev, adev->irq[0]);
377 }
378 return 0;
379
380out:
381 amba_release_regions(adev);
382err_req:
383
384 return ret;
385}
386
387/* Operations for the original ARM version */
388static struct pl031_vendor_data arm_pl031 = {
389 .ops = {
390 .read_time = pl031_read_time,
391 .set_time = pl031_set_time,
392 .read_alarm = pl031_read_alarm,
393 .set_alarm = pl031_set_alarm,
394 .alarm_irq_enable = pl031_alarm_irq_enable,
395 },
396 .range_max = U32_MAX,
397};
398
399/* The First ST derivative */
400static struct pl031_vendor_data stv1_pl031 = {
401 .ops = {
402 .read_time = pl031_read_time,
403 .set_time = pl031_set_time,
404 .read_alarm = pl031_read_alarm,
405 .set_alarm = pl031_set_alarm,
406 .alarm_irq_enable = pl031_alarm_irq_enable,
407 },
408 .clockwatch = true,
409 .st_weekday = true,
410 .range_max = U32_MAX,
411};
412
413/* And the second ST derivative */
414static struct pl031_vendor_data stv2_pl031 = {
415 .ops = {
416 .read_time = pl031_stv2_read_time,
417 .set_time = pl031_stv2_set_time,
418 .read_alarm = pl031_stv2_read_alarm,
419 .set_alarm = pl031_stv2_set_alarm,
420 .alarm_irq_enable = pl031_alarm_irq_enable,
421 },
422 .clockwatch = true,
423 .st_weekday = true,
424 /*
425 * This variant shares the IRQ with another block and must not
426 * suspend that IRQ line.
427 * TODO check if it shares with IRQF_NO_SUSPEND user, else we can
428 * remove IRQF_COND_SUSPEND
429 */
430 .irqflags = IRQF_SHARED | IRQF_COND_SUSPEND,
431 .range_min = RTC_TIMESTAMP_BEGIN_0000,
432 .range_max = RTC_TIMESTAMP_END_9999,
433};
434
435static const struct amba_id pl031_ids[] = {
436 {
437 .id = 0x00041031,
438 .mask = 0x000fffff,
439 .data = &arm_pl031,
440 },
441 /* ST Micro variants */
442 {
443 .id = 0x00180031,
444 .mask = 0x00ffffff,
445 .data = &stv1_pl031,
446 },
447 {
448 .id = 0x00280031,
449 .mask = 0x00ffffff,
450 .data = &stv2_pl031,
451 },
452 {0, 0},
453};
454
455MODULE_DEVICE_TABLE(amba, pl031_ids);
456
457static struct amba_driver pl031_driver = {
458 .drv = {
459 .name = "rtc-pl031",
460 },
461 .id_table = pl031_ids,
462 .probe = pl031_probe,
463 .remove = pl031_remove,
464};
465
466module_amba_driver(pl031_driver);
467
468MODULE_AUTHOR("Deepak Saxena <[email protected]>");
469MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
470MODULE_LICENSE("GPL");