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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * EPSON TOYOCOM RTC-7301SF/DG Driver
4 *
5 * Copyright (c) 2016 Akinobu Mita <[email protected]>
6 *
7 * Based on rtc-rp5c01.c
8 *
9 * Datasheet: http://www5.epsondevice.com/en/products/parallel/rtc7301sf.html
10 */
11
12#include <linux/io.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/delay.h>
16#include <linux/property.h>
17#include <linux/regmap.h>
18#include <linux/platform_device.h>
19#include <linux/rtc.h>
20
21#define DRV_NAME "rtc-r7301"
22
23#define RTC7301_1_SEC 0x0 /* Bank 0 and Band 1 */
24#define RTC7301_10_SEC 0x1 /* Bank 0 and Band 1 */
25#define RTC7301_AE BIT(3)
26#define RTC7301_1_MIN 0x2 /* Bank 0 and Band 1 */
27#define RTC7301_10_MIN 0x3 /* Bank 0 and Band 1 */
28#define RTC7301_1_HOUR 0x4 /* Bank 0 and Band 1 */
29#define RTC7301_10_HOUR 0x5 /* Bank 0 and Band 1 */
30#define RTC7301_DAY_OF_WEEK 0x6 /* Bank 0 and Band 1 */
31#define RTC7301_1_DAY 0x7 /* Bank 0 and Band 1 */
32#define RTC7301_10_DAY 0x8 /* Bank 0 and Band 1 */
33#define RTC7301_1_MONTH 0x9 /* Bank 0 */
34#define RTC7301_10_MONTH 0xa /* Bank 0 */
35#define RTC7301_1_YEAR 0xb /* Bank 0 */
36#define RTC7301_10_YEAR 0xc /* Bank 0 */
37#define RTC7301_100_YEAR 0xd /* Bank 0 */
38#define RTC7301_1000_YEAR 0xe /* Bank 0 */
39#define RTC7301_ALARM_CONTROL 0xe /* Bank 1 */
40#define RTC7301_ALARM_CONTROL_AIE BIT(0)
41#define RTC7301_ALARM_CONTROL_AF BIT(1)
42#define RTC7301_TIMER_CONTROL 0xe /* Bank 2 */
43#define RTC7301_TIMER_CONTROL_TIE BIT(0)
44#define RTC7301_TIMER_CONTROL_TF BIT(1)
45#define RTC7301_CONTROL 0xf /* All banks */
46#define RTC7301_CONTROL_BUSY BIT(0)
47#define RTC7301_CONTROL_STOP BIT(1)
48#define RTC7301_CONTROL_BANK_SEL_0 BIT(2)
49#define RTC7301_CONTROL_BANK_SEL_1 BIT(3)
50
51struct rtc7301_priv {
52 struct regmap *regmap;
53 int irq;
54 spinlock_t lock;
55 u8 bank;
56};
57
58/*
59 * When the device is memory-mapped, some platforms pack the registers into
60 * 32-bit access using the lower 8 bits at each 4-byte stride, while others
61 * expose them as simply consecutive bytes.
62 */
63static const struct regmap_config rtc7301_regmap_32_config = {
64 .reg_bits = 32,
65 .val_bits = 8,
66 .reg_stride = 4,
67};
68
69static const struct regmap_config rtc7301_regmap_8_config = {
70 .reg_bits = 8,
71 .val_bits = 8,
72 .reg_stride = 1,
73};
74
75static u8 rtc7301_read(struct rtc7301_priv *priv, unsigned int reg)
76{
77 int reg_stride = regmap_get_reg_stride(priv->regmap);
78 unsigned int val;
79
80 regmap_read(priv->regmap, reg_stride * reg, &val);
81
82 return val & 0xf;
83}
84
85static void rtc7301_write(struct rtc7301_priv *priv, u8 val, unsigned int reg)
86{
87 int reg_stride = regmap_get_reg_stride(priv->regmap);
88
89 regmap_write(priv->regmap, reg_stride * reg, val);
90}
91
92static void rtc7301_update_bits(struct rtc7301_priv *priv, unsigned int reg,
93 u8 mask, u8 val)
94{
95 int reg_stride = regmap_get_reg_stride(priv->regmap);
96
97 regmap_update_bits(priv->regmap, reg_stride * reg, mask, val);
98}
99
100static int rtc7301_wait_while_busy(struct rtc7301_priv *priv)
101{
102 int retries = 100;
103
104 while (retries-- > 0) {
105 u8 val;
106
107 val = rtc7301_read(priv, RTC7301_CONTROL);
108 if (!(val & RTC7301_CONTROL_BUSY))
109 return 0;
110
111 udelay(300);
112 }
113
114 return -ETIMEDOUT;
115}
116
117static void rtc7301_stop(struct rtc7301_priv *priv)
118{
119 rtc7301_update_bits(priv, RTC7301_CONTROL, RTC7301_CONTROL_STOP,
120 RTC7301_CONTROL_STOP);
121}
122
123static void rtc7301_start(struct rtc7301_priv *priv)
124{
125 rtc7301_update_bits(priv, RTC7301_CONTROL, RTC7301_CONTROL_STOP, 0);
126}
127
128static void rtc7301_select_bank(struct rtc7301_priv *priv, u8 bank)
129{
130 u8 val = 0;
131
132 if (bank == priv->bank)
133 return;
134
135 if (bank & BIT(0))
136 val |= RTC7301_CONTROL_BANK_SEL_0;
137 if (bank & BIT(1))
138 val |= RTC7301_CONTROL_BANK_SEL_1;
139
140 rtc7301_update_bits(priv, RTC7301_CONTROL,
141 RTC7301_CONTROL_BANK_SEL_0 |
142 RTC7301_CONTROL_BANK_SEL_1, val);
143
144 priv->bank = bank;
145}
146
147static void rtc7301_get_time(struct rtc7301_priv *priv, struct rtc_time *tm,
148 bool alarm)
149{
150 int year;
151
152 tm->tm_sec = rtc7301_read(priv, RTC7301_1_SEC);
153 tm->tm_sec += (rtc7301_read(priv, RTC7301_10_SEC) & ~RTC7301_AE) * 10;
154 tm->tm_min = rtc7301_read(priv, RTC7301_1_MIN);
155 tm->tm_min += (rtc7301_read(priv, RTC7301_10_MIN) & ~RTC7301_AE) * 10;
156 tm->tm_hour = rtc7301_read(priv, RTC7301_1_HOUR);
157 tm->tm_hour += (rtc7301_read(priv, RTC7301_10_HOUR) & ~RTC7301_AE) * 10;
158 tm->tm_mday = rtc7301_read(priv, RTC7301_1_DAY);
159 tm->tm_mday += (rtc7301_read(priv, RTC7301_10_DAY) & ~RTC7301_AE) * 10;
160
161 if (alarm) {
162 tm->tm_wday = -1;
163 tm->tm_mon = -1;
164 tm->tm_year = -1;
165 tm->tm_yday = -1;
166 tm->tm_isdst = -1;
167 return;
168 }
169
170 tm->tm_wday = (rtc7301_read(priv, RTC7301_DAY_OF_WEEK) & ~RTC7301_AE);
171 tm->tm_mon = rtc7301_read(priv, RTC7301_10_MONTH) * 10 +
172 rtc7301_read(priv, RTC7301_1_MONTH) - 1;
173 year = rtc7301_read(priv, RTC7301_1000_YEAR) * 1000 +
174 rtc7301_read(priv, RTC7301_100_YEAR) * 100 +
175 rtc7301_read(priv, RTC7301_10_YEAR) * 10 +
176 rtc7301_read(priv, RTC7301_1_YEAR);
177
178 tm->tm_year = year - 1900;
179}
180
181static void rtc7301_write_time(struct rtc7301_priv *priv, struct rtc_time *tm,
182 bool alarm)
183{
184 int year;
185
186 rtc7301_write(priv, tm->tm_sec % 10, RTC7301_1_SEC);
187 rtc7301_write(priv, tm->tm_sec / 10, RTC7301_10_SEC);
188
189 rtc7301_write(priv, tm->tm_min % 10, RTC7301_1_MIN);
190 rtc7301_write(priv, tm->tm_min / 10, RTC7301_10_MIN);
191
192 rtc7301_write(priv, tm->tm_hour % 10, RTC7301_1_HOUR);
193 rtc7301_write(priv, tm->tm_hour / 10, RTC7301_10_HOUR);
194
195 rtc7301_write(priv, tm->tm_mday % 10, RTC7301_1_DAY);
196 rtc7301_write(priv, tm->tm_mday / 10, RTC7301_10_DAY);
197
198 /* Don't care for alarm register */
199 rtc7301_write(priv, alarm ? RTC7301_AE : tm->tm_wday,
200 RTC7301_DAY_OF_WEEK);
201
202 if (alarm)
203 return;
204
205 rtc7301_write(priv, (tm->tm_mon + 1) % 10, RTC7301_1_MONTH);
206 rtc7301_write(priv, (tm->tm_mon + 1) / 10, RTC7301_10_MONTH);
207
208 year = tm->tm_year + 1900;
209
210 rtc7301_write(priv, year % 10, RTC7301_1_YEAR);
211 rtc7301_write(priv, (year / 10) % 10, RTC7301_10_YEAR);
212 rtc7301_write(priv, (year / 100) % 10, RTC7301_100_YEAR);
213 rtc7301_write(priv, year / 1000, RTC7301_1000_YEAR);
214}
215
216static void rtc7301_alarm_irq(struct rtc7301_priv *priv, unsigned int enabled)
217{
218 rtc7301_update_bits(priv, RTC7301_ALARM_CONTROL,
219 RTC7301_ALARM_CONTROL_AF |
220 RTC7301_ALARM_CONTROL_AIE,
221 enabled ? RTC7301_ALARM_CONTROL_AIE : 0);
222}
223
224static int rtc7301_read_time(struct device *dev, struct rtc_time *tm)
225{
226 struct rtc7301_priv *priv = dev_get_drvdata(dev);
227 unsigned long flags;
228 int err;
229
230 spin_lock_irqsave(&priv->lock, flags);
231
232 rtc7301_select_bank(priv, 0);
233
234 err = rtc7301_wait_while_busy(priv);
235 if (!err)
236 rtc7301_get_time(priv, tm, false);
237
238 spin_unlock_irqrestore(&priv->lock, flags);
239
240 return err;
241}
242
243static int rtc7301_set_time(struct device *dev, struct rtc_time *tm)
244{
245 struct rtc7301_priv *priv = dev_get_drvdata(dev);
246 unsigned long flags;
247
248 spin_lock_irqsave(&priv->lock, flags);
249
250 rtc7301_stop(priv);
251 udelay(300);
252 rtc7301_select_bank(priv, 0);
253 rtc7301_write_time(priv, tm, false);
254 rtc7301_start(priv);
255
256 spin_unlock_irqrestore(&priv->lock, flags);
257
258 return 0;
259}
260
261static int rtc7301_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
262{
263 struct rtc7301_priv *priv = dev_get_drvdata(dev);
264 unsigned long flags;
265 u8 alrm_ctrl;
266
267 if (priv->irq <= 0)
268 return -EINVAL;
269
270 spin_lock_irqsave(&priv->lock, flags);
271
272 rtc7301_select_bank(priv, 1);
273 rtc7301_get_time(priv, &alarm->time, true);
274
275 alrm_ctrl = rtc7301_read(priv, RTC7301_ALARM_CONTROL);
276
277 alarm->enabled = !!(alrm_ctrl & RTC7301_ALARM_CONTROL_AIE);
278 alarm->pending = !!(alrm_ctrl & RTC7301_ALARM_CONTROL_AF);
279
280 spin_unlock_irqrestore(&priv->lock, flags);
281
282 return 0;
283}
284
285static int rtc7301_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
286{
287 struct rtc7301_priv *priv = dev_get_drvdata(dev);
288 unsigned long flags;
289
290 if (priv->irq <= 0)
291 return -EINVAL;
292
293 spin_lock_irqsave(&priv->lock, flags);
294
295 rtc7301_select_bank(priv, 1);
296 rtc7301_write_time(priv, &alarm->time, true);
297 rtc7301_alarm_irq(priv, alarm->enabled);
298
299 spin_unlock_irqrestore(&priv->lock, flags);
300
301 return 0;
302}
303
304static int rtc7301_alarm_irq_enable(struct device *dev, unsigned int enabled)
305{
306 struct rtc7301_priv *priv = dev_get_drvdata(dev);
307 unsigned long flags;
308
309 if (priv->irq <= 0)
310 return -EINVAL;
311
312 spin_lock_irqsave(&priv->lock, flags);
313
314 rtc7301_select_bank(priv, 1);
315 rtc7301_alarm_irq(priv, enabled);
316
317 spin_unlock_irqrestore(&priv->lock, flags);
318
319 return 0;
320}
321
322static const struct rtc_class_ops rtc7301_rtc_ops = {
323 .read_time = rtc7301_read_time,
324 .set_time = rtc7301_set_time,
325 .read_alarm = rtc7301_read_alarm,
326 .set_alarm = rtc7301_set_alarm,
327 .alarm_irq_enable = rtc7301_alarm_irq_enable,
328};
329
330static irqreturn_t rtc7301_irq_handler(int irq, void *dev_id)
331{
332 struct rtc_device *rtc = dev_id;
333 struct rtc7301_priv *priv = dev_get_drvdata(rtc->dev.parent);
334 irqreturn_t ret = IRQ_NONE;
335 u8 alrm_ctrl;
336
337 spin_lock(&priv->lock);
338
339 rtc7301_select_bank(priv, 1);
340
341 alrm_ctrl = rtc7301_read(priv, RTC7301_ALARM_CONTROL);
342 if (alrm_ctrl & RTC7301_ALARM_CONTROL_AF) {
343 ret = IRQ_HANDLED;
344 rtc7301_alarm_irq(priv, false);
345 rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF);
346 }
347
348 spin_unlock(&priv->lock);
349
350 return ret;
351}
352
353static void rtc7301_init(struct rtc7301_priv *priv)
354{
355 unsigned long flags;
356
357 spin_lock_irqsave(&priv->lock, flags);
358
359 rtc7301_select_bank(priv, 2);
360 rtc7301_write(priv, 0, RTC7301_TIMER_CONTROL);
361
362 spin_unlock_irqrestore(&priv->lock, flags);
363}
364
365static int __init rtc7301_rtc_probe(struct platform_device *dev)
366{
367 void __iomem *regs;
368 struct rtc7301_priv *priv;
369 struct rtc_device *rtc;
370 static const struct regmap_config *mapconf;
371 int ret;
372 u32 val;
373
374 priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
375 if (!priv)
376 return -ENOMEM;
377
378 regs = devm_platform_ioremap_resource(dev, 0);
379 if (IS_ERR(regs))
380 return PTR_ERR(regs);
381
382 ret = device_property_read_u32(&dev->dev, "reg-io-width", &val);
383 if (ret)
384 /* Default to 32bit accesses */
385 val = 4;
386
387 switch (val) {
388 case 1:
389 mapconf = &rtc7301_regmap_8_config;
390 break;
391 case 4:
392 mapconf = &rtc7301_regmap_32_config;
393 break;
394 default:
395 dev_err(&dev->dev, "invalid reg-io-width %d\n", val);
396 return -EINVAL;
397 }
398
399 priv->regmap = devm_regmap_init_mmio(&dev->dev, regs,
400 mapconf);
401 if (IS_ERR(priv->regmap))
402 return PTR_ERR(priv->regmap);
403
404 priv->irq = platform_get_irq(dev, 0);
405
406 spin_lock_init(&priv->lock);
407 priv->bank = -1;
408
409 rtc7301_init(priv);
410
411 platform_set_drvdata(dev, priv);
412
413 rtc = devm_rtc_device_register(&dev->dev, DRV_NAME, &rtc7301_rtc_ops,
414 THIS_MODULE);
415 if (IS_ERR(rtc))
416 return PTR_ERR(rtc);
417
418 if (priv->irq > 0) {
419 ret = devm_request_irq(&dev->dev, priv->irq,
420 rtc7301_irq_handler, IRQF_SHARED,
421 dev_name(&dev->dev), rtc);
422 if (ret) {
423 priv->irq = 0;
424 dev_err(&dev->dev, "unable to request IRQ\n");
425 } else {
426 device_set_wakeup_capable(&dev->dev, true);
427 }
428 }
429
430 return 0;
431}
432
433#ifdef CONFIG_PM_SLEEP
434
435static int rtc7301_suspend(struct device *dev)
436{
437 struct rtc7301_priv *priv = dev_get_drvdata(dev);
438
439 if (device_may_wakeup(dev))
440 enable_irq_wake(priv->irq);
441
442 return 0;
443}
444
445static int rtc7301_resume(struct device *dev)
446{
447 struct rtc7301_priv *priv = dev_get_drvdata(dev);
448
449 if (device_may_wakeup(dev))
450 disable_irq_wake(priv->irq);
451
452 return 0;
453}
454
455#endif
456
457static SIMPLE_DEV_PM_OPS(rtc7301_pm_ops, rtc7301_suspend, rtc7301_resume);
458
459static const struct of_device_id rtc7301_dt_match[] = {
460 { .compatible = "epson,rtc7301sf" },
461 { .compatible = "epson,rtc7301dg" },
462 {}
463};
464MODULE_DEVICE_TABLE(of, rtc7301_dt_match);
465
466static struct platform_driver rtc7301_rtc_driver = {
467 .driver = {
468 .name = DRV_NAME,
469 .of_match_table = rtc7301_dt_match,
470 .pm = &rtc7301_pm_ops,
471 },
472};
473
474module_platform_driver_probe(rtc7301_rtc_driver, rtc7301_rtc_probe);
475
476MODULE_AUTHOR("Akinobu Mita <[email protected]>");
477MODULE_LICENSE("GPL");
478MODULE_DESCRIPTION("EPSON TOYOCOM RTC-7301SF/DG Driver");
479MODULE_ALIAS("platform:rtc-r7301");