| 1 | |
| 2 | |
| 3 | * Driver for Epson RX8111 RTC.
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| 4 | *
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| 5 | * Copyright (C) 2023 Axis Communications AB
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| 6 |
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| 7 |
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| 8 | #include <linux/bcd.h>
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| 9 | #include <linux/bitfield.h>
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| 10 | #include <linux/i2c.h>
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| 11 | #include <linux/module.h>
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| 12 | #include <linux/regmap.h>
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| 13 |
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| 14 | #include <linux/rtc.h>
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| 15 |
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| 16 | #define RX8111_REG_SEC 0x10
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| 17 | #define RX8111_REG_MIN 0x11
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| 18 | #define RX8111_REG_HOUR 0x12
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| 19 | #define RX8111_REG_WEEK 0x13
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| 20 | #define RX8111_REG_DAY 0x14
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| 21 | #define RX8111_REG_MONTH 0x15
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| 22 | #define RX8111_REG_YEAR 0x16
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| 23 |
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| 24 | #define RX8111_REG_ALARM_MIN 0x17
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| 25 | #define RX8111_REG_ALARM_HOUR 0x18
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| 26 | #define RX8111_REG_ALARM_WEEK_DAY 0x19
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| 27 |
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| 28 | #define RX8111_REG_TIMER_COUNTER0 0x1a
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| 29 | #define RX8111_REG_TIMER_COUNTER1 0x1b
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| 30 | #define RX8111_REG_TIMER_COUNTER2 0x1c
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| 31 |
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| 32 | #define RX8111_REG_EXT 0x1d
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| 33 | #define RX8111_REG_FLAG 0x1e
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| 34 | #define RX8111_REG_CTRL 0x1f
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| 35 |
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| 36 | #define RX8111_REG_TS_1_1000_SEC 0x20
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| 37 | #define RX8111_REG_TS_1_100_SEC 0x21
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| 38 | #define RX8111_REG_TS_SEC 0x22
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| 39 | #define RX8111_REG_TS_MIN 0x23
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| 40 | #define RX8111_REG_TS_HOUR 0x24
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| 41 | #define RX8111_REG_TS_WEEK 0x25
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| 42 | #define RX8111_REG_TS_DAY 0x26
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| 43 | #define RX8111_REG_TS_MONTH 0x27
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| 44 | #define RX8111_REG_TS_YEAR 0x28
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| 45 | #define RX8111_REG_TS_STATUS 0x29
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| 46 |
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| 47 | #define RX8111_REG_EVIN_SETTING 0x2b
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| 48 | #define RX8111_REG_ALARM_SEC 0x2c
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| 49 | #define RX8111_REG_TIMER_CTRL 0x2d
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| 50 | #define RX8111_REG_TS_CTRL0 0x2e
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| 51 | #define RX8111_REG_CMD_TRIGGER 0x2f
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| 52 | #define RX8111_REG_PWR_SWITCH_CTRL 0x32
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| 53 | #define RX8111_REG_STATUS_MON 0x33
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| 54 | #define RX8111_REG_TS_CTRL1 0x34
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| 55 | #define RX8111_REG_TS_CTRL2 0x35
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| 56 | #define RX8111_REG_TS_CTRL3 0x36
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| 57 |
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| 58 | #define RX8111_FLAG_XST_BIT BIT(0)
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| 59 | #define RX8111_FLAG_VLF_BIT BIT(1)
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| 60 |
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| 61 | #define RX8111_TIME_BUF_SZ (RX8111_REG_YEAR - RX8111_REG_SEC + 1)
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| 62 |
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| 63 | enum rx8111_regfield {
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| 64 |
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| 65 | RX8111_REGF_TSEL0,
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| 66 | RX8111_REGF_TSEL1,
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| 67 | RX8111_REGF_ETS,
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| 68 | RX8111_REGF_WADA,
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| 69 | RX8111_REGF_TE,
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| 70 | RX8111_REGF_USEL,
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| 71 | RX8111_REGF_FSEL0,
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| 72 | RX8111_REGF_FSEL1,
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| 73 |
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| 74 |
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| 75 | RX8111_REGF_XST,
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| 76 | RX8111_REGF_VLF,
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| 77 | RX8111_REGF_EVF,
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| 78 | RX8111_REGF_AF,
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| 79 | RX8111_REGF_TF,
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| 80 | RX8111_REGF_UF,
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| 81 | RX8111_REGF_POR,
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| 82 |
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| 83 |
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| 84 | RX8111_REGF_STOP,
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| 85 | RX8111_REGF_EIE,
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| 86 | RX8111_REGF_AIE,
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| 87 | RX8111_REGF_TIE,
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| 88 | RX8111_REGF_UIE,
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| 89 |
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| 90 |
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| 91 | RX8111_REGF_SMPT0,
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| 92 | RX8111_REGF_SMPT1,
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| 93 | RX8111_REGF_SWSEL0,
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| 94 | RX8111_REGF_SWSEL1,
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| 95 | RX8111_REGF_INIEN,
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| 96 | RX8111_REGF_CHGEN,
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| 97 |
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| 98 |
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| 99 | RX8111_REGF_VLOW,
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| 100 |
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| 101 |
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| 102 | RX8111_REGF_MAX
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| 103 | };
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| 104 |
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| 105 | static const struct reg_field rx8111_regfields[] = {
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| 106 | [RX8111_REGF_TSEL0] = REG_FIELD(RX8111_REG_EXT, 0, 0),
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| 107 | [RX8111_REGF_TSEL1] = REG_FIELD(RX8111_REG_EXT, 1, 1),
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| 108 | [RX8111_REGF_ETS] = REG_FIELD(RX8111_REG_EXT, 2, 2),
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| 109 | [RX8111_REGF_WADA] = REG_FIELD(RX8111_REG_EXT, 3, 3),
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| 110 | [RX8111_REGF_TE] = REG_FIELD(RX8111_REG_EXT, 4, 4),
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| 111 | [RX8111_REGF_USEL] = REG_FIELD(RX8111_REG_EXT, 5, 5),
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| 112 | [RX8111_REGF_FSEL0] = REG_FIELD(RX8111_REG_EXT, 6, 6),
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| 113 | [RX8111_REGF_FSEL1] = REG_FIELD(RX8111_REG_EXT, 7, 7),
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| 114 |
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| 115 | [RX8111_REGF_XST] = REG_FIELD(RX8111_REG_FLAG, 0, 0),
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| 116 | [RX8111_REGF_VLF] = REG_FIELD(RX8111_REG_FLAG, 1, 1),
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| 117 | [RX8111_REGF_EVF] = REG_FIELD(RX8111_REG_FLAG, 2, 2),
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| 118 | [RX8111_REGF_AF] = REG_FIELD(RX8111_REG_FLAG, 3, 3),
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| 119 | [RX8111_REGF_TF] = REG_FIELD(RX8111_REG_FLAG, 4, 4),
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| 120 | [RX8111_REGF_UF] = REG_FIELD(RX8111_REG_FLAG, 5, 5),
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| 121 | [RX8111_REGF_POR] = REG_FIELD(RX8111_REG_FLAG, 7, 7),
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| 122 |
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| 123 | [RX8111_REGF_STOP] = REG_FIELD(RX8111_REG_CTRL, 0, 0),
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| 124 | [RX8111_REGF_EIE] = REG_FIELD(RX8111_REG_CTRL, 2, 2),
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| 125 | [RX8111_REGF_AIE] = REG_FIELD(RX8111_REG_CTRL, 3, 3),
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| 126 | [RX8111_REGF_TIE] = REG_FIELD(RX8111_REG_CTRL, 4, 4),
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| 127 | [RX8111_REGF_UIE] = REG_FIELD(RX8111_REG_CTRL, 5, 5),
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| 128 |
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| 129 | [RX8111_REGF_SMPT0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 0, 0),
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| 130 | [RX8111_REGF_SMPT1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 1, 1),
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| 131 | [RX8111_REGF_SWSEL0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 2, 2),
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| 132 | [RX8111_REGF_SWSEL1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 3, 3),
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| 133 | [RX8111_REGF_INIEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 6, 6),
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| 134 | [RX8111_REGF_CHGEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 7, 7),
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| 135 |
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| 136 | [RX8111_REGF_VLOW] = REG_FIELD(RX8111_REG_STATUS_MON, 1, 1),
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| 137 | };
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| 138 |
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| 139 | static const struct regmap_config rx8111_regmap_config = {
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| 140 | .reg_bits = 8,
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| 141 | .val_bits = 8,
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| 142 | .max_register = RX8111_REG_TS_CTRL3,
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| 143 | };
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| 144 |
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| 145 | struct rx8111_data {
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| 146 | struct regmap *regmap;
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| 147 | struct regmap_field *regfields[RX8111_REGF_MAX];
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| 148 | struct device *dev;
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| 149 | struct rtc_device *rtc;
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| 150 | };
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| 151 |
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| 152 | static int rx8111_read_vl_flag(struct rx8111_data *data, unsigned int *vlval)
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| 153 | {
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| 154 | int ret;
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| 155 |
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| 156 | ret = regmap_field_read(data->regfields[RX8111_REGF_VLF], vlval);
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| 157 | if (ret)
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| 158 | dev_dbg(data->dev, "Could not read VL flag (%d)", ret);
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| 159 |
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| 160 | return ret;
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| 161 | }
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| 162 |
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| 163 | static int rx8111_read_time(struct device *dev, struct rtc_time *tm)
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| 164 | {
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| 165 | struct rx8111_data *data = dev_get_drvdata(dev);
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| 166 | u8 buf[RX8111_TIME_BUF_SZ];
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| 167 | unsigned int regval;
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| 168 | int ret;
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| 169 |
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| 170 |
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| 171 | ret = regmap_read(data->regmap, RX8111_REG_FLAG, ®val);
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| 172 | if (ret) {
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| 173 | dev_dbg(data->dev, "Could not read flag register (%d)\n", ret);
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| 174 | return ret;
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| 175 | }
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| 176 |
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| 177 | if (FIELD_GET(RX8111_FLAG_XST_BIT, regval)) {
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| 178 | dev_dbg(data->dev,
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| 179 | "Crystal oscillation stopped, time is not reliable\n");
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| 180 | return -EINVAL;
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| 181 | }
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| 182 |
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| 183 | if (FIELD_GET(RX8111_FLAG_VLF_BIT, regval)) {
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| 184 | dev_dbg(data->dev,
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| 185 | "Low voltage detected, time is not reliable\n");
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| 186 | return -EINVAL;
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| 187 | }
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| 188 |
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| 189 | ret = regmap_field_read(data->regfields[RX8111_REGF_STOP], ®val);
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| 190 | if (ret) {
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| 191 | dev_dbg(data->dev, "Could not read clock status (%d)\n", ret);
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| 192 | return ret;
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| 193 | }
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| 194 |
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| 195 | if (regval) {
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| 196 | dev_dbg(data->dev, "Clock stopped, time is not reliable\n");
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| 197 | return -EINVAL;
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| 198 | }
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| 199 |
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| 200 |
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| 201 | ret = regmap_bulk_read(data->regmap, RX8111_REG_SEC, buf,
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| 202 | ARRAY_SIZE(buf));
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| 203 | if (ret) {
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| 204 | dev_dbg(data->dev, "Could not bulk read time (%d)\n", ret);
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| 205 | return ret;
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| 206 | }
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| 207 |
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| 208 | tm->tm_sec = bcd2bin(buf[0]);
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| 209 | tm->tm_min = bcd2bin(buf[1]);
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| 210 | tm->tm_hour = bcd2bin(buf[2]);
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| 211 | tm->tm_wday = ffs(buf[3]) - 1;
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| 212 | tm->tm_mday = bcd2bin(buf[4]);
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| 213 | tm->tm_mon = bcd2bin(buf[5]) - 1;
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| 214 | tm->tm_year = bcd2bin(buf[6]) + 100;
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| 215 |
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| 216 | return 0;
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| 217 | }
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| 218 |
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| 219 | static int rx8111_set_time(struct device *dev, struct rtc_time *tm)
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| 220 | {
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| 221 | struct rx8111_data *data = dev_get_drvdata(dev);
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| 222 | u8 buf[RX8111_TIME_BUF_SZ];
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| 223 | int ret;
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| 224 |
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| 225 | buf[0] = bin2bcd(tm->tm_sec);
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| 226 | buf[1] = bin2bcd(tm->tm_min);
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| 227 | buf[2] = bin2bcd(tm->tm_hour);
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| 228 | buf[3] = BIT(tm->tm_wday);
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| 229 | buf[4] = bin2bcd(tm->tm_mday);
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| 230 | buf[5] = bin2bcd(tm->tm_mon + 1);
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| 231 | buf[6] = bin2bcd(tm->tm_year - 100);
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| 232 |
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| 233 | ret = regmap_clear_bits(data->regmap, RX8111_REG_FLAG,
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| 234 | RX8111_FLAG_XST_BIT | RX8111_FLAG_VLF_BIT);
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| 235 | if (ret)
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| 236 | return ret;
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| 237 |
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| 238 |
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| 239 | ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 1);
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| 240 | if (ret) {
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| 241 | dev_dbg(data->dev, "Could not stop the clock (%d)\n", ret);
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| 242 | return ret;
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| 243 | }
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| 244 |
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| 245 |
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| 246 | ret = regmap_bulk_write(data->regmap, RX8111_REG_SEC, buf,
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| 247 | ARRAY_SIZE(buf));
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| 248 | if (ret) {
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| 249 | dev_dbg(data->dev, "Could not bulk write time (%d)\n", ret);
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| 250 |
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| 251 | |
| 252 | * We don't bother with trying to start the clock again. We
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| 253 | * check for this in rx8111_read_time() (and thus force user to
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| 254 | * call rx8111_set_time() to try again).
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| 255 |
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| 256 | return ret;
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| 257 | }
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| 258 |
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| 259 |
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| 260 | ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 0);
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| 261 | if (ret) {
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| 262 | dev_dbg(data->dev, "Could not start the clock (%d)\n", ret);
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| 263 | return ret;
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| 264 | }
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| 265 |
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| 266 | return 0;
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| 267 | }
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| 268 |
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| 269 | static int rx8111_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
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| 270 | {
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| 271 | struct rx8111_data *data = dev_get_drvdata(dev);
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| 272 | unsigned int regval;
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| 273 | unsigned int vlval;
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| 274 | int ret;
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| 275 |
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| 276 | switch (cmd) {
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| 277 | case RTC_VL_READ:
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| 278 | ret = rx8111_read_vl_flag(data, ®val);
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| 279 | if (ret)
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| 280 | return ret;
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| 281 |
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| 282 | vlval = regval ? RTC_VL_DATA_INVALID : 0;
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| 283 |
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| 284 | ret = regmap_field_read(data->regfields[RX8111_REGF_VLOW],
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| 285 | ®val);
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| 286 | if (ret)
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| 287 | return ret;
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| 288 |
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| 289 | vlval |= regval ? RTC_VL_BACKUP_LOW : 0;
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| 290 |
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| 291 | return put_user(vlval, (typeof(vlval) __user *)arg);
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| 292 | default:
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| 293 | return -ENOIOCTLCMD;
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| 294 | }
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| 295 | }
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| 296 |
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| 297 | static const struct rtc_class_ops rx8111_rtc_ops = {
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| 298 | .read_time = rx8111_read_time,
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| 299 | .set_time = rx8111_set_time,
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| 300 | .ioctl = rx8111_ioctl,
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| 301 | };
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| 302 |
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| 303 | static int rx8111_probe(struct i2c_client *client)
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| 304 | {
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| 305 | struct rx8111_data *data;
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| 306 | struct rtc_device *rtc;
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| 307 | size_t i;
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| 308 |
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| 309 | data = devm_kmalloc(&client->dev, sizeof(*data), GFP_KERNEL);
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| 310 | if (!data) {
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| 311 | dev_dbg(&client->dev, "Could not allocate device data\n");
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| 312 | return -ENOMEM;
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| 313 | }
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| 314 |
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| 315 | data->dev = &client->dev;
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| 316 | dev_set_drvdata(data->dev, data);
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| 317 |
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| 318 | data->regmap = devm_regmap_init_i2c(client, &rx8111_regmap_config);
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| 319 | if (IS_ERR(data->regmap)) {
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| 320 | dev_dbg(data->dev, "Could not initialize regmap\n");
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| 321 | return PTR_ERR(data->regmap);
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| 322 | }
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| 323 |
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| 324 | for (i = 0; i < RX8111_REGF_MAX; ++i) {
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| 325 | data->regfields[i] = devm_regmap_field_alloc(
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| 326 | data->dev, data->regmap, rx8111_regfields[i]);
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| 327 | if (IS_ERR(data->regfields[i])) {
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| 328 | dev_dbg(data->dev,
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| 329 | "Could not allocate register field %zu\n", i);
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| 330 | return PTR_ERR(data->regfields[i]);
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| 331 | }
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| 332 | }
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| 333 |
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| 334 | rtc = devm_rtc_allocate_device(data->dev);
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| 335 | if (IS_ERR(rtc)) {
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| 336 | dev_dbg(data->dev, "Could not allocate rtc device\n");
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| 337 | return PTR_ERR(rtc);
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| 338 | }
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| 339 |
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| 340 | rtc->ops = &rx8111_rtc_ops;
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| 341 | rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
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| 342 | rtc->range_max = RTC_TIMESTAMP_END_2099;
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| 343 |
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| 344 | clear_bit(RTC_FEATURE_ALARM, rtc->features);
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| 345 |
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| 346 | return devm_rtc_register_device(rtc);
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| 347 | }
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| 348 |
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| 349 | static const struct of_device_id rx8111_of_match[] = {
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| 350 | {
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| 351 | .compatible = "epson,rx8111",
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| 352 | },
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| 353 | {}
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| 354 | };
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| 355 | MODULE_DEVICE_TABLE(of, rx8111_of_match);
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| 356 |
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| 357 | static struct i2c_driver rx8111_driver = {
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| 358 | .driver = {
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| 359 | .name = "rtc-rx8111",
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| 360 | .of_match_table = rx8111_of_match,
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| 361 | },
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| 362 | .probe = rx8111_probe,
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| 363 | };
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| 364 | module_i2c_driver(rx8111_driver);
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| 365 |
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| 366 | MODULE_AUTHOR("Waqar Hameed <[email protected]>");
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| 367 | MODULE_DESCRIPTION("Epson RX8111 RTC driver");
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| 368 | MODULE_LICENSE("GPL");
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