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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * NCR 5380 generic driver routines. These should make it *trivial*
4 * to implement 5380 SCSI drivers under Linux with a non-trantor
5 * architecture.
6 *
7 * Note that these routines also work with NR53c400 family chips.
8 *
9 * Copyright 1993, Drew Eckhardt
10 * Visionary Computing
11 * (Unix and Linux consulting and custom programming)
12 * [email protected]
13 * +1 (303) 666-5836
14 *
15 * For more information, please consult
16 *
17 * NCR 5380 Family
18 * SCSI Protocol Controller
19 * Databook
20 *
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
24 * 1+ (719) 578-3400
25 * 1+ (800) 334-5454
26 */
27
28/*
29 * With contributions from Ray Van Tassle, Ingmar Baumgart,
30 * Ronald van Cuijlenborg, Alan Cox and others.
31 */
32
33/* Ported to Atari by Roman Hodek and others. */
34
35/* Adapted for the Sun 3 by Sam Creasey. */
36
37/*
38 * Design
39 *
40 * This is a generic 5380 driver. To use it on a different platform,
41 * one simply writes appropriate system specific macros (ie, data
42 * transfer - some PC's will use the I/O bus, 68K's must use
43 * memory mapped) and drops this file in their 'C' wrapper.
44 *
45 * As far as command queueing, two queues are maintained for
46 * each 5380 in the system - commands that haven't been issued yet,
47 * and commands that are currently executing. This means that an
48 * unlimited number of commands may be queued, letting
49 * more commands propagate from the higher driver levels giving higher
50 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
51 * allowing multiple commands to propagate all the way to a SCSI-II device
52 * while a command is already executing.
53 *
54 *
55 * Issues specific to the NCR5380 :
56 *
57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
58 * piece of hardware that requires you to sit in a loop polling for
59 * the REQ signal as long as you are connected. Some devices are
60 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
61 * while doing long seek operations. [...] These
62 * broken devices are the exception rather than the rule and I'd rather
63 * spend my time optimizing for the normal case.
64 *
65 * Architecture :
66 *
67 * At the heart of the design is a coroutine, NCR5380_main,
68 * which is started from a workqueue for each NCR5380 host in the
69 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
70 * removing the commands from the issue queue and calling
71 * NCR5380_select() if a nexus is not established.
72 *
73 * Once a nexus is established, the NCR5380_information_transfer()
74 * phase goes through the various phases as instructed by the target.
75 * if the target goes into MSG IN and sends a DISCONNECT message,
76 * the command structure is placed into the per instance disconnected
77 * queue, and NCR5380_main tries to find more work. If the target is
78 * idle for too long, the system will try to sleep.
79 *
80 * If a command has disconnected, eventually an interrupt will trigger,
81 * calling NCR5380_intr() which will in turn call NCR5380_reselect
82 * to reestablish a nexus. This will run main if necessary.
83 *
84 * On command termination, the done function will be called as
85 * appropriate.
86 *
87 * The command data pointer is initialized after the command is connected
88 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
89 * Note that in violation of the standard, an implicit SAVE POINTERS operation
90 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
91 */
92
93/*
94 * Using this file :
95 * This file a skeleton Linux SCSI driver for the NCR 5380 series
96 * of chips. To use it, you write an architecture specific functions
97 * and macros and include this file in your driver.
98 *
99 * These macros MUST be defined :
100 *
101 * NCR5380_read(register) - read from the specified register
102 *
103 * NCR5380_write(register, value) - write to the specific register
104 *
105 * NCR5380_implementation_fields - additional fields needed for this
106 * specific implementation of the NCR5380
107 *
108 * Either real DMA *or* pseudo DMA may be implemented
109 *
110 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
111 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
112 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
113 * NCR5380_dma_residual - residual byte count
114 *
115 * The generic driver is initialized by calling NCR5380_init(instance),
116 * after setting the appropriate host specific fields and ID.
117 */
118
119#ifndef NCR5380_io_delay
120#define NCR5380_io_delay(x)
121#endif
122
123#ifndef NCR5380_acquire_dma_irq
124#define NCR5380_acquire_dma_irq(x) (1)
125#endif
126
127#ifndef NCR5380_release_dma_irq
128#define NCR5380_release_dma_irq(x)
129#endif
130
131static unsigned int disconnect_mask = ~0;
132module_param(disconnect_mask, int, 0444);
133
134static int do_abort(struct Scsi_Host *, unsigned int);
135static void do_reset(struct Scsi_Host *);
136static void bus_reset_cleanup(struct Scsi_Host *);
137
138/**
139 * initialize_SCp - init the scsi pointer field
140 * @cmd: command block to set up
141 *
142 * Set up the internal fields in the SCSI command.
143 */
144
145static inline void initialize_SCp(struct scsi_cmnd *cmd)
146{
147 struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
148
149 if (scsi_bufflen(cmd)) {
150 ncmd->buffer = scsi_sglist(cmd);
151 ncmd->ptr = sg_virt(ncmd->buffer);
152 ncmd->this_residual = ncmd->buffer->length;
153 } else {
154 ncmd->buffer = NULL;
155 ncmd->ptr = NULL;
156 ncmd->this_residual = 0;
157 }
158
159 ncmd->status = 0;
160}
161
162static inline void advance_sg_buffer(struct NCR5380_cmd *ncmd)
163{
164 struct scatterlist *s = ncmd->buffer;
165
166 if (!ncmd->this_residual && s && !sg_is_last(s)) {
167 ncmd->buffer = sg_next(s);
168 ncmd->ptr = sg_virt(ncmd->buffer);
169 ncmd->this_residual = ncmd->buffer->length;
170 }
171}
172
173static inline void set_resid_from_SCp(struct scsi_cmnd *cmd)
174{
175 struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
176 int resid = ncmd->this_residual;
177 struct scatterlist *s = ncmd->buffer;
178
179 if (s)
180 while (!sg_is_last(s)) {
181 s = sg_next(s);
182 resid += s->length;
183 }
184 scsi_set_resid(cmd, resid);
185}
186
187/**
188 * NCR5380_poll_politely2 - wait for two chip register values
189 * @hostdata: host private data
190 * @reg1: 5380 register to poll
191 * @bit1: Bitmask to check
192 * @val1: Expected value
193 * @reg2: Second 5380 register to poll
194 * @bit2: Second bitmask to check
195 * @val2: Second expected value
196 * @wait: Time-out in jiffies, 0 if sleeping is not allowed
197 *
198 * Polls the chip in a reasonably efficient manner waiting for an
199 * event to occur. After a short quick poll we begin to yield the CPU
200 * (if possible). In irq contexts the time-out is arbitrarily limited.
201 *
202 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
203 */
204
205static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
206 unsigned int reg1, u8 bit1, u8 val1,
207 unsigned int reg2, u8 bit2, u8 val2,
208 unsigned long wait)
209{
210 unsigned long n = hostdata->poll_loops;
211 unsigned long deadline = jiffies + wait;
212
213 do {
214 if ((NCR5380_read(reg1) & bit1) == val1)
215 return 0;
216 if ((NCR5380_read(reg2) & bit2) == val2)
217 return 0;
218 cpu_relax();
219 } while (n--);
220
221 if (!wait)
222 return -ETIMEDOUT;
223
224 /* Repeatedly sleep for 1 ms until deadline */
225 while (time_is_after_jiffies(deadline)) {
226 schedule_timeout_uninterruptible(1);
227 if ((NCR5380_read(reg1) & bit1) == val1)
228 return 0;
229 if ((NCR5380_read(reg2) & bit2) == val2)
230 return 0;
231 }
232
233 return -ETIMEDOUT;
234}
235
236#if NDEBUG
237static struct {
238 unsigned char mask;
239 const char *name;
240} signals[] = {
241 {SR_DBP, "PARITY"},
242 {SR_RST, "RST"},
243 {SR_BSY, "BSY"},
244 {SR_REQ, "REQ"},
245 {SR_MSG, "MSG"},
246 {SR_CD, "CD"},
247 {SR_IO, "IO"},
248 {SR_SEL, "SEL"},
249 {0, NULL}
250},
251basrs[] = {
252 {BASR_END_DMA_TRANSFER, "END OF DMA"},
253 {BASR_DRQ, "DRQ"},
254 {BASR_PARITY_ERROR, "PARITY ERROR"},
255 {BASR_IRQ, "IRQ"},
256 {BASR_PHASE_MATCH, "PHASE MATCH"},
257 {BASR_BUSY_ERROR, "BUSY ERROR"},
258 {BASR_ATN, "ATN"},
259 {BASR_ACK, "ACK"},
260 {0, NULL}
261},
262icrs[] = {
263 {ICR_ASSERT_RST, "ASSERT RST"},
264 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
265 {ICR_ARBITRATION_LOST, "LOST ARB."},
266 {ICR_ASSERT_ACK, "ASSERT ACK"},
267 {ICR_ASSERT_BSY, "ASSERT BSY"},
268 {ICR_ASSERT_SEL, "ASSERT SEL"},
269 {ICR_ASSERT_ATN, "ASSERT ATN"},
270 {ICR_ASSERT_DATA, "ASSERT DATA"},
271 {0, NULL}
272},
273mrs[] = {
274 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
275 {MR_TARGET, "TARGET"},
276 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
277 {MR_ENABLE_PAR_INTR, "PARITY INTR"},
278 {MR_ENABLE_EOP_INTR, "EOP INTR"},
279 {MR_MONITOR_BSY, "MONITOR BSY"},
280 {MR_DMA_MODE, "DMA MODE"},
281 {MR_ARBITRATE, "ARBITRATE"},
282 {0, NULL}
283};
284
285/**
286 * NCR5380_print - print scsi bus signals
287 * @instance: adapter state to dump
288 *
289 * Print the SCSI bus signals for debugging purposes
290 */
291
292static void NCR5380_print(struct Scsi_Host *instance)
293{
294 struct NCR5380_hostdata *hostdata = shost_priv(instance);
295 unsigned char status, basr, mr, icr, i;
296
297 status = NCR5380_read(STATUS_REG);
298 mr = NCR5380_read(MODE_REG);
299 icr = NCR5380_read(INITIATOR_COMMAND_REG);
300 basr = NCR5380_read(BUS_AND_STATUS_REG);
301
302 printk(KERN_DEBUG "SR = 0x%02x : ", status);
303 for (i = 0; signals[i].mask; ++i)
304 if (status & signals[i].mask)
305 printk(KERN_CONT "%s, ", signals[i].name);
306 printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
307 for (i = 0; basrs[i].mask; ++i)
308 if (basr & basrs[i].mask)
309 printk(KERN_CONT "%s, ", basrs[i].name);
310 printk(KERN_CONT "\nICR = 0x%02x : ", icr);
311 for (i = 0; icrs[i].mask; ++i)
312 if (icr & icrs[i].mask)
313 printk(KERN_CONT "%s, ", icrs[i].name);
314 printk(KERN_CONT "\nMR = 0x%02x : ", mr);
315 for (i = 0; mrs[i].mask; ++i)
316 if (mr & mrs[i].mask)
317 printk(KERN_CONT "%s, ", mrs[i].name);
318 printk(KERN_CONT "\n");
319}
320
321static struct {
322 unsigned char value;
323 const char *name;
324} phases[] = {
325 {PHASE_DATAOUT, "DATAOUT"},
326 {PHASE_DATAIN, "DATAIN"},
327 {PHASE_CMDOUT, "CMDOUT"},
328 {PHASE_STATIN, "STATIN"},
329 {PHASE_MSGOUT, "MSGOUT"},
330 {PHASE_MSGIN, "MSGIN"},
331 {PHASE_UNKNOWN, "UNKNOWN"}
332};
333
334/**
335 * NCR5380_print_phase - show SCSI phase
336 * @instance: adapter to dump
337 *
338 * Print the current SCSI phase for debugging purposes
339 */
340
341static void NCR5380_print_phase(struct Scsi_Host *instance)
342{
343 struct NCR5380_hostdata *hostdata = shost_priv(instance);
344 unsigned char status;
345 int i;
346
347 status = NCR5380_read(STATUS_REG);
348 if (!(status & SR_REQ))
349 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
350 else {
351 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
352 (phases[i].value != (status & PHASE_MASK)); ++i)
353 ;
354 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
355 }
356}
357#endif
358
359/**
360 * NCR5380_info - report driver and host information
361 * @instance: relevant scsi host instance
362 *
363 * For use as the host template info() handler.
364 */
365
366static const char *NCR5380_info(struct Scsi_Host *instance)
367{
368 struct NCR5380_hostdata *hostdata = shost_priv(instance);
369
370 return hostdata->info;
371}
372
373/**
374 * NCR5380_init - initialise an NCR5380
375 * @instance: adapter to configure
376 * @flags: control flags
377 *
378 * Initializes *instance and corresponding 5380 chip,
379 * with flags OR'd into the initial flags value.
380 *
381 * Notes : I assume that the host, hostno, and id bits have been
382 * set correctly. I don't care about the irq and other fields.
383 *
384 * Returns 0 for success
385 */
386
387static int NCR5380_init(struct Scsi_Host *instance, int flags)
388{
389 struct NCR5380_hostdata *hostdata = shost_priv(instance);
390 int i;
391 unsigned long deadline;
392 unsigned long accesses_per_ms;
393
394 instance->max_lun = 7;
395
396 hostdata->host = instance;
397 hostdata->id_mask = 1 << instance->this_id;
398 hostdata->id_higher_mask = 0;
399 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
400 if (i > hostdata->id_mask)
401 hostdata->id_higher_mask |= i;
402 for (i = 0; i < 8; ++i)
403 hostdata->busy[i] = 0;
404 hostdata->dma_len = 0;
405
406 spin_lock_init(&hostdata->lock);
407 hostdata->connected = NULL;
408 hostdata->sensing = NULL;
409 INIT_LIST_HEAD(&hostdata->autosense);
410 INIT_LIST_HEAD(&hostdata->unissued);
411 INIT_LIST_HEAD(&hostdata->disconnected);
412
413 hostdata->flags = flags;
414
415 INIT_WORK(&hostdata->main_task, NCR5380_main);
416 hostdata->work_q = alloc_workqueue("ncr5380_%d",
417 WQ_UNBOUND | WQ_MEM_RECLAIM,
418 0, instance->host_no);
419 if (!hostdata->work_q)
420 return -ENOMEM;
421
422 snprintf(hostdata->info, sizeof(hostdata->info),
423 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
424 instance->hostt->name, instance->irq, hostdata->io_port,
425 hostdata->base, instance->can_queue, instance->cmd_per_lun,
426 instance->sg_tablesize, instance->this_id,
427 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
428 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
429 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
430
431 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
432 NCR5380_write(MODE_REG, MR_BASE);
433 NCR5380_write(TARGET_COMMAND_REG, 0);
434 NCR5380_write(SELECT_ENABLE_REG, 0);
435
436 /* Calibrate register polling loop */
437 i = 0;
438 deadline = jiffies + 1;
439 do {
440 cpu_relax();
441 } while (time_is_after_jiffies(deadline));
442 deadline += msecs_to_jiffies(256);
443 do {
444 NCR5380_read(STATUS_REG);
445 ++i;
446 cpu_relax();
447 } while (time_is_after_jiffies(deadline));
448 accesses_per_ms = i / 256;
449 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
450
451 return 0;
452}
453
454/**
455 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
456 * @instance: adapter to check
457 *
458 * If the system crashed, it may have crashed with a connected target and
459 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
460 * currently established nexus, which we know nothing about. Failing that
461 * do a bus reset.
462 *
463 * Note that a bus reset will cause the chip to assert IRQ.
464 *
465 * Returns 0 if successful, otherwise -ENXIO.
466 */
467
468static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
469{
470 struct NCR5380_hostdata *hostdata = shost_priv(instance);
471 int pass;
472
473 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
474 switch (pass) {
475 case 1:
476 case 3:
477 case 5:
478 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
479 NCR5380_poll_politely(hostdata,
480 STATUS_REG, SR_BSY, 0, 5 * HZ);
481 break;
482 case 2:
483 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
484 do_abort(instance, 1);
485 break;
486 case 4:
487 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
488 do_reset(instance);
489 /* Wait after a reset; the SCSI standard calls for
490 * 250ms, we wait 500ms to be on the safe side.
491 * But some Toshiba CD-ROMs need ten times that.
492 */
493 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
494 msleep(2500);
495 else
496 msleep(500);
497 break;
498 case 6:
499 shost_printk(KERN_ERR, instance, "bus locked solid\n");
500 return -ENXIO;
501 }
502 }
503 return 0;
504}
505
506/**
507 * NCR5380_exit - remove an NCR5380
508 * @instance: adapter to remove
509 *
510 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
511 */
512
513static void NCR5380_exit(struct Scsi_Host *instance)
514{
515 struct NCR5380_hostdata *hostdata = shost_priv(instance);
516
517 cancel_work_sync(&hostdata->main_task);
518 destroy_workqueue(hostdata->work_q);
519}
520
521/**
522 * complete_cmd - finish processing a command and return it to the SCSI ML
523 * @instance: the host instance
524 * @cmd: command to complete
525 */
526
527static void complete_cmd(struct Scsi_Host *instance,
528 struct scsi_cmnd *cmd)
529{
530 struct NCR5380_hostdata *hostdata = shost_priv(instance);
531
532 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
533
534 if (hostdata->sensing == cmd) {
535 /* Autosense processing ends here */
536 if (get_status_byte(cmd) != SAM_STAT_GOOD) {
537 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
538 } else {
539 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
540 set_status_byte(cmd, SAM_STAT_CHECK_CONDITION);
541 }
542 hostdata->sensing = NULL;
543 }
544
545 scsi_done(cmd);
546}
547
548/**
549 * NCR5380_queue_command - queue a command
550 * @instance: the relevant SCSI adapter
551 * @cmd: SCSI command
552 *
553 * cmd is added to the per-instance issue queue, with minor
554 * twiddling done to the host specific fields of cmd. If the
555 * main coroutine is not running, it is restarted.
556 */
557
558static enum scsi_qc_status NCR5380_queue_command(struct Scsi_Host *instance,
559 struct scsi_cmnd *cmd)
560{
561 struct NCR5380_hostdata *hostdata = shost_priv(instance);
562 struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
563 unsigned long flags;
564
565#if (NDEBUG & NDEBUG_NO_WRITE)
566 switch (cmd->cmnd[0]) {
567 case WRITE_6:
568 case WRITE_10:
569 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
570 cmd->result = (DID_ERROR << 16);
571 scsi_done(cmd);
572 return 0;
573 }
574#endif /* (NDEBUG & NDEBUG_NO_WRITE) */
575
576 cmd->result = 0;
577
578 spin_lock_irqsave(&hostdata->lock, flags);
579
580 if (!NCR5380_acquire_dma_irq(instance)) {
581 spin_unlock_irqrestore(&hostdata->lock, flags);
582
583 return SCSI_MLQUEUE_HOST_BUSY;
584 }
585
586 /*
587 * Insert the cmd into the issue queue. Note that REQUEST SENSE
588 * commands are added to the head of the queue since any command will
589 * clear the contingent allegiance condition that exists and the
590 * sense data is only guaranteed to be valid while the condition exists.
591 */
592
593 if (cmd->cmnd[0] == REQUEST_SENSE)
594 list_add(&ncmd->list, &hostdata->unissued);
595 else
596 list_add_tail(&ncmd->list, &hostdata->unissued);
597
598 spin_unlock_irqrestore(&hostdata->lock, flags);
599
600 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
601 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
602
603 /* Kick off command processing */
604 queue_work(hostdata->work_q, &hostdata->main_task);
605 return 0;
606}
607
608static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
609{
610 struct NCR5380_hostdata *hostdata = shost_priv(instance);
611
612 /* Caller does the locking needed to set & test these data atomically */
613 if (list_empty(&hostdata->disconnected) &&
614 list_empty(&hostdata->unissued) &&
615 list_empty(&hostdata->autosense) &&
616 !hostdata->connected &&
617 !hostdata->selecting) {
618 NCR5380_release_dma_irq(instance);
619 }
620}
621
622/**
623 * dequeue_next_cmd - dequeue a command for processing
624 * @instance: the scsi host instance
625 *
626 * Priority is given to commands on the autosense queue. These commands
627 * need autosense because of a CHECK CONDITION result.
628 *
629 * Returns a command pointer if a command is found for a target that is
630 * not already busy. Otherwise returns NULL.
631 */
632
633static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
634{
635 struct NCR5380_hostdata *hostdata = shost_priv(instance);
636 struct NCR5380_cmd *ncmd;
637 struct scsi_cmnd *cmd;
638
639 if (hostdata->sensing || list_empty(&hostdata->autosense)) {
640 list_for_each_entry(ncmd, &hostdata->unissued, list) {
641 cmd = NCR5380_to_scmd(ncmd);
642 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
643 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
644
645 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
646 list_del(&ncmd->list);
647 dsprintk(NDEBUG_QUEUES, instance,
648 "dequeue: removed %p from issue queue\n", cmd);
649 return cmd;
650 }
651 }
652 } else {
653 /* Autosense processing begins here */
654 ncmd = list_first_entry(&hostdata->autosense,
655 struct NCR5380_cmd, list);
656 list_del(&ncmd->list);
657 cmd = NCR5380_to_scmd(ncmd);
658 dsprintk(NDEBUG_QUEUES, instance,
659 "dequeue: removed %p from autosense queue\n", cmd);
660 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
661 hostdata->sensing = cmd;
662 return cmd;
663 }
664 return NULL;
665}
666
667static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
668{
669 struct NCR5380_hostdata *hostdata = shost_priv(instance);
670 struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
671
672 if (hostdata->sensing == cmd) {
673 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
674 list_add(&ncmd->list, &hostdata->autosense);
675 hostdata->sensing = NULL;
676 } else
677 list_add(&ncmd->list, &hostdata->unissued);
678}
679
680/**
681 * NCR5380_main - NCR state machines
682 *
683 * NCR5380_main is a coroutine that runs as long as more work can
684 * be done on the NCR5380 host adapters in a system. Both
685 * NCR5380_queue_command() and NCR5380_intr() will try to start it
686 * in case it is not running.
687 */
688
689static void NCR5380_main(struct work_struct *work)
690{
691 struct NCR5380_hostdata *hostdata =
692 container_of(work, struct NCR5380_hostdata, main_task);
693 struct Scsi_Host *instance = hostdata->host;
694 int done;
695
696 do {
697 done = 1;
698
699 spin_lock_irq(&hostdata->lock);
700 while (!hostdata->connected && !hostdata->selecting) {
701 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
702
703 if (!cmd)
704 break;
705
706 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
707
708 /*
709 * Attempt to establish an I_T_L nexus here.
710 * On success, instance->hostdata->connected is set.
711 * On failure, we must add the command back to the
712 * issue queue so we can keep trying.
713 */
714 /*
715 * REQUEST SENSE commands are issued without tagged
716 * queueing, even on SCSI-II devices because the
717 * contingent allegiance condition exists for the
718 * entire unit.
719 */
720
721 if (!NCR5380_select(instance, cmd)) {
722 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
723 } else {
724 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
725 "main: select failed, returning %p to queue\n", cmd);
726 requeue_cmd(instance, cmd);
727 }
728 }
729 if (hostdata->connected && !hostdata->dma_len) {
730 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
731 NCR5380_information_transfer(instance);
732 done = 0;
733 }
734 if (!hostdata->connected) {
735 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
736 maybe_release_dma_irq(instance);
737 }
738 spin_unlock_irq(&hostdata->lock);
739 if (!done)
740 cond_resched();
741 } while (!done);
742}
743
744/*
745 * NCR5380_dma_complete - finish DMA transfer
746 * @instance: the scsi host instance
747 *
748 * Called by the interrupt handler when DMA finishes or a phase
749 * mismatch occurs (which would end the DMA transfer).
750 */
751
752static void NCR5380_dma_complete(struct Scsi_Host *instance)
753{
754 struct NCR5380_hostdata *hostdata = shost_priv(instance);
755 struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(hostdata->connected);
756 int transferred;
757 unsigned char **data;
758 int *count;
759 int saved_data = 0, overrun = 0;
760 unsigned char p;
761
762 if (hostdata->read_overruns) {
763 p = ncmd->phase;
764 if (p & SR_IO) {
765 udelay(10);
766 if ((NCR5380_read(BUS_AND_STATUS_REG) &
767 (BASR_PHASE_MATCH | BASR_ACK)) ==
768 (BASR_PHASE_MATCH | BASR_ACK)) {
769 saved_data = NCR5380_read(INPUT_DATA_REG);
770 overrun = 1;
771 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
772 }
773 }
774 }
775
776#ifdef CONFIG_SUN3
777 if (sun3scsi_dma_finish(hostdata->connected->sc_data_direction)) {
778 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
779 instance->host_no);
780 BUG();
781 }
782
783 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
784 (BASR_PHASE_MATCH | BASR_ACK)) {
785 pr_err("scsi%d: BASR %02x\n", instance->host_no,
786 NCR5380_read(BUS_AND_STATUS_REG));
787 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
788 instance->host_no);
789 BUG();
790 }
791#endif
792
793 NCR5380_write(MODE_REG, MR_BASE);
794 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
795 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
796
797 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
798 hostdata->dma_len = 0;
799
800 data = (unsigned char **)&ncmd->ptr;
801 count = &ncmd->this_residual;
802 *data += transferred;
803 *count -= transferred;
804
805 if (hostdata->read_overruns) {
806 int cnt, toPIO;
807
808 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
809 cnt = toPIO = hostdata->read_overruns;
810 if (overrun) {
811 dsprintk(NDEBUG_DMA, instance,
812 "Got an input overrun, using saved byte\n");
813 *(*data)++ = saved_data;
814 (*count)--;
815 cnt--;
816 toPIO--;
817 }
818 if (toPIO > 0) {
819 dsprintk(NDEBUG_DMA, instance,
820 "Doing %d byte PIO to 0x%p\n", cnt, *data);
821 NCR5380_transfer_pio(instance, &p, &cnt, data, 0);
822 *count -= toPIO - cnt;
823 }
824 }
825 }
826}
827
828/**
829 * NCR5380_intr - generic NCR5380 irq handler
830 * @irq: interrupt number
831 * @dev_id: device info
832 *
833 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
834 * from the disconnected queue, and restarting NCR5380_main()
835 * as required.
836 *
837 * The chip can assert IRQ in any of six different conditions. The IRQ flag
838 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
839 * Three of these six conditions are latched in the Bus and Status Register:
840 * - End of DMA (cleared by ending DMA Mode)
841 * - Parity error (cleared by reading RPIR)
842 * - Loss of BSY (cleared by reading RPIR)
843 * Two conditions have flag bits that are not latched:
844 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
845 * - Bus reset (non-maskable)
846 * The remaining condition has no flag bit at all:
847 * - Selection/reselection
848 *
849 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
850 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
851 * claimed that "the design of the [DP8490] interrupt logic ensures
852 * interrupts will not be lost (they can be on the DP5380)."
853 * The L5380/53C80 datasheet from LOGIC Devices has more details.
854 *
855 * Checking for bus reset by reading RST is futile because of interrupt
856 * latency, but a bus reset will reset chip logic. Checking for parity error
857 * is unnecessary because that interrupt is never enabled. A Loss of BSY
858 * condition will clear DMA Mode. We can tell when this occurs because the
859 * Busy Monitor interrupt is enabled together with DMA Mode.
860 */
861
862static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
863{
864 struct Scsi_Host *instance = dev_id;
865 struct NCR5380_hostdata *hostdata = shost_priv(instance);
866 int handled = 0;
867 unsigned char basr;
868 unsigned long flags;
869
870 spin_lock_irqsave(&hostdata->lock, flags);
871
872 basr = NCR5380_read(BUS_AND_STATUS_REG);
873 if (basr & BASR_IRQ) {
874 unsigned char mr = NCR5380_read(MODE_REG);
875 unsigned char sr = NCR5380_read(STATUS_REG);
876
877 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
878 irq, basr, sr, mr);
879
880 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
881 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
882 * We ack IRQ after clearing Mode Register. Workarounds
883 * for End of DMA errata need to happen in DMA Mode.
884 */
885
886 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
887
888 if (hostdata->connected) {
889 NCR5380_dma_complete(instance);
890 queue_work(hostdata->work_q, &hostdata->main_task);
891 } else {
892 NCR5380_write(MODE_REG, MR_BASE);
893 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
894 }
895 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
896 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
897 /* Probably reselected */
898 NCR5380_write(SELECT_ENABLE_REG, 0);
899 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
900
901 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
902
903 if (!hostdata->connected) {
904 NCR5380_reselect(instance);
905 queue_work(hostdata->work_q, &hostdata->main_task);
906 }
907 if (!hostdata->connected)
908 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
909 } else {
910 /* Probably Bus Reset */
911 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
912
913 if (sr & SR_RST) {
914 /* Certainly Bus Reset */
915 shost_printk(KERN_WARNING, instance,
916 "bus reset interrupt\n");
917 bus_reset_cleanup(instance);
918 } else {
919 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
920 }
921#ifdef SUN3_SCSI_VME
922 dregs->csr |= CSR_DMA_ENABLE;
923#endif
924 }
925 handled = 1;
926 } else {
927 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
928#ifdef SUN3_SCSI_VME
929 dregs->csr |= CSR_DMA_ENABLE;
930#endif
931 }
932
933 spin_unlock_irqrestore(&hostdata->lock, flags);
934
935 return IRQ_RETVAL(handled);
936}
937
938/**
939 * NCR5380_select - attempt arbitration and selection for a given command
940 * @instance: the Scsi_Host instance
941 * @cmd: the scsi_cmnd to execute
942 *
943 * This routine establishes an I_T_L nexus for a SCSI command. This involves
944 * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message.
945 *
946 * Returns true if the operation should be retried.
947 * Returns false if it should not be retried.
948 *
949 * Side effects :
950 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
951 * with registers as they should have been on entry - ie
952 * SELECT_ENABLE will be set appropriately, the NCR5380
953 * will cease to drive any SCSI bus signals.
954 *
955 * If successful : the I_T_L nexus will be established, and
956 * hostdata->connected will be set to cmd.
957 * SELECT interrupt will be disabled.
958 *
959 * If failed (no target) : scsi_done() will be called, and the
960 * cmd->result host byte set to DID_BAD_TARGET.
961 */
962
963static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
964 __releases(&hostdata->lock) __acquires(&hostdata->lock)
965{
966 struct NCR5380_hostdata *hostdata = shost_priv(instance);
967 unsigned char tmp[3], phase;
968 unsigned char *data;
969 int len;
970 int err;
971 bool ret = true;
972 bool can_disconnect = instance->irq != NO_IRQ &&
973 cmd->cmnd[0] != REQUEST_SENSE &&
974 (disconnect_mask & BIT(scmd_id(cmd)));
975
976 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
977 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
978 instance->this_id);
979
980 /*
981 * Arbitration and selection phases are slow and involve dropping the
982 * lock, so we have to watch out for EH. An exception handler may
983 * change 'selecting' to NULL. This function will then return false
984 * so that the caller will forget about 'cmd'. (During information
985 * transfer phases, EH may change 'connected' to NULL.)
986 */
987 hostdata->selecting = cmd;
988
989 /*
990 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
991 * data bus during SELECTION.
992 */
993
994 NCR5380_write(TARGET_COMMAND_REG, 0);
995
996 /*
997 * Start arbitration.
998 */
999
1000 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1001 NCR5380_write(MODE_REG, MR_ARBITRATE);
1002
1003 /* The chip now waits for BUS FREE phase. Then after the 800 ns
1004 * Bus Free Delay, arbitration will begin.
1005 */
1006
1007 spin_unlock_irq(&hostdata->lock);
1008 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
1009 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1010 ICR_ARBITRATION_PROGRESS, HZ);
1011 spin_lock_irq(&hostdata->lock);
1012 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1013 /* Reselection interrupt */
1014 goto out;
1015 }
1016 if (!hostdata->selecting) {
1017 /* Command was aborted */
1018 NCR5380_write(MODE_REG, MR_BASE);
1019 return false;
1020 }
1021 if (err < 0) {
1022 NCR5380_write(MODE_REG, MR_BASE);
1023 shost_printk(KERN_ERR, instance,
1024 "select: arbitration timeout\n");
1025 goto out;
1026 }
1027 spin_unlock_irq(&hostdata->lock);
1028
1029 /* The SCSI-2 arbitration delay is 2.4 us */
1030 udelay(3);
1031
1032 /* Check for lost arbitration */
1033 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1034 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1035 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1036 NCR5380_write(MODE_REG, MR_BASE);
1037 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1038 spin_lock_irq(&hostdata->lock);
1039 goto out;
1040 }
1041
1042 /* After/during arbitration, BSY should be asserted.
1043 * IBM DPES-31080 Version S31Q works now
1044 * Tnx to [email protected] for finding this! (Roman)
1045 */
1046 NCR5380_write(INITIATOR_COMMAND_REG,
1047 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1048
1049 /*
1050 * Again, bus clear + bus settle time is 1.2us, however, this is
1051 * a minimum so we'll udelay ceil(1.2)
1052 */
1053
1054 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1055 udelay(15);
1056 else
1057 udelay(2);
1058
1059 spin_lock_irq(&hostdata->lock);
1060
1061 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1062 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1063 goto out;
1064
1065 if (!hostdata->selecting) {
1066 NCR5380_write(MODE_REG, MR_BASE);
1067 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1068 return false;
1069 }
1070
1071 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1072
1073 /*
1074 * Now that we have won arbitration, start Selection process, asserting
1075 * the host and target ID's on the SCSI bus.
1076 */
1077
1078 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1079
1080 /*
1081 * Raise ATN while SEL is true before BSY goes false from arbitration,
1082 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1083 * phase immediately after selection.
1084 */
1085
1086 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1087 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1088 NCR5380_write(MODE_REG, MR_BASE);
1089
1090 /*
1091 * Reselect interrupts must be turned off prior to the dropping of BSY,
1092 * otherwise we will trigger an interrupt.
1093 */
1094 NCR5380_write(SELECT_ENABLE_REG, 0);
1095
1096 spin_unlock_irq(&hostdata->lock);
1097
1098 /*
1099 * The initiator shall then wait at least two deskew delays and release
1100 * the BSY signal.
1101 */
1102 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1103
1104 /* Reset BSY */
1105 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1106 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1107
1108 /*
1109 * Something weird happens when we cease to drive BSY - looks
1110 * like the board/chip is letting us do another read before the
1111 * appropriate propagation delay has expired, and we're confusing
1112 * a BSY signal from ourselves as the target's response to SELECTION.
1113 *
1114 * A small delay (the 'C++' frontend breaks the pipeline with an
1115 * unnecessary jump, making it work on my 386-33/Trantor T128, the
1116 * tighter 'C' code breaks and requires this) solves the problem -
1117 * the 1 us delay is arbitrary, and only used because this delay will
1118 * be the same on other platforms and since it works here, it should
1119 * work there.
1120 *
1121 * wingel suggests that this could be due to failing to wait
1122 * one deskew delay.
1123 */
1124
1125 udelay(1);
1126
1127 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1128
1129 /*
1130 * The SCSI specification calls for a 250 ms timeout for the actual
1131 * selection.
1132 */
1133
1134 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
1135 msecs_to_jiffies(250));
1136
1137 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1138 spin_lock_irq(&hostdata->lock);
1139 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1140 NCR5380_reselect(instance);
1141 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1142 goto out;
1143 }
1144
1145 if (err < 0) {
1146 spin_lock_irq(&hostdata->lock);
1147 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1148
1149 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1150 if (!hostdata->selecting)
1151 return false;
1152
1153 cmd->result = DID_BAD_TARGET << 16;
1154 complete_cmd(instance, cmd);
1155 dsprintk(NDEBUG_SELECTION, instance,
1156 "target did not respond within 250ms\n");
1157 ret = false;
1158 goto out;
1159 }
1160
1161 /*
1162 * No less than two deskew delays after the initiator detects the
1163 * BSY signal is true, it shall release the SEL signal and may
1164 * change the DATA BUS. -wingel
1165 */
1166
1167 udelay(1);
1168
1169 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1170
1171 /*
1172 * Since we followed the SCSI spec, and raised ATN while SEL
1173 * was true but before BSY was false during selection, the information
1174 * transfer phase should be a MESSAGE OUT phase so that we can send the
1175 * IDENTIFY message.
1176 */
1177
1178 /* Wait for start of REQ/ACK handshake */
1179
1180 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1181 spin_lock_irq(&hostdata->lock);
1182 if (err < 0) {
1183 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1184 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1185 goto out;
1186 }
1187 if (!hostdata->selecting) {
1188 do_abort(instance, 0);
1189 return false;
1190 }
1191
1192 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1193 scmd_id(cmd));
1194 tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
1195
1196 len = 1;
1197 data = tmp;
1198 phase = PHASE_MSGOUT;
1199 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1200 if (len) {
1201 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1202 cmd->result = DID_ERROR << 16;
1203 complete_cmd(instance, cmd);
1204 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
1205 ret = false;
1206 goto out;
1207 }
1208
1209 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1210
1211 hostdata->connected = cmd;
1212 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1213
1214#ifdef SUN3_SCSI_VME
1215 dregs->csr |= CSR_INTR;
1216#endif
1217
1218 initialize_SCp(cmd);
1219
1220 ret = false;
1221
1222out:
1223 if (!hostdata->selecting)
1224 return false;
1225 hostdata->selecting = NULL;
1226 return ret;
1227}
1228
1229/**
1230 * NCR5380_transfer_pio() - transfers data in given phase using polled I/O
1231 * @instance: instance of driver
1232 * @phase: pointer to what phase is expected
1233 * @count: pointer to number of bytes to transfer
1234 * @data: pointer to data pointer
1235 * @can_sleep: 1 or 0 when sleeping is permitted or not, respectively
1236 *
1237 * Returns: void. *phase, *count, *data are modified in place.
1238 */
1239
1240/*
1241 * Note : this code is not as quick as it could be, however it
1242 * IS 100% reliable, and for the actual data transfer where speed
1243 * counts, we will always do a pseudo DMA or DMA transfer.
1244 */
1245
1246static void NCR5380_transfer_pio(struct Scsi_Host *instance,
1247 unsigned char *phase, int *count,
1248 unsigned char **data, unsigned int can_sleep)
1249{
1250 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1251 unsigned char p = *phase, tmp;
1252 int c = *count;
1253 unsigned char *d = *data;
1254
1255 /*
1256 * The NCR5380 chip will only drive the SCSI bus when the
1257 * phase specified in the appropriate bits of the TARGET COMMAND
1258 * REGISTER match the STATUS REGISTER
1259 */
1260
1261 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1262
1263 do {
1264 /*
1265 * Wait for assertion of REQ, after which the phase bits will be
1266 * valid
1267 */
1268
1269 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ | SR_BSY,
1270 SR_REQ | SR_BSY, HZ * can_sleep) < 0)
1271 break;
1272
1273 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1274
1275 /* Check for phase mismatch */
1276 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1277 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1278 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1279 break;
1280 }
1281
1282 /* Do actual transfer from SCSI bus to / from memory */
1283 if (!(p & SR_IO))
1284 NCR5380_write(OUTPUT_DATA_REG, *d);
1285 else
1286 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1287
1288 ++d;
1289
1290 /*
1291 * The SCSI standard suggests that in MSGOUT phase, the initiator
1292 * should drop ATN on the last byte of the message phase
1293 * after REQ has been asserted for the handshake but before
1294 * the initiator raises ACK.
1295 */
1296
1297 if (!(p & SR_IO)) {
1298 if (!((p & SR_MSG) && c > 1)) {
1299 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1300 NCR5380_dprint(NDEBUG_PIO, instance);
1301 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1302 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1303 } else {
1304 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1305 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1306 NCR5380_dprint(NDEBUG_PIO, instance);
1307 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1308 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1309 }
1310 } else {
1311 NCR5380_dprint(NDEBUG_PIO, instance);
1312 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1313 }
1314
1315 if (NCR5380_poll_politely(hostdata,
1316 STATUS_REG, SR_REQ, 0, 5 * HZ * can_sleep) < 0)
1317 break;
1318
1319 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1320
1321 /*
1322 * We have several special cases to consider during REQ/ACK
1323 * handshaking:
1324 *
1325 * 1. We were in MSGOUT phase, and we are on the last byte of
1326 * the message. ATN must be dropped as ACK is dropped.
1327 *
1328 * 2. We are in MSGIN phase, and we are on the last byte of the
1329 * message. We must exit with ACK asserted, so that the calling
1330 * code may raise ATN before dropping ACK to reject the message.
1331 *
1332 * 3. ACK and ATN are clear & the target may proceed as normal.
1333 */
1334 if (!(p == PHASE_MSGIN && c == 1)) {
1335 if (p == PHASE_MSGOUT && c > 1)
1336 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1337 else
1338 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1339 }
1340 } while (--c);
1341
1342 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1343
1344 *count = c;
1345 *data = d;
1346 tmp = NCR5380_read(STATUS_REG);
1347 /* The phase read from the bus is valid if either REQ is (already)
1348 * asserted or if ACK hasn't been released yet. The latter applies if
1349 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1350 */
1351 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1352 *phase = tmp & PHASE_MASK;
1353 else
1354 *phase = PHASE_UNKNOWN;
1355}
1356
1357/**
1358 * do_reset - issue a reset command
1359 * @instance: adapter to reset
1360 *
1361 * Issue a reset sequence to the NCR5380 and try and get the bus
1362 * back into sane shape.
1363 *
1364 * This clears the reset interrupt flag because there may be no handler for
1365 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1366 * been installed. And when in EH we may have released the ST DMA interrupt.
1367 */
1368
1369static void do_reset(struct Scsi_Host *instance)
1370{
1371 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
1372 unsigned long flags;
1373
1374 local_irq_save(flags);
1375 NCR5380_write(TARGET_COMMAND_REG,
1376 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1377 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1378 udelay(50);
1379 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1380 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1381 local_irq_restore(flags);
1382}
1383
1384/**
1385 * do_abort - abort the currently established nexus by going to
1386 * MESSAGE OUT phase and sending an ABORT message.
1387 * @instance: relevant scsi host instance
1388 * @can_sleep: 1 or 0 when sleeping is permitted or not, respectively
1389 *
1390 * Returns 0 on success, negative error code on failure.
1391 */
1392
1393static int do_abort(struct Scsi_Host *instance, unsigned int can_sleep)
1394{
1395 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1396 unsigned char *msgptr, phase, tmp;
1397 int len;
1398 int rc;
1399
1400 /* Request message out phase */
1401 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1402
1403 /*
1404 * Wait for the target to indicate a valid phase by asserting
1405 * REQ. Once this happens, we'll have either a MSGOUT phase
1406 * and can immediately send the ABORT message, or we'll have some
1407 * other phase and will have to source/sink data.
1408 *
1409 * We really don't care what value was on the bus or what value
1410 * the target sees, so we just handshake.
1411 */
1412
1413 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ,
1414 10 * HZ * can_sleep);
1415 if (rc < 0)
1416 goto out;
1417
1418 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1419
1420 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1421
1422 if (tmp != PHASE_MSGOUT) {
1423 NCR5380_write(INITIATOR_COMMAND_REG,
1424 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1425 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0,
1426 3 * HZ * can_sleep);
1427 if (rc < 0)
1428 goto out;
1429 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1430 }
1431
1432 tmp = ABORT;
1433 msgptr = &tmp;
1434 len = 1;
1435 phase = PHASE_MSGOUT;
1436 NCR5380_transfer_pio(instance, &phase, &len, &msgptr, can_sleep);
1437 if (len)
1438 rc = -ENXIO;
1439
1440 /*
1441 * If we got here, and the command completed successfully,
1442 * we're about to go into bus free state.
1443 */
1444
1445out:
1446 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1447 return rc;
1448}
1449
1450/*
1451 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1452 * unsigned char *phase, int *count, unsigned char **data)
1453 *
1454 * Purpose : transfers data in given phase using either real
1455 * or pseudo DMA.
1456 *
1457 * Inputs : instance - instance of driver, *phase - pointer to
1458 * what phase is expected, *count - pointer to number of
1459 * bytes to transfer, **data - pointer to data pointer.
1460 *
1461 * Returns : -1 when different phase is entered without transferring
1462 * maximum number of bytes, 0 if all bytes or transferred or exit
1463 * is in same phase.
1464 *
1465 * Also, *phase, *count, *data are modified in place.
1466 */
1467
1468
1469static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1470 unsigned char *phase, int *count,
1471 unsigned char **data)
1472{
1473 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1474 struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(hostdata->connected);
1475 int c = *count;
1476 unsigned char p = *phase;
1477 unsigned char *d = *data;
1478 unsigned char tmp;
1479 int result = 0;
1480
1481 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1482 *phase = tmp;
1483 return -1;
1484 }
1485
1486 ncmd->phase = p;
1487
1488 if (p & SR_IO) {
1489 if (hostdata->read_overruns)
1490 c -= hostdata->read_overruns;
1491 else if (hostdata->flags & FLAG_DMA_FIXUP)
1492 --c;
1493 }
1494
1495 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1496 (p & SR_IO) ? "receive" : "send", c, d);
1497
1498#ifdef CONFIG_SUN3
1499 /* send start chain */
1500 sun3scsi_dma_start(c, *data);
1501#endif
1502
1503 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1504 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1505 MR_ENABLE_EOP_INTR);
1506
1507 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1508 /* On the Medusa, it is a must to initialize the DMA before
1509 * starting the NCR. This is also the cleaner way for the TT.
1510 */
1511 if (p & SR_IO)
1512 result = NCR5380_dma_recv_setup(hostdata, d, c);
1513 else
1514 result = NCR5380_dma_send_setup(hostdata, d, c);
1515 }
1516
1517 /*
1518 * On the PAS16 at least I/O recovery delays are not needed here.
1519 * Everyone else seems to want them.
1520 */
1521
1522 if (p & SR_IO) {
1523 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1524 NCR5380_io_delay(1);
1525 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1526 } else {
1527 NCR5380_io_delay(1);
1528 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1529 NCR5380_io_delay(1);
1530 NCR5380_write(START_DMA_SEND_REG, 0);
1531 NCR5380_io_delay(1);
1532 }
1533
1534#ifdef CONFIG_SUN3
1535#ifdef SUN3_SCSI_VME
1536 dregs->csr |= CSR_DMA_ENABLE;
1537#endif
1538 sun3_dma_active = 1;
1539#endif
1540
1541 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1542 /* On the Falcon, the DMA setup must be done after the last
1543 * NCR access, else the DMA setup gets trashed!
1544 */
1545 if (p & SR_IO)
1546 result = NCR5380_dma_recv_setup(hostdata, d, c);
1547 else
1548 result = NCR5380_dma_send_setup(hostdata, d, c);
1549 }
1550
1551 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1552 if (result < 0)
1553 return result;
1554
1555 /* For real DMA, result is the byte count. DMA interrupt is expected. */
1556 if (result > 0) {
1557 hostdata->dma_len = result;
1558 return 0;
1559 }
1560
1561 /* The result is zero iff pseudo DMA send/receive was completed. */
1562 hostdata->dma_len = c;
1563
1564 /*
1565 * A note regarding the DMA errata workarounds for early NMOS silicon.
1566 *
1567 * For DMA sends, we want to wait until the last byte has been
1568 * transferred out over the bus before we turn off DMA mode. Alas, there
1569 * seems to be no terribly good way of doing this on a 5380 under all
1570 * conditions. For non-scatter-gather operations, we can wait until REQ
1571 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1572 * are nastier, since the device will be expecting more data than we
1573 * are prepared to send it, and REQ will remain asserted. On a 53C8[01]
1574 * we could test Last Byte Sent to assure transfer (I imagine this is
1575 * precisely why this signal was added to the newer chips) but on the
1576 * older 538[01] this signal does not exist. The workaround for this
1577 * lack is a watchdog; we bail out of the wait-loop after a modest
1578 * amount of wait-time if the usual exit conditions are not met.
1579 * Not a terribly clean or correct solution :-%
1580 *
1581 * DMA receive is equally tricky due to a nasty characteristic of the
1582 * NCR5380. If the chip is in DMA receive mode, it will respond to a
1583 * target's REQ by latching the SCSI data into the INPUT DATA register
1584 * and asserting ACK, even if it has _already_ been notified by the
1585 * DMA controller that the current DMA transfer has completed! If the
1586 * NCR5380 is then taken out of DMA mode, this already-acknowledged
1587 * byte is lost.
1588 *
1589 * This is not a problem for "one DMA transfer per READ
1590 * command", because the situation will never arise... either all of
1591 * the data is DMA'ed properly, or the target switches to MESSAGE IN
1592 * phase to signal a disconnection (either operation bringing the DMA
1593 * to a clean halt). However, in order to handle scatter-receive, we
1594 * must work around the problem. The chosen fix is to DMA fewer bytes,
1595 * then check for the condition before taking the NCR5380 out of DMA
1596 * mode. One or two extra bytes are transferred via PIO as necessary
1597 * to fill out the original request.
1598 */
1599
1600 if ((hostdata->flags & FLAG_DMA_FIXUP) &&
1601 (NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH)) {
1602 /*
1603 * The workaround was to transfer fewer bytes than we
1604 * intended to with the pseudo-DMA receive function, wait for
1605 * the chip to latch the last byte, read it, and then disable
1606 * DMA mode.
1607 *
1608 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1609 * REQ is deasserted when ACK is asserted, and not reasserted
1610 * until ACK goes false. Since the NCR5380 won't lower ACK
1611 * until DACK is asserted, which won't happen unless we twiddle
1612 * the DMA port or we take the NCR5380 out of DMA mode, we
1613 * can guarantee that we won't handshake another extra
1614 * byte.
1615 *
1616 * If sending, wait for the last byte to be sent. If REQ is
1617 * being asserted for the byte we're interested, we'll ACK it
1618 * and it will go false.
1619 */
1620 if (!NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
1621 BASR_DRQ, BASR_DRQ, 0)) {
1622 if ((p & SR_IO) &&
1623 (NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH)) {
1624 if (!NCR5380_poll_politely(hostdata, STATUS_REG,
1625 SR_REQ, 0, 0)) {
1626 d[c] = NCR5380_read(INPUT_DATA_REG);
1627 --ncmd->this_residual;
1628 } else {
1629 result = -1;
1630 scmd_printk(KERN_ERR, hostdata->connected,
1631 "PDMA fixup: !REQ timeout\n");
1632 }
1633 }
1634 } else if (NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH) {
1635 result = -1;
1636 scmd_printk(KERN_ERR, hostdata->connected,
1637 "PDMA fixup: DRQ timeout\n");
1638 }
1639 }
1640
1641 NCR5380_dma_complete(instance);
1642 return result;
1643}
1644
1645/*
1646 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1647 *
1648 * Purpose : run through the various SCSI phases and do as the target
1649 * directs us to. Operates on the currently connected command,
1650 * instance->connected.
1651 *
1652 * Inputs : instance, instance for which we are doing commands
1653 *
1654 * Side effects : SCSI things happen, the disconnected queue will be
1655 * modified if a command disconnects, *instance->connected will
1656 * change.
1657 */
1658
1659static void NCR5380_information_transfer(struct Scsi_Host *instance)
1660 __releases(&hostdata->lock) __acquires(&hostdata->lock)
1661{
1662 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1663 unsigned char msgout = NOP;
1664 int sink = 0;
1665 int len;
1666 int transfersize;
1667 unsigned char *data;
1668 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1669 struct scsi_cmnd *cmd;
1670
1671#ifdef SUN3_SCSI_VME
1672 dregs->csr |= CSR_INTR;
1673#endif
1674
1675 while ((cmd = hostdata->connected)) {
1676 struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
1677
1678 tmp = NCR5380_read(STATUS_REG);
1679 /* We only have a valid SCSI phase when REQ is asserted */
1680 if (tmp & SR_REQ) {
1681 phase = (tmp & PHASE_MASK);
1682 if (phase != old_phase) {
1683 old_phase = phase;
1684 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1685 }
1686#ifdef CONFIG_SUN3
1687 if (phase == PHASE_CMDOUT &&
1688 sun3_dma_setup_done != cmd) {
1689 int count;
1690
1691 advance_sg_buffer(ncmd);
1692
1693 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1694
1695 if (count > 0) {
1696 if (cmd->sc_data_direction == DMA_TO_DEVICE)
1697 sun3scsi_dma_send_setup(hostdata,
1698 ncmd->ptr, count);
1699 else
1700 sun3scsi_dma_recv_setup(hostdata,
1701 ncmd->ptr, count);
1702 sun3_dma_setup_done = cmd;
1703 }
1704#ifdef SUN3_SCSI_VME
1705 dregs->csr |= CSR_INTR;
1706#endif
1707 }
1708#endif /* CONFIG_SUN3 */
1709
1710 if (sink && (phase != PHASE_MSGOUT)) {
1711 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1712
1713 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1714 ICR_ASSERT_ACK);
1715 while (NCR5380_read(STATUS_REG) & SR_REQ)
1716 ;
1717 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1718 ICR_ASSERT_ATN);
1719 sink = 0;
1720 continue;
1721 }
1722
1723 switch (phase) {
1724 case PHASE_DATAOUT:
1725#if (NDEBUG & NDEBUG_NO_DATAOUT)
1726 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1727 sink = 1;
1728 do_abort(instance, 0);
1729 cmd->result = DID_ERROR << 16;
1730 complete_cmd(instance, cmd);
1731 hostdata->connected = NULL;
1732 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1733 return;
1734#endif
1735 case PHASE_DATAIN:
1736 /*
1737 * If there is no room left in the current buffer in the
1738 * scatter-gather list, move onto the next one.
1739 */
1740
1741 advance_sg_buffer(ncmd);
1742 dsprintk(NDEBUG_INFORMATION, instance,
1743 "this residual %d, sg ents %d\n",
1744 ncmd->this_residual,
1745 sg_nents(ncmd->buffer));
1746
1747 /*
1748 * The preferred transfer method is going to be
1749 * PSEUDO-DMA for systems that are strictly PIO,
1750 * since we can let the hardware do the handshaking.
1751 *
1752 * For this to work, we need to know the transfersize
1753 * ahead of time, since the pseudo-DMA code will sit
1754 * in an unconditional loop.
1755 */
1756
1757 transfersize = 0;
1758 if (!cmd->device->borken)
1759 transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
1760
1761 if (transfersize > 0) {
1762 len = transfersize;
1763 if (NCR5380_transfer_dma(instance, &phase,
1764 &len, (unsigned char **)&ncmd->ptr)) {
1765 /*
1766 * If the watchdog timer fires, all future
1767 * accesses to this device will use the
1768 * polled-IO.
1769 */
1770 scmd_printk(KERN_INFO, cmd,
1771 "switching to slow handshake\n");
1772 cmd->device->borken = 1;
1773 do_reset(instance);
1774 bus_reset_cleanup(instance);
1775 }
1776 } else {
1777 /* Transfer a small chunk so that the
1778 * irq mode lock is not held too long.
1779 */
1780 transfersize = min(ncmd->this_residual,
1781 NCR5380_PIO_CHUNK_SIZE);
1782 len = transfersize;
1783 NCR5380_transfer_pio(instance, &phase, &len,
1784 (unsigned char **)&ncmd->ptr,
1785 0);
1786 ncmd->this_residual -= transfersize - len;
1787 }
1788#ifdef CONFIG_SUN3
1789 if (sun3_dma_setup_done == cmd)
1790 sun3_dma_setup_done = NULL;
1791#endif
1792 return;
1793 case PHASE_MSGIN:
1794 len = 1;
1795 tmp = 0xff;
1796 data = &tmp;
1797 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1798 if (tmp == 0xff)
1799 break;
1800
1801 switch (tmp) {
1802 case ABORT:
1803 set_host_byte(cmd, DID_ABORT);
1804 fallthrough;
1805 case COMMAND_COMPLETE:
1806 /* Accept message by clearing ACK */
1807 sink = 1;
1808 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1809 dsprintk(NDEBUG_QUEUES, instance,
1810 "COMMAND COMPLETE %p target %d lun %llu\n",
1811 cmd, scmd_id(cmd), cmd->device->lun);
1812
1813 hostdata->connected = NULL;
1814 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1815
1816 set_status_byte(cmd, ncmd->status);
1817
1818 set_resid_from_SCp(cmd);
1819
1820 if (cmd->cmnd[0] == REQUEST_SENSE)
1821 complete_cmd(instance, cmd);
1822 else {
1823 if (ncmd->status == SAM_STAT_CHECK_CONDITION ||
1824 ncmd->status == SAM_STAT_COMMAND_TERMINATED) {
1825 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1826 cmd);
1827 list_add_tail(&ncmd->list,
1828 &hostdata->autosense);
1829 } else
1830 complete_cmd(instance, cmd);
1831 }
1832
1833 /*
1834 * Restore phase bits to 0 so an interrupted selection,
1835 * arbitration can resume.
1836 */
1837 NCR5380_write(TARGET_COMMAND_REG, 0);
1838
1839 return;
1840 case MESSAGE_REJECT:
1841 /* Accept message by clearing ACK */
1842 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1843 switch (hostdata->last_message) {
1844 case HEAD_OF_QUEUE_TAG:
1845 case ORDERED_QUEUE_TAG:
1846 case SIMPLE_QUEUE_TAG:
1847 cmd->device->simple_tags = 0;
1848 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1849 break;
1850 default:
1851 break;
1852 }
1853 break;
1854 case DISCONNECT:
1855 /* Accept message by clearing ACK */
1856 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1857 hostdata->connected = NULL;
1858 list_add(&ncmd->list, &hostdata->disconnected);
1859 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1860 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1861 cmd, scmd_id(cmd), cmd->device->lun);
1862
1863 /*
1864 * Restore phase bits to 0 so an interrupted selection,
1865 * arbitration can resume.
1866 */
1867 NCR5380_write(TARGET_COMMAND_REG, 0);
1868
1869#ifdef SUN3_SCSI_VME
1870 dregs->csr |= CSR_DMA_ENABLE;
1871#endif
1872 return;
1873 /*
1874 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
1875 * operation, in violation of the SCSI spec so we can safely
1876 * ignore SAVE/RESTORE pointers calls.
1877 *
1878 * Unfortunately, some disks violate the SCSI spec and
1879 * don't issue the required SAVE_POINTERS message before
1880 * disconnecting, and we have to break spec to remain
1881 * compatible.
1882 */
1883 case SAVE_POINTERS:
1884 case RESTORE_POINTERS:
1885 /* Accept message by clearing ACK */
1886 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1887 break;
1888 case EXTENDED_MESSAGE:
1889 /*
1890 * Start the message buffer with the EXTENDED_MESSAGE
1891 * byte, since spi_print_msg() wants the whole thing.
1892 */
1893 extended_msg[0] = EXTENDED_MESSAGE;
1894 /* Accept first byte by clearing ACK */
1895 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1896
1897 spin_unlock_irq(&hostdata->lock);
1898
1899 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1900
1901 len = 2;
1902 data = extended_msg + 1;
1903 phase = PHASE_MSGIN;
1904 NCR5380_transfer_pio(instance, &phase, &len, &data, 1);
1905 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1906 (int)extended_msg[1],
1907 (int)extended_msg[2]);
1908
1909 if (!len && extended_msg[1] > 0 &&
1910 extended_msg[1] <= sizeof(extended_msg) - 2) {
1911 /* Accept third byte by clearing ACK */
1912 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1913 len = extended_msg[1] - 1;
1914 data = extended_msg + 3;
1915 phase = PHASE_MSGIN;
1916
1917 NCR5380_transfer_pio(instance, &phase, &len, &data, 1);
1918 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1919 len);
1920
1921 switch (extended_msg[2]) {
1922 case EXTENDED_SDTR:
1923 case EXTENDED_WDTR:
1924 tmp = 0;
1925 }
1926 } else if (len) {
1927 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1928 tmp = 0;
1929 } else {
1930 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1931 extended_msg[2], extended_msg[1]);
1932 tmp = 0;
1933 }
1934
1935 spin_lock_irq(&hostdata->lock);
1936 if (!hostdata->connected)
1937 return;
1938
1939 /* Reject message */
1940 fallthrough;
1941 default:
1942 /*
1943 * If we get something weird that we aren't expecting,
1944 * log it.
1945 */
1946 if (tmp == EXTENDED_MESSAGE)
1947 scmd_printk(KERN_INFO, cmd,
1948 "rejecting unknown extended message code %02x, length %d\n",
1949 extended_msg[2], extended_msg[1]);
1950 else if (tmp)
1951 scmd_printk(KERN_INFO, cmd,
1952 "rejecting unknown message code %02x\n",
1953 tmp);
1954
1955 msgout = MESSAGE_REJECT;
1956 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1957 break;
1958 } /* switch (tmp) */
1959 break;
1960 case PHASE_MSGOUT:
1961 len = 1;
1962 data = &msgout;
1963 hostdata->last_message = msgout;
1964 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1965 if (msgout == ABORT) {
1966 hostdata->connected = NULL;
1967 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1968 cmd->result = DID_ERROR << 16;
1969 complete_cmd(instance, cmd);
1970 return;
1971 }
1972 msgout = NOP;
1973 break;
1974 case PHASE_CMDOUT:
1975 len = cmd->cmd_len;
1976 data = cmd->cmnd;
1977 /*
1978 * XXX for performance reasons, on machines with a
1979 * PSEUDO-DMA architecture we should probably
1980 * use the dma transfer function.
1981 */
1982 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1983 break;
1984 case PHASE_STATIN:
1985 len = 1;
1986 tmp = ncmd->status;
1987 data = &tmp;
1988 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1989 ncmd->status = tmp;
1990 break;
1991 default:
1992 shost_printk(KERN_ERR, instance, "unknown phase\n");
1993 NCR5380_dprint(NDEBUG_ANY, instance);
1994 } /* switch(phase) */
1995 } else {
1996 int err;
1997
1998 spin_unlock_irq(&hostdata->lock);
1999 err = NCR5380_poll_politely(hostdata, STATUS_REG,
2000 SR_REQ, SR_REQ, HZ);
2001 spin_lock_irq(&hostdata->lock);
2002
2003 if (err < 0 && hostdata->connected &&
2004 !(NCR5380_read(STATUS_REG) & SR_BSY)) {
2005 scmd_printk(KERN_ERR, hostdata->connected,
2006 "BSY signal lost\n");
2007 do_reset(instance);
2008 bus_reset_cleanup(instance);
2009 }
2010 }
2011 }
2012}
2013
2014/*
2015 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2016 *
2017 * Purpose : does reselection, initializing the instance->connected
2018 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2019 * nexus has been reestablished,
2020 *
2021 * Inputs : instance - this instance of the NCR5380.
2022 */
2023
2024static void NCR5380_reselect(struct Scsi_Host *instance)
2025{
2026 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2027 unsigned char target_mask;
2028 unsigned char lun;
2029 unsigned char msg[3];
2030 struct NCR5380_cmd *ncmd;
2031 struct scsi_cmnd *tmp;
2032
2033 /*
2034 * Disable arbitration, etc. since the host adapter obviously
2035 * lost, and tell an interrupted NCR5380_select() to restart.
2036 */
2037
2038 NCR5380_write(MODE_REG, MR_BASE);
2039
2040 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2041 if (!target_mask || target_mask & (target_mask - 1)) {
2042 shost_printk(KERN_WARNING, instance,
2043 "reselect: bad target_mask 0x%02x\n", target_mask);
2044 return;
2045 }
2046
2047 /*
2048 * At this point, we have detected that our SCSI ID is on the bus,
2049 * SEL is true and BSY was false for at least one bus settle delay
2050 * (400 ns).
2051 *
2052 * We must assert BSY ourselves, until the target drops the SEL
2053 * signal.
2054 */
2055
2056 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2057 if (NCR5380_poll_politely(hostdata,
2058 STATUS_REG, SR_SEL, 0, 0) < 0) {
2059 shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
2060 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2061 return;
2062 }
2063 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2064
2065 /*
2066 * Wait for target to go into MSGIN.
2067 */
2068
2069 if (NCR5380_poll_politely(hostdata,
2070 STATUS_REG, SR_REQ, SR_REQ, 0) < 0) {
2071 if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
2072 /* BUS FREE phase */
2073 return;
2074 shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
2075 do_abort(instance, 0);
2076 return;
2077 }
2078
2079#ifdef CONFIG_SUN3
2080 /* acknowledge toggle to MSGIN */
2081 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2082
2083 /* peek at the byte without really hitting the bus */
2084 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2085#else
2086 {
2087 int len = 1;
2088 unsigned char *data = msg;
2089 unsigned char phase = PHASE_MSGIN;
2090
2091 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
2092
2093 if (len) {
2094 do_abort(instance, 0);
2095 return;
2096 }
2097 }
2098#endif /* CONFIG_SUN3 */
2099
2100 if (!(msg[0] & 0x80)) {
2101 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2102 spi_print_msg(msg);
2103 printk("\n");
2104 do_abort(instance, 0);
2105 return;
2106 }
2107 lun = msg[0] & 0x07;
2108
2109 /*
2110 * We need to add code for SCSI-II to track which devices have
2111 * I_T_L_Q nexuses established, and which have simple I_T_L
2112 * nexuses so we can chose to do additional data transfer.
2113 */
2114
2115 /*
2116 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2117 * just reestablished, and remove it from the disconnected queue.
2118 */
2119
2120 tmp = NULL;
2121 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2122 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2123
2124 if (target_mask == (1 << scmd_id(cmd)) &&
2125 lun == (u8)cmd->device->lun) {
2126 list_del(&ncmd->list);
2127 tmp = cmd;
2128 break;
2129 }
2130 }
2131
2132 if (tmp) {
2133 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2134 "reselect: removed %p from disconnected queue\n", tmp);
2135 } else {
2136 int target = ffs(target_mask) - 1;
2137
2138 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2139 target_mask, lun);
2140 /*
2141 * Since we have an established nexus that we can't do anything
2142 * with, we must abort it.
2143 */
2144 if (do_abort(instance, 0) == 0)
2145 hostdata->busy[target] &= ~(1 << lun);
2146 return;
2147 }
2148
2149#ifdef CONFIG_SUN3
2150 if (sun3_dma_setup_done != tmp) {
2151 int count;
2152
2153 advance_sg_buffer(ncmd);
2154
2155 count = sun3scsi_dma_xfer_len(hostdata, tmp);
2156
2157 if (count > 0) {
2158 if (tmp->sc_data_direction == DMA_TO_DEVICE)
2159 sun3scsi_dma_send_setup(hostdata,
2160 ncmd->ptr, count);
2161 else
2162 sun3scsi_dma_recv_setup(hostdata,
2163 ncmd->ptr, count);
2164 sun3_dma_setup_done = tmp;
2165 }
2166 }
2167
2168 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2169#endif /* CONFIG_SUN3 */
2170
2171 /* Accept message by clearing ACK */
2172 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2173
2174 hostdata->connected = tmp;
2175 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2176 scmd_id(tmp), tmp->device->lun);
2177}
2178
2179/**
2180 * list_find_cmd - test for presence of a command in a linked list
2181 * @haystack: list of commands
2182 * @needle: command to search for
2183 */
2184
2185static bool list_find_cmd(struct list_head *haystack,
2186 struct scsi_cmnd *needle)
2187{
2188 struct NCR5380_cmd *ncmd;
2189
2190 list_for_each_entry(ncmd, haystack, list)
2191 if (NCR5380_to_scmd(ncmd) == needle)
2192 return true;
2193 return false;
2194}
2195
2196/**
2197 * list_remove_cmd - remove a command from linked list
2198 * @haystack: list of commands
2199 * @needle: command to remove
2200 */
2201
2202static bool list_del_cmd(struct list_head *haystack,
2203 struct scsi_cmnd *needle)
2204{
2205 if (list_find_cmd(haystack, needle)) {
2206 struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(needle);
2207
2208 list_del(&ncmd->list);
2209 return true;
2210 }
2211 return false;
2212}
2213
2214/**
2215 * NCR5380_abort - scsi host eh_abort_handler() method
2216 * @cmd: the command to be aborted
2217 *
2218 * Try to abort a given command by removing it from queues and/or sending
2219 * the target an abort message. This may not succeed in causing a target
2220 * to abort the command. Nonetheless, the low-level driver must forget about
2221 * the command because the mid-layer reclaims it and it may be re-issued.
2222 *
2223 * The normal path taken by a command is as follows. For EH we trace this
2224 * same path to locate and abort the command.
2225 *
2226 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2227 * [disconnected -> connected ->]...
2228 * [autosense -> connected ->] done
2229 *
2230 * If cmd was not found at all then presumably it has already been completed,
2231 * in which case return SUCCESS to try to avoid further EH measures.
2232 *
2233 * If the command has not completed yet, we must not fail to find it.
2234 * We have no option but to forget the aborted command (even if it still
2235 * lacks sense data). The mid-layer may re-issue a command that is in error
2236 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2237 * this driver are such that a command can appear on one queue only.
2238 *
2239 * The lock protects driver data structures, but EH handlers also use it
2240 * to serialize their own execution and prevent their own re-entry.
2241 */
2242
2243static int NCR5380_abort(struct scsi_cmnd *cmd)
2244{
2245 struct Scsi_Host *instance = cmd->device->host;
2246 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2247 unsigned long flags;
2248 int result = SUCCESS;
2249
2250 spin_lock_irqsave(&hostdata->lock, flags);
2251
2252#if (NDEBUG & NDEBUG_ANY)
2253 scmd_printk(KERN_INFO, cmd, __func__);
2254#endif
2255 NCR5380_dprint(NDEBUG_ANY, instance);
2256 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2257
2258 if (list_del_cmd(&hostdata->unissued, cmd)) {
2259 dsprintk(NDEBUG_ABORT, instance,
2260 "abort: removed %p from issue queue\n", cmd);
2261 cmd->result = DID_ABORT << 16;
2262 scsi_done(cmd); /* No tag or busy flag to worry about */
2263 goto out;
2264 }
2265
2266 if (hostdata->selecting == cmd) {
2267 dsprintk(NDEBUG_ABORT, instance,
2268 "abort: cmd %p == selecting\n", cmd);
2269 hostdata->selecting = NULL;
2270 cmd->result = DID_ABORT << 16;
2271 complete_cmd(instance, cmd);
2272 goto out;
2273 }
2274
2275 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2276 dsprintk(NDEBUG_ABORT, instance,
2277 "abort: removed %p from disconnected list\n", cmd);
2278 /* Can't call NCR5380_select() and send ABORT because that
2279 * means releasing the lock. Need a bus reset.
2280 */
2281 set_host_byte(cmd, DID_ERROR);
2282 complete_cmd(instance, cmd);
2283 result = FAILED;
2284 goto out;
2285 }
2286
2287 if (hostdata->connected == cmd) {
2288 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2289 hostdata->connected = NULL;
2290 hostdata->dma_len = 0;
2291 if (do_abort(instance, 0) < 0) {
2292 set_host_byte(cmd, DID_ERROR);
2293 complete_cmd(instance, cmd);
2294 result = FAILED;
2295 goto out;
2296 }
2297 set_host_byte(cmd, DID_ABORT);
2298 complete_cmd(instance, cmd);
2299 goto out;
2300 }
2301
2302 if (list_del_cmd(&hostdata->autosense, cmd)) {
2303 dsprintk(NDEBUG_ABORT, instance,
2304 "abort: removed %p from sense queue\n", cmd);
2305 complete_cmd(instance, cmd);
2306 }
2307
2308out:
2309 if (result == FAILED)
2310 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2311 else {
2312 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
2313 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2314 }
2315
2316 queue_work(hostdata->work_q, &hostdata->main_task);
2317 spin_unlock_irqrestore(&hostdata->lock, flags);
2318
2319 return result;
2320}
2321
2322
2323static void bus_reset_cleanup(struct Scsi_Host *instance)
2324{
2325 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2326 int i;
2327 struct NCR5380_cmd *ncmd;
2328
2329 /* reset NCR registers */
2330 NCR5380_write(MODE_REG, MR_BASE);
2331 NCR5380_write(TARGET_COMMAND_REG, 0);
2332 NCR5380_write(SELECT_ENABLE_REG, 0);
2333
2334 /* After the reset, there are no more connected or disconnected commands
2335 * and no busy units; so clear the low-level status here to avoid
2336 * conflicts when the mid-level code tries to wake up the affected
2337 * commands!
2338 */
2339
2340 if (hostdata->selecting) {
2341 hostdata->selecting->result = DID_RESET << 16;
2342 complete_cmd(instance, hostdata->selecting);
2343 hostdata->selecting = NULL;
2344 }
2345
2346 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2347 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2348
2349 set_host_byte(cmd, DID_RESET);
2350 complete_cmd(instance, cmd);
2351 }
2352 INIT_LIST_HEAD(&hostdata->disconnected);
2353
2354 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2355 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2356
2357 scsi_done(cmd);
2358 }
2359 INIT_LIST_HEAD(&hostdata->autosense);
2360
2361 if (hostdata->connected) {
2362 set_host_byte(hostdata->connected, DID_RESET);
2363 complete_cmd(instance, hostdata->connected);
2364 hostdata->connected = NULL;
2365 }
2366
2367 for (i = 0; i < 8; ++i)
2368 hostdata->busy[i] = 0;
2369 hostdata->dma_len = 0;
2370
2371 queue_work(hostdata->work_q, &hostdata->main_task);
2372}
2373
2374/**
2375 * NCR5380_host_reset - reset the SCSI host
2376 * @cmd: SCSI command undergoing EH
2377 *
2378 * Returns SUCCESS
2379 */
2380
2381static int NCR5380_host_reset(struct scsi_cmnd *cmd)
2382{
2383 struct Scsi_Host *instance = cmd->device->host;
2384 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2385 unsigned long flags;
2386 struct NCR5380_cmd *ncmd;
2387
2388 spin_lock_irqsave(&hostdata->lock, flags);
2389
2390#if (NDEBUG & NDEBUG_ANY)
2391 shost_printk(KERN_INFO, instance, __func__);
2392#endif
2393 NCR5380_dprint(NDEBUG_ANY, instance);
2394 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2395
2396 list_for_each_entry(ncmd, &hostdata->unissued, list) {
2397 struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
2398
2399 scmd->result = DID_RESET << 16;
2400 scsi_done(scmd);
2401 }
2402 INIT_LIST_HEAD(&hostdata->unissued);
2403
2404 do_reset(instance);
2405 bus_reset_cleanup(instance);
2406
2407 spin_unlock_irqrestore(&hostdata->lock, flags);
2408
2409 return SUCCESS;
2410}