| 1 |
|
| 2 | |
| 3 | * Copyright 2016 Broadcom
|
| 4 |
|
| 5 |
|
| 6 | #ifndef __SPI_BCM_QSPI_H__
|
| 7 | #define __SPI_BCM_QSPI_H__
|
| 8 |
|
| 9 | #include <linux/types.h>
|
| 10 | #include <linux/io.h>
|
| 11 |
|
| 12 |
|
| 13 | #define INTR_BSPI_LR_OVERREAD_MASK BIT(4)
|
| 14 | #define INTR_BSPI_LR_SESSION_DONE_MASK BIT(3)
|
| 15 | #define INTR_BSPI_LR_IMPATIENT_MASK BIT(2)
|
| 16 | #define INTR_BSPI_LR_SESSION_ABORTED_MASK BIT(1)
|
| 17 | #define INTR_BSPI_LR_FULLNESS_REACHED_MASK BIT(0)
|
| 18 |
|
| 19 | #define BSPI_LR_INTERRUPTS_DATA \
|
| 20 | (INTR_BSPI_LR_SESSION_DONE_MASK | \
|
| 21 | INTR_BSPI_LR_FULLNESS_REACHED_MASK)
|
| 22 |
|
| 23 | #define BSPI_LR_INTERRUPTS_ERROR \
|
| 24 | (INTR_BSPI_LR_OVERREAD_MASK | \
|
| 25 | INTR_BSPI_LR_IMPATIENT_MASK | \
|
| 26 | INTR_BSPI_LR_SESSION_ABORTED_MASK)
|
| 27 |
|
| 28 | #define BSPI_LR_INTERRUPTS_ALL \
|
| 29 | (BSPI_LR_INTERRUPTS_ERROR | \
|
| 30 | BSPI_LR_INTERRUPTS_DATA)
|
| 31 |
|
| 32 |
|
| 33 | #define INTR_MSPI_HALTED_MASK BIT(6)
|
| 34 | #define INTR_MSPI_DONE_MASK BIT(5)
|
| 35 |
|
| 36 | #define MSPI_INTERRUPTS_ALL \
|
| 37 | (INTR_MSPI_DONE_MASK | \
|
| 38 | INTR_MSPI_HALTED_MASK)
|
| 39 |
|
| 40 | #define QSPI_INTERRUPTS_ALL \
|
| 41 | (MSPI_INTERRUPTS_ALL | \
|
| 42 | BSPI_LR_INTERRUPTS_ALL)
|
| 43 |
|
| 44 | struct platform_device;
|
| 45 | struct dev_pm_ops;
|
| 46 |
|
| 47 | enum {
|
| 48 | MSPI_DONE = 0x1,
|
| 49 | BSPI_DONE = 0x2,
|
| 50 | BSPI_ERR = 0x4,
|
| 51 | MSPI_BSPI_DONE = 0x7
|
| 52 | };
|
| 53 |
|
| 54 | struct bcm_qspi_soc_intc {
|
| 55 | void (*bcm_qspi_int_ack)(struct bcm_qspi_soc_intc *soc_intc, int type);
|
| 56 | void (*bcm_qspi_int_set)(struct bcm_qspi_soc_intc *soc_intc, int type,
|
| 57 | bool en);
|
| 58 | u32 (*bcm_qspi_get_int_status)(struct bcm_qspi_soc_intc *soc_intc);
|
| 59 | };
|
| 60 |
|
| 61 |
|
| 62 | static inline u32 bcm_qspi_readl(bool be, void __iomem *addr)
|
| 63 | {
|
| 64 | if (be)
|
| 65 | return ioread32be(addr);
|
| 66 | else
|
| 67 | return readl_relaxed(addr);
|
| 68 | }
|
| 69 |
|
| 70 |
|
| 71 | static inline void bcm_qspi_writel(bool be,
|
| 72 | unsigned int data, void __iomem *addr)
|
| 73 | {
|
| 74 | if (be)
|
| 75 | iowrite32be(data, addr);
|
| 76 | else
|
| 77 | writel_relaxed(data, addr);
|
| 78 | }
|
| 79 |
|
| 80 | static inline u32 get_qspi_mask(int type)
|
| 81 | {
|
| 82 | switch (type) {
|
| 83 | case MSPI_DONE:
|
| 84 | return INTR_MSPI_DONE_MASK;
|
| 85 | case BSPI_DONE:
|
| 86 | return BSPI_LR_INTERRUPTS_ALL;
|
| 87 | case MSPI_BSPI_DONE:
|
| 88 | return QSPI_INTERRUPTS_ALL;
|
| 89 | case BSPI_ERR:
|
| 90 | return BSPI_LR_INTERRUPTS_ERROR;
|
| 91 | }
|
| 92 |
|
| 93 | return 0;
|
| 94 | }
|
| 95 |
|
| 96 |
|
| 97 | int bcm_qspi_probe(struct platform_device *pdev,
|
| 98 | struct bcm_qspi_soc_intc *soc_intc);
|
| 99 | void bcm_qspi_remove(struct platform_device *pdev);
|
| 100 |
|
| 101 |
|
| 102 | extern const struct dev_pm_ops bcm_qspi_pm_ops;
|
| 103 |
|
| 104 | #endif
|