| 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | config INTEL_POWERCLAMP |
| 3 | tristate "Intel PowerClamp idle injection driver" |
| 4 | depends on X86 |
| 5 | depends on CPU_SUP_INTEL |
| 6 | depends on CPU_IDLE |
| 7 | select POWERCAP |
| 8 | select IDLE_INJECT |
| 9 | help |
| 10 | Enable this to enable Intel PowerClamp idle injection driver. This |
| 11 | enforce idle time which results in more package C-state residency. The |
| 12 | user interface is exposed via generic thermal framework. |
| 13 | |
| 14 | config X86_THERMAL_VECTOR |
| 15 | def_bool y |
| 16 | depends on X86 && CPU_SUP_INTEL && X86_LOCAL_APIC |
| 17 | |
| 18 | config INTEL_TCC |
| 19 | bool |
| 20 | depends on X86 |
| 21 | |
| 22 | config X86_PKG_TEMP_THERMAL |
| 23 | tristate "X86 package temperature thermal driver" |
| 24 | depends on X86_THERMAL_VECTOR && NET |
| 25 | select THERMAL_NETLINK |
| 26 | select INTEL_TCC |
| 27 | default m |
| 28 | help |
| 29 | Enable this to register CPU digital sensor for package temperature as |
| 30 | thermal zone. Each package will have its own thermal zone. There are |
| 31 | two trip points which can be set by user to get notifications via thermal |
| 32 | notification methods. |
| 33 | |
| 34 | config INTEL_SOC_DTS_IOSF_CORE |
| 35 | tristate |
| 36 | depends on X86 && PCI |
| 37 | select IOSF_MBI |
| 38 | select INTEL_TCC |
| 39 | help |
| 40 | This is becoming a common feature for Intel SoCs to expose the additional |
| 41 | digital temperature sensors (DTSs) using side band interface (IOSF). This |
| 42 | implements the common set of helper functions to register, get temperature |
| 43 | and get/set thresholds on DTSs. |
| 44 | |
| 45 | config INTEL_SOC_DTS_THERMAL |
| 46 | tristate "Intel SoCs DTS thermal driver" |
| 47 | depends on X86_64 && PCI && ACPI && NET |
| 48 | select INT340X_THERMAL |
| 49 | select INTEL_SOC_DTS_IOSF_CORE |
| 50 | help |
| 51 | Enable this to register Intel SoCs (e.g. Bay Trail) platform digital |
| 52 | temperature sensor (DTS). These SoCs have two additional DTSs in |
| 53 | addition to DTSs on CPU cores. Each DTS will be registered as a |
| 54 | thermal zone. There are two trip points. One of the trip point can |
| 55 | be set by user mode programs to get notifications via Linux thermal |
| 56 | notification methods.The other trip is a critical trip point, which |
| 57 | was set by the driver based on the TJ MAX temperature. |
| 58 | |
| 59 | config INTEL_QUARK_DTS_THERMAL |
| 60 | tristate "Intel Quark DTS thermal driver" |
| 61 | depends on X86_INTEL_QUARK |
| 62 | help |
| 63 | Enable this to register Intel Quark SoC (e.g. X1000) platform digital |
| 64 | temperature sensor (DTS). For X1000 SoC, it has one on-die DTS. |
| 65 | The DTS will be registered as a thermal zone. There are two trip points: |
| 66 | hot & critical. The critical trip point default value is set by |
| 67 | underlying BIOS/Firmware. |
| 68 | |
| 69 | menu "ACPI INT340X thermal drivers" |
| 70 | source "drivers/thermal/intel/int340x_thermal/Kconfig" |
| 71 | endmenu |
| 72 | |
| 73 | config INTEL_BXT_PMIC_THERMAL |
| 74 | tristate "Intel Broxton PMIC thermal driver" |
| 75 | depends on X86 && INTEL_SOC_PMIC_BXTWC |
| 76 | select REGMAP |
| 77 | help |
| 78 | Select this driver for Intel Broxton PMIC with ADC channels monitoring |
| 79 | system temperature measurements and alerts. |
| 80 | This driver is used for monitoring the ADC channels of PMIC and handles |
| 81 | the alert trip point interrupts and notifies the thermal framework with |
| 82 | the trip point and temperature details of the zone. |
| 83 | |
| 84 | config INTEL_PCH_THERMAL |
| 85 | tristate "Intel PCH Thermal Reporting Driver" |
| 86 | depends on X86 && PCI |
| 87 | select ACPI_THERMAL_LIB if ACPI |
| 88 | help |
| 89 | Enable this to support thermal reporting on certain intel PCHs. |
| 90 | Thermal reporting device will provide temperature reading, |
| 91 | programmable trip points and other information. |
| 92 | |
| 93 | config INTEL_TCC_COOLING |
| 94 | tristate "Intel TCC offset cooling Driver" |
| 95 | depends on X86 |
| 96 | select INTEL_TCC |
| 97 | help |
| 98 | Enable this to support system cooling by adjusting the effective TCC |
| 99 | activation temperature via the TCC Offset register, which is widely |
| 100 | supported on modern Intel platforms. |
| 101 | Note that, on different platforms, the behavior might be different |
| 102 | on how fast the setting takes effect, and how much the CPU frequency |
| 103 | is reduced. |
| 104 | |
| 105 | config INTEL_HFI_THERMAL |
| 106 | bool "Intel Hardware Feedback Interface" |
| 107 | depends on NET |
| 108 | depends on CPU_SUP_INTEL |
| 109 | depends on X86_THERMAL_VECTOR |
| 110 | select THERMAL_NETLINK |
| 111 | help |
| 112 | Select this option to enable the Hardware Feedback Interface. If |
| 113 | selected, hardware provides guidance to the operating system on |
| 114 | the performance and energy efficiency capabilities of each CPU. |
| 115 | These capabilities may change as a result of changes in the operating |
| 116 | conditions of the system such power and thermal limits. If selected, |
| 117 | the kernel relays updates in CPUs' capabilities to userspace. |