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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * dz.c: Serial port driver for DECstations equipped
4 * with the DZ chipset.
5 *
6 * Copyright (C) 1998 Olivier A. D. Lebaillif
7 *
8 * Email: [email protected]
9 *
10 * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
11 *
12 * [31-AUG-98] triemer
13 * Changed IRQ to use Harald's dec internals interrupts.h
14 * removed base_addr code - moving address assignment to setup.c
15 * Changed name of dz_init to rs_init to be consistent with tc code
16 * [13-NOV-98] triemer fixed code to receive characters
17 * after patches by harald to irq code.
18 * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
19 * field from "current" - somewhere between 2.1.121 and 2.1.131
20 Qua Jun 27 15:02:26 BRT 2001
21 * [27-JUN-2001] Arnaldo Carvalho de Melo <[email protected]> - cleanups
22 *
23 * Parts (C) 1999 David Airlie, [email protected]
24 * [07-SEP-99] Bugfixes
25 *
26 * [06-Jan-2002] Russell King <[email protected]>
27 * Converted to new serial core
28 */
29
30#undef DEBUG_DZ
31
32#include <linux/bitops.h>
33#include <linux/compiler.h>
34#include <linux/console.h>
35#include <linux/delay.h>
36#include <linux/errno.h>
37#include <linux/init.h>
38#include <linux/interrupt.h>
39#include <linux/ioport.h>
40#include <linux/kernel.h>
41#include <linux/major.h>
42#include <linux/module.h>
43#include <linux/platform_device.h>
44#include <linux/serial.h>
45#include <linux/serial_core.h>
46#include <linux/sysrq.h>
47#include <linux/tty.h>
48#include <linux/tty_flip.h>
49
50#include <linux/atomic.h>
51#include <linux/io.h>
52
53#include "dz.h"
54
55
56MODULE_DESCRIPTION("DECstation DZ serial driver");
57MODULE_LICENSE("GPL");
58
59
60static char dz_name[] __initdata = "DECstation DZ serial driver version ";
61static char dz_version[] __initdata = "1.05";
62
63#define DZ_IO_SIZE 0x20 /* IOMEM space size. */
64
65struct dz_port {
66 struct dz_mux *mux;
67 struct uart_port port;
68 unsigned int cflag;
69};
70
71struct dz_mux {
72 struct dz_port dport[DZ_NB_PORT];
73 atomic_t map_guard;
74 atomic_t irq_guard;
75 int initialised;
76};
77
78static struct dz_mux dz_mux;
79static struct uart_driver dz_reg;
80
81static inline struct dz_port *to_dport(struct uart_port *uport)
82{
83 return container_of(uport, struct dz_port, port);
84}
85
86/*
87 * ------------------------------------------------------------
88 * dz_in () and dz_out ()
89 *
90 * These routines are used to access the registers of the DZ
91 * chip, hiding relocation differences between implementation.
92 * ------------------------------------------------------------
93 */
94
95static u16 dz_in(struct dz_port *dport, unsigned offset)
96{
97 void __iomem *addr = dport->port.membase + offset;
98
99 return readw(addr);
100}
101
102static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
103{
104 void __iomem *addr = dport->port.membase + offset;
105
106 writew(value, addr);
107}
108
109/*
110 * ------------------------------------------------------------
111 * rs_stop () and rs_start ()
112 *
113 * These routines are called before setting or resetting
114 * tty->flow.stopped. They enable or disable transmitter interrupts,
115 * as necessary.
116 * ------------------------------------------------------------
117 */
118
119static void dz_stop_tx(struct uart_port *uport)
120{
121 struct dz_port *dport = to_dport(uport);
122 u16 tmp, mask = 1 << dport->port.line;
123
124 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
125 tmp &= ~mask; /* clear the TX flag */
126 dz_out(dport, DZ_TCR, tmp);
127}
128
129static void dz_start_tx(struct uart_port *uport)
130{
131 struct dz_port *dport = to_dport(uport);
132 u16 tmp, mask = 1 << dport->port.line;
133
134 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
135 tmp |= mask; /* set the TX flag */
136 dz_out(dport, DZ_TCR, tmp);
137}
138
139static void dz_stop_rx(struct uart_port *uport)
140{
141 struct dz_port *dport = to_dport(uport);
142
143 dport->cflag &= ~DZ_RXENAB;
144 dz_out(dport, DZ_LPR, dport->cflag);
145}
146
147/*
148 * ------------------------------------------------------------
149 *
150 * Here start the interrupt handling routines. All of the following
151 * subroutines are declared as inline and are folded into
152 * dz_interrupt. They were separated out for readability's sake.
153 *
154 * Note: dz_interrupt() is a "fast" interrupt, which means that it
155 * runs with interrupts turned off. People who may want to modify
156 * dz_interrupt() should try to keep the interrupt handler as fast as
157 * possible. After you are done making modifications, it is not a bad
158 * idea to do:
159 *
160 * make drivers/serial/dz.s
161 *
162 * and look at the resulting assemble code in dz.s.
163 *
164 * ------------------------------------------------------------
165 */
166
167/*
168 * ------------------------------------------------------------
169 * receive_char ()
170 *
171 * This routine deals with inputs from any lines.
172 * ------------------------------------------------------------
173 */
174static inline void dz_receive_chars(struct dz_mux *mux)
175{
176 struct uart_port *uport;
177 struct dz_port *dport = &mux->dport[0];
178 struct uart_icount *icount;
179 int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
180 u16 status;
181 u8 ch, flag;
182 int i;
183
184 while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
185 dport = &mux->dport[LINE(status)];
186 uport = &dport->port;
187
188 ch = UCHAR(status); /* grab the char */
189 flag = TTY_NORMAL;
190
191 icount = &uport->icount;
192 icount->rx++;
193
194 if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
195
196 /*
197 * There is no separate BREAK status bit, so treat
198 * null characters with framing errors as BREAKs;
199 * normally, otherwise. For this move the Framing
200 * Error bit to a simulated BREAK bit.
201 */
202 if (!ch) {
203 status |= (status & DZ_FERR) >>
204 (ffs(DZ_FERR) - ffs(DZ_BREAK));
205 status &= ~DZ_FERR;
206 }
207
208 /* Handle SysRq/SAK & keep track of the statistics. */
209 if (status & DZ_BREAK) {
210 icount->brk++;
211 if (uart_handle_break(uport))
212 continue;
213 } else if (status & DZ_FERR)
214 icount->frame++;
215 else if (status & DZ_PERR)
216 icount->parity++;
217 if (status & DZ_OERR)
218 icount->overrun++;
219
220 status &= uport->read_status_mask;
221 if (status & DZ_BREAK)
222 flag = TTY_BREAK;
223 else if (status & DZ_FERR)
224 flag = TTY_FRAME;
225 else if (status & DZ_PERR)
226 flag = TTY_PARITY;
227
228 }
229
230 if (uart_handle_sysrq_char(uport, ch))
231 continue;
232
233 uart_insert_char(uport, status, DZ_OERR, ch, flag);
234 lines_rx[LINE(status)] = 1;
235 }
236 for (i = 0; i < DZ_NB_PORT; i++)
237 if (lines_rx[i])
238 tty_flip_buffer_push(&mux->dport[i].port.state->port);
239}
240
241/*
242 * ------------------------------------------------------------
243 * transmit_char ()
244 *
245 * This routine deals with outputs to any lines.
246 * ------------------------------------------------------------
247 */
248static inline void dz_transmit_chars(struct dz_mux *mux)
249{
250 struct dz_port *dport = &mux->dport[0];
251 struct tty_port *tport;
252 unsigned char tmp;
253 u16 status;
254
255 status = dz_in(dport, DZ_CSR);
256 dport = &mux->dport[LINE(status)];
257 tport = &dport->port.state->port;
258
259 if (dport->port.x_char) { /* XON/XOFF chars */
260 dz_out(dport, DZ_TDR, dport->port.x_char);
261 dport->port.icount.tx++;
262 dport->port.x_char = 0;
263 return;
264 }
265 /* If nothing to do or stopped or hardware stopped. */
266 if (uart_tx_stopped(&dport->port) ||
267 !uart_fifo_get(&dport->port, &tmp)) {
268 uart_port_lock(&dport->port);
269 dz_stop_tx(&dport->port);
270 uart_port_unlock(&dport->port);
271 return;
272 }
273
274 /*
275 * If something to do... (remember the dz has no output fifo,
276 * so we go one char at a time) :-<
277 */
278 dz_out(dport, DZ_TDR, tmp);
279
280 if (kfifo_len(&tport->xmit_fifo) < DZ_WAKEUP_CHARS)
281 uart_write_wakeup(&dport->port);
282
283 /* Are we are done. */
284 if (kfifo_is_empty(&tport->xmit_fifo)) {
285 uart_port_lock(&dport->port);
286 dz_stop_tx(&dport->port);
287 uart_port_unlock(&dport->port);
288 }
289}
290
291/*
292 * ------------------------------------------------------------
293 * check_modem_status()
294 *
295 * DS 3100 & 5100: Only valid for the MODEM line, duh!
296 * DS 5000/200: Valid for the MODEM and PRINTER line.
297 * ------------------------------------------------------------
298 */
299static inline void check_modem_status(struct dz_port *dport)
300{
301 /*
302 * FIXME:
303 * 1. No status change interrupt; use a timer.
304 * 2. Handle the 3100/5000 as appropriate. --macro
305 */
306 u16 status;
307
308 /* If not the modem line just return. */
309 if (dport->port.line != DZ_MODEM)
310 return;
311
312 status = dz_in(dport, DZ_MSR);
313
314 /* it's easy, since DSR2 is the only bit in the register */
315 if (status)
316 dport->port.icount.dsr++;
317}
318
319/*
320 * ------------------------------------------------------------
321 * dz_interrupt ()
322 *
323 * this is the main interrupt routine for the DZ chip.
324 * It deals with the multiple ports.
325 * ------------------------------------------------------------
326 */
327static irqreturn_t dz_interrupt(int irq, void *dev_id)
328{
329 struct dz_mux *mux = dev_id;
330 struct dz_port *dport = &mux->dport[0];
331 u16 status;
332
333 /* get the reason why we just got an irq */
334 status = dz_in(dport, DZ_CSR);
335
336 if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
337 dz_receive_chars(mux);
338
339 if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
340 dz_transmit_chars(mux);
341
342 return IRQ_HANDLED;
343}
344
345/*
346 * -------------------------------------------------------------------
347 * Here ends the DZ interrupt routines.
348 * -------------------------------------------------------------------
349 */
350
351static unsigned int dz_get_mctrl(struct uart_port *uport)
352{
353 /*
354 * FIXME: Handle the 3100/5000 as appropriate. --macro
355 */
356 struct dz_port *dport = to_dport(uport);
357 unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
358
359 if (dport->port.line == DZ_MODEM) {
360 if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
361 mctrl &= ~TIOCM_DSR;
362 }
363
364 return mctrl;
365}
366
367static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
368{
369 /*
370 * FIXME: Handle the 3100/5000 as appropriate. --macro
371 */
372 struct dz_port *dport = to_dport(uport);
373 u16 tmp;
374
375 if (dport->port.line == DZ_MODEM) {
376 tmp = dz_in(dport, DZ_TCR);
377 if (mctrl & TIOCM_DTR)
378 tmp &= ~DZ_MODEM_DTR;
379 else
380 tmp |= DZ_MODEM_DTR;
381 dz_out(dport, DZ_TCR, tmp);
382 }
383}
384
385/*
386 * -------------------------------------------------------------------
387 * startup ()
388 *
389 * various initialization tasks
390 * -------------------------------------------------------------------
391 */
392static int dz_startup(struct uart_port *uport)
393{
394 struct dz_port *dport = to_dport(uport);
395 struct dz_mux *mux = dport->mux;
396 unsigned long flags;
397 int irq_guard;
398 int ret;
399 u16 tmp;
400
401 irq_guard = atomic_add_return(1, &mux->irq_guard);
402 if (irq_guard != 1)
403 return 0;
404
405 ret = request_irq(dport->port.irq, dz_interrupt,
406 IRQF_SHARED, "dz", mux);
407 if (ret) {
408 atomic_add(-1, &mux->irq_guard);
409 printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
410 return ret;
411 }
412
413 uart_port_lock_irqsave(&dport->port, &flags);
414
415 /* Enable interrupts. */
416 tmp = dz_in(dport, DZ_CSR);
417 tmp |= DZ_RIE | DZ_TIE;
418 dz_out(dport, DZ_CSR, tmp);
419
420 uart_port_unlock_irqrestore(&dport->port, flags);
421
422 return 0;
423}
424
425/*
426 * -------------------------------------------------------------------
427 * shutdown ()
428 *
429 * This routine will shutdown a serial port; interrupts are disabled, and
430 * DTR is dropped if the hangup on close termio flag is on.
431 * -------------------------------------------------------------------
432 */
433static void dz_shutdown(struct uart_port *uport)
434{
435 struct dz_port *dport = to_dport(uport);
436 struct dz_mux *mux = dport->mux;
437 unsigned long flags;
438 int irq_guard;
439 u16 tmp;
440
441 uart_port_lock_irqsave(&dport->port, &flags);
442 dz_stop_tx(&dport->port);
443 uart_port_unlock_irqrestore(&dport->port, flags);
444
445 irq_guard = atomic_add_return(-1, &mux->irq_guard);
446 if (!irq_guard) {
447 /* Disable interrupts. */
448 tmp = dz_in(dport, DZ_CSR);
449 tmp &= ~(DZ_RIE | DZ_TIE);
450 dz_out(dport, DZ_CSR, tmp);
451
452 free_irq(dport->port.irq, mux);
453 }
454}
455
456/*
457 * -------------------------------------------------------------------
458 * dz_tx_empty() -- get the transmitter empty status
459 *
460 * Purpose: Let user call ioctl() to get info when the UART physically
461 * is emptied. On bus types like RS485, the transmitter must
462 * release the bus after transmitting. This must be done when
463 * the transmit shift register is empty, not be done when the
464 * transmit holding register is empty. This functionality
465 * allows an RS485 driver to be written in user space.
466 * -------------------------------------------------------------------
467 */
468static unsigned int dz_tx_empty(struct uart_port *uport)
469{
470 struct dz_port *dport = to_dport(uport);
471 unsigned short tmp, mask = 1 << dport->port.line;
472
473 tmp = dz_in(dport, DZ_TCR);
474 tmp &= mask;
475
476 return tmp ? 0 : TIOCSER_TEMT;
477}
478
479static void dz_break_ctl(struct uart_port *uport, int break_state)
480{
481 /*
482 * FIXME: Can't access BREAK bits in TDR easily;
483 * reuse the code for polled TX. --macro
484 */
485 struct dz_port *dport = to_dport(uport);
486 unsigned long flags;
487 unsigned short tmp, mask = 1 << dport->port.line;
488
489 uart_port_lock_irqsave(uport, &flags);
490 tmp = dz_in(dport, DZ_TCR);
491 if (break_state)
492 tmp |= mask;
493 else
494 tmp &= ~mask;
495 dz_out(dport, DZ_TCR, tmp);
496 uart_port_unlock_irqrestore(uport, flags);
497}
498
499static int dz_encode_baud_rate(unsigned int baud)
500{
501 switch (baud) {
502 case 50:
503 return DZ_B50;
504 case 75:
505 return DZ_B75;
506 case 110:
507 return DZ_B110;
508 case 134:
509 return DZ_B134;
510 case 150:
511 return DZ_B150;
512 case 300:
513 return DZ_B300;
514 case 600:
515 return DZ_B600;
516 case 1200:
517 return DZ_B1200;
518 case 1800:
519 return DZ_B1800;
520 case 2000:
521 return DZ_B2000;
522 case 2400:
523 return DZ_B2400;
524 case 3600:
525 return DZ_B3600;
526 case 4800:
527 return DZ_B4800;
528 case 7200:
529 return DZ_B7200;
530 case 9600:
531 return DZ_B9600;
532 default:
533 return -1;
534 }
535}
536
537
538static void dz_reset(struct dz_port *dport)
539{
540 struct dz_mux *mux = dport->mux;
541 unsigned short tcr;
542 int loops = 10000;
543
544 if (mux->initialised)
545 return;
546
547 tcr = dz_in(dport, DZ_TCR);
548
549 /* Do not disturb any ongoing transmissions. */
550 if (dz_in(dport, DZ_CSR) & DZ_MSE) {
551 unsigned short csr, mask;
552
553 mask = tcr;
554 while ((mask & DZ_LNENB) && loops--) {
555 csr = dz_in(dport, DZ_CSR);
556 if (!(csr & DZ_TRDY))
557 continue;
558 mask &= ~(1 << ((csr & DZ_TLINE) >> 8));
559 dz_out(dport, DZ_TCR, mask);
560 iob();
561 udelay(2); /* 1.4us TRDY recovery. */
562 }
563 fsleep(1200); /* Transmitter drain. */
564 }
565
566 dz_out(dport, DZ_CSR, DZ_CLR);
567 while (dz_in(dport, DZ_CSR) & DZ_CLR);
568 iob();
569
570 /*
571 * Set parameters across all lines such as not to interfere
572 * with the initial PROM-based console. Otherwise any output
573 * produced before the console handover would cause the system
574 * firmware to produce rubbish.
575 */
576 for (int line = 0; line < DZ_NB_PORT; line++)
577 dz_out(dport, DZ_LPR, DZ_B9600 | DZ_CS8 | line);
578
579 /* Re-enable transmission for the initial PROM-based console. */
580 dz_out(dport, DZ_TCR, tcr);
581
582 /* Enable scanning. */
583 dz_out(dport, DZ_CSR, DZ_MSE);
584
585 mux->initialised = 1;
586}
587
588static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
589 const struct ktermios *old_termios)
590{
591 struct dz_port *dport = to_dport(uport);
592 unsigned long flags;
593 unsigned int cflag, baud;
594 int bflag;
595
596 cflag = dport->port.line;
597
598 switch (termios->c_cflag & CSIZE) {
599 case CS5:
600 cflag |= DZ_CS5;
601 break;
602 case CS6:
603 cflag |= DZ_CS6;
604 break;
605 case CS7:
606 cflag |= DZ_CS7;
607 break;
608 case CS8:
609 default:
610 cflag |= DZ_CS8;
611 }
612
613 if (termios->c_cflag & CSTOPB)
614 cflag |= DZ_CSTOPB;
615 if (termios->c_cflag & PARENB)
616 cflag |= DZ_PARENB;
617 if (termios->c_cflag & PARODD)
618 cflag |= DZ_PARODD;
619
620 baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
621 bflag = dz_encode_baud_rate(baud);
622 if (bflag < 0) {
623 if (old_termios) {
624 /* Keep unchanged. */
625 baud = tty_termios_baud_rate(old_termios);
626 bflag = dz_encode_baud_rate(baud);
627 }
628 if (bflag < 0) { /* Resort to 9600. */
629 baud = 9600;
630 bflag = DZ_B9600;
631 }
632 tty_termios_encode_baud_rate(termios, baud, baud);
633 }
634 cflag |= bflag;
635
636 if (termios->c_cflag & CREAD)
637 cflag |= DZ_RXENAB;
638
639 uart_port_lock_irqsave(&dport->port, &flags);
640
641 uart_update_timeout(uport, termios->c_cflag, baud);
642
643 dz_out(dport, DZ_LPR, cflag);
644 dport->cflag = cflag;
645
646 /* setup accept flag */
647 dport->port.read_status_mask = DZ_OERR;
648 if (termios->c_iflag & INPCK)
649 dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
650 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
651 dport->port.read_status_mask |= DZ_BREAK;
652
653 /* characters to ignore */
654 uport->ignore_status_mask = 0;
655 if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
656 dport->port.ignore_status_mask |= DZ_OERR;
657 if (termios->c_iflag & IGNPAR)
658 dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
659 if (termios->c_iflag & IGNBRK)
660 dport->port.ignore_status_mask |= DZ_BREAK;
661
662 uart_port_unlock_irqrestore(&dport->port, flags);
663}
664
665static const char *dz_type(struct uart_port *uport)
666{
667 return "DZ";
668}
669
670static void dz_release_port(struct uart_port *uport)
671{
672 struct dz_mux *mux = to_dport(uport)->mux;
673 int map_guard;
674
675 iounmap(uport->membase);
676 uport->membase = NULL;
677
678 map_guard = atomic_add_return(-1, &mux->map_guard);
679 if (!map_guard)
680 release_mem_region(uport->mapbase, DZ_IO_SIZE);
681}
682
683static int dz_map_port(struct uart_port *uport)
684{
685 if (!uport->membase)
686 uport->membase = ioremap(uport->mapbase, DZ_IO_SIZE);
687 if (!uport->membase) {
688 printk(KERN_ERR "dz: Cannot map MMIO\n");
689 return -ENOMEM;
690 }
691 return 0;
692}
693
694static int dz_request_port(struct uart_port *uport)
695{
696 struct dz_mux *mux = to_dport(uport)->mux;
697 int map_guard;
698 int ret;
699
700 map_guard = atomic_add_return(1, &mux->map_guard);
701 if (map_guard == 1) {
702 if (!request_mem_region(uport->mapbase, DZ_IO_SIZE, "dz")) {
703 atomic_add(-1, &mux->map_guard);
704 printk(KERN_ERR
705 "dz: Unable to reserve MMIO resource\n");
706 return -EBUSY;
707 }
708 }
709 ret = dz_map_port(uport);
710 if (ret) {
711 map_guard = atomic_add_return(-1, &mux->map_guard);
712 if (!map_guard)
713 release_mem_region(uport->mapbase, DZ_IO_SIZE);
714 return ret;
715 }
716 return 0;
717}
718
719static void dz_config_port(struct uart_port *uport, int flags)
720{
721 struct dz_port *dport = to_dport(uport);
722
723 if (flags & UART_CONFIG_TYPE) {
724 if (dz_request_port(uport))
725 return;
726
727 uport->type = PORT_DZ;
728
729 dz_reset(dport);
730 }
731}
732
733/*
734 * Verify the new serial_struct (for TIOCSSERIAL).
735 */
736static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
737{
738 int ret = 0;
739
740 if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
741 ret = -EINVAL;
742 if (ser->irq != uport->irq)
743 ret = -EINVAL;
744 return ret;
745}
746
747static const struct uart_ops dz_ops = {
748 .tx_empty = dz_tx_empty,
749 .get_mctrl = dz_get_mctrl,
750 .set_mctrl = dz_set_mctrl,
751 .stop_tx = dz_stop_tx,
752 .start_tx = dz_start_tx,
753 .stop_rx = dz_stop_rx,
754 .break_ctl = dz_break_ctl,
755 .startup = dz_startup,
756 .shutdown = dz_shutdown,
757 .set_termios = dz_set_termios,
758 .type = dz_type,
759 .release_port = dz_release_port,
760 .request_port = dz_request_port,
761 .config_port = dz_config_port,
762 .verify_port = dz_verify_port,
763};
764
765static int __init dz_probe(struct platform_device *pdev)
766{
767 struct resource *mem_resource, *irq_resource;
768 int line;
769
770 mem_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
771 irq_resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
772 if (!mem_resource || !irq_resource)
773 return -ENODEV;
774
775 for (line = 0; line < DZ_NB_PORT; line++) {
776 struct dz_port *dport = &dz_mux.dport[line];
777 struct uart_port *uport = &dport->port;
778
779 dport->mux = &dz_mux;
780
781 uport->dev = &pdev->dev;
782 uport->irq = irq_resource->start;
783 uport->fifosize = 1;
784 uport->iotype = UPIO_MEM;
785 uport->flags = UPF_BOOT_AUTOCONF;
786 uport->ops = &dz_ops;
787 uport->line = line;
788 uport->mapbase = mem_resource->start;
789 uport->has_sysrq = IS_ENABLED(CONFIG_SERIAL_DZ_CONSOLE);
790
791 if (uart_add_one_port(&dz_reg, uport))
792 uport->dev = NULL;
793 }
794
795 return 0;
796}
797
798static void __exit dz_remove(struct platform_device *pdev)
799{
800 int line;
801
802 for (line = DZ_NB_PORT - 1; line >= 0; line--) {
803 struct dz_port *dport = &dz_mux.dport[line];
804 struct uart_port *uport = &dport->port;
805
806 if (uport->dev)
807 uart_remove_one_port(&dz_reg, uport);
808 }
809}
810
811#ifdef CONFIG_SERIAL_DZ_CONSOLE
812/*
813 * -------------------------------------------------------------------
814 * dz_console_putchar() -- transmit a character
815 *
816 * Polled transmission. This is tricky. We need to mask transmit
817 * interrupts so that they do not interfere, enable the transmitter
818 * for the line requested and then wait till the transmit scanner
819 * requests data for this line. But it may request data for another
820 * line first, in which case we have to disable its transmitter and
821 * repeat waiting till our line pops up. Only then the character may
822 * be transmitted. Finally, the state of the transmitter mask is
823 * restored. Welcome to the world of PDP-11!
824 * -------------------------------------------------------------------
825 */
826static void dz_console_putchar(struct uart_port *uport, unsigned char ch)
827{
828 struct dz_port *dport = to_dport(uport);
829 unsigned long flags;
830 unsigned short csr, tcr, trdy, mask;
831 int loops = 10000;
832
833 uart_port_lock_irqsave(&dport->port, &flags);
834 csr = dz_in(dport, DZ_CSR);
835 dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
836 tcr = dz_in(dport, DZ_TCR);
837 tcr |= 1 << dport->port.line;
838 mask = tcr;
839 dz_out(dport, DZ_TCR, mask);
840 iob();
841 uart_port_unlock_irqrestore(&dport->port, flags);
842
843 do {
844 trdy = dz_in(dport, DZ_CSR);
845 if (!(trdy & DZ_TRDY))
846 continue;
847 trdy = (trdy & DZ_TLINE) >> 8;
848 if (trdy == dport->port.line)
849 break;
850 mask &= ~(1 << trdy);
851 dz_out(dport, DZ_TCR, mask);
852 iob();
853 udelay(2);
854 } while (--loops);
855
856 if (loops) /* Cannot send otherwise. */
857 dz_out(dport, DZ_TDR, ch);
858
859 dz_out(dport, DZ_TCR, tcr);
860 dz_out(dport, DZ_CSR, csr);
861}
862
863/*
864 * -------------------------------------------------------------------
865 * dz_console_print ()
866 *
867 * dz_console_print is registered for printk.
868 * The console must be locked when we get here.
869 * -------------------------------------------------------------------
870 */
871static void dz_console_print(struct console *co,
872 const char *str,
873 unsigned int count)
874{
875 struct dz_port *dport = &dz_mux.dport[co->index];
876#ifdef DEBUG_DZ
877 prom_printf((char *) str);
878#endif
879 uart_console_write(&dport->port, str, count, dz_console_putchar);
880}
881
882static int __init dz_console_setup(struct console *co, char *options)
883{
884 struct dz_port *dport = &dz_mux.dport[co->index];
885 struct uart_port *uport = &dport->port;
886 int baud = 9600;
887 int bits = 8;
888 int parity = 'n';
889 int flow = 'n';
890
891 if (!dport->mux)
892 return -ENODEV;
893 if (options)
894 uart_parse_options(options, &baud, &parity, &bits, &flow);
895 return uart_set_options(uport, co, baud, parity, bits, flow);
896}
897
898static struct console dz_console = {
899 .name = "ttyS",
900 .write = dz_console_print,
901 .device = uart_console_device,
902 .setup = dz_console_setup,
903 .flags = CON_PRINTBUFFER,
904 .index = -1,
905 .data = &dz_reg,
906};
907
908#define SERIAL_DZ_CONSOLE &dz_console
909#else
910#define SERIAL_DZ_CONSOLE NULL
911#endif /* CONFIG_SERIAL_DZ_CONSOLE */
912
913static struct uart_driver dz_reg = {
914 .owner = THIS_MODULE,
915 .driver_name = "serial_dz",
916 .dev_name = "ttyS",
917 .major = TTY_MAJOR,
918 .minor = 64,
919 .nr = DZ_NB_PORT,
920 .cons = SERIAL_DZ_CONSOLE,
921};
922
923static struct platform_driver dz_driver = {
924 .remove = __exit_p(dz_remove),
925 .driver = { .name = "dz" },
926};
927
928static int __init dz_init(void)
929{
930 int ret;
931
932 printk("%s%s\n", dz_name, dz_version);
933
934 ret = uart_register_driver(&dz_reg);
935 if (ret)
936 return ret;
937 ret = platform_driver_probe(&dz_driver, dz_probe);
938 if (ret)
939 uart_unregister_driver(&dz_reg);
940
941 return ret;
942}
943
944static void __exit dz_exit(void)
945{
946 platform_driver_unregister(&dz_driver);
947 uart_unregister_driver(&dz_reg);
948}
949
950module_init(dz_init);
951module_exit(dz_exit);