| 1 |
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| 2 | |
| 3 | * Cadence USBSS and USBSSP DRD Header File.
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| 4 | *
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| 5 | * Copyright (C) 2017-2018 NXP
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| 6 | * Copyright (C) 2018-2019 Cadence.
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| 7 | *
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| 8 | * Authors: Peter Chen <[email protected]>
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| 9 | * Pawel Laszczak <[email protected]>
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| 10 |
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| 11 | #ifndef __LINUX_CDNS3_CORE_H
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| 12 | #define __LINUX_CDNS3_CORE_H
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| 13 |
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| 14 | #include <linux/usb/otg.h>
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| 15 | #include <linux/usb/role.h>
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| 16 |
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| 17 | struct cdns;
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| 18 |
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| 19 | |
| 20 | * struct cdns_role_driver - host/gadget role driver
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| 21 | * @start: start this role
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| 22 | * @stop: stop this role
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| 23 | * @suspend: suspend callback for this role
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| 24 | * @resume: resume callback for this role
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| 25 | * @irq: irq handler for this role
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| 26 | * @name: role name string (host/gadget)
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| 27 | * @state: current state
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| 28 |
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| 29 | struct cdns_role_driver {
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| 30 | int (*start)(struct cdns *cdns);
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| 31 | void (*stop)(struct cdns *cdns);
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| 32 | int (*suspend)(struct cdns *cdns, bool do_wakeup);
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| 33 | int (*resume)(struct cdns *cdns, bool lost_power);
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| 34 | const char *name;
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| 35 | #define CDNS_ROLE_STATE_INACTIVE 0
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| 36 | #define CDNS_ROLE_STATE_ACTIVE 1
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| 37 | int state;
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| 38 | };
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| 39 |
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| 40 | #define CDNS_XHCI_RESOURCES_NUM 2
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| 41 |
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| 42 | struct cdns3_platform_data {
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| 43 | int (*platform_suspend)(struct device *dev,
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| 44 | bool suspend, bool wakeup);
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| 45 | unsigned long quirks;
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| 46 | #define CDNS3_DEFAULT_PM_RUNTIME_ALLOW BIT(0)
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| 47 | #define CDNS3_DRD_SUSPEND_RESIDENCY_ENABLE BIT(1)
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| 48 | u32 override_apb_timeout;
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| 49 | };
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| 50 |
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| 51 | |
| 52 | * struct cdns - Representation of Cadence USB3 DRD controller.
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| 53 | * @dev: pointer to Cadence device struct
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| 54 | * @xhci_regs: pointer to base of xhci registers
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| 55 | * @xhci_res: the resource for xhci
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| 56 | * @dev_regs: pointer to base of dev registers
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| 57 | * @otg_res: the resource for otg
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| 58 | * @otg_v0_regs: pointer to base of v0 otg registers
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| 59 | * @otg_v1_regs: pointer to base of v1 otg registers
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| 60 | * @otg_cdnsp_regs: pointer to base of CDNSP otg registers
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| 61 | * @otg_regs: pointer to base of otg registers
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| 62 | * @otg_irq_regs: pointer to interrupt registers
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| 63 | * @otg_irq: irq number for otg controller
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| 64 | * @dev_irq: irq number for device controller
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| 65 | * @wakeup_irq: irq number for wakeup event, it is optional
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| 66 | * @roles: array of supported roles for this controller
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| 67 | * @role: current role
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| 68 | * @host_dev: the child host device pointer for cdns core
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| 69 | * @gadget_dev: the child gadget device pointer
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| 70 | * @usb2_phy: pointer to USB2 PHY
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| 71 | * @usb3_phy: pointer to USB3 PHY
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| 72 | * @mutex: the mutex for concurrent code at driver
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| 73 | * @dr_mode: supported mode of operation it can be only Host, only Device
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| 74 | * or OTG mode that allow to switch between Device and Host mode.
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| 75 | * This field based on firmware setting, kernel configuration
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| 76 | * and hardware configuration.
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| 77 | * @role_sw: pointer to role switch object.
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| 78 | * @in_lpm: indicate the controller is in low power mode
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| 79 | * @wakeup_pending: wakeup interrupt pending
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| 80 | * @pdata: platform data from glue layer
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| 81 | * @lock: spinlock structure
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| 82 | * @xhci_plat_data: xhci private data structure pointer
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| 83 | * @override_apb_timeout: hold value of APB timeout. For value 0 the default
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| 84 | * value in CHICKEN_BITS_3 will be preserved.
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| 85 | * @gadget_init: pointer to gadget initialization function
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| 86 | * @host_init: pointer to host initialization function
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| 87 | * @no_drd: DRD register block is inaccessible. The controller is hardwired to
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| 88 | * single role (host or device) or the logic for role switching is
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| 89 | * missing.
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| 90 |
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| 91 | struct cdns {
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| 92 | struct device *dev;
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| 93 | void __iomem *xhci_regs;
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| 94 | struct resource xhci_res[CDNS_XHCI_RESOURCES_NUM];
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| 95 | struct cdns3_usb_regs __iomem *dev_regs;
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| 96 |
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| 97 | struct resource otg_res;
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| 98 | struct cdns3_otg_legacy_regs __iomem *otg_v0_regs;
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| 99 | struct cdns3_otg_regs __iomem *otg_v1_regs;
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| 100 | struct cdnsp_otg_regs __iomem *otg_cdnsp_regs;
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| 101 | struct cdns_otg_common_regs __iomem *otg_regs;
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| 102 | struct cdns_otg_irq_regs __iomem *otg_irq_regs;
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| 103 | #define CDNS3_CONTROLLER_V0 0
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| 104 | #define CDNS3_CONTROLLER_V1 1
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| 105 | #define CDNSP_CONTROLLER_V2 2
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| 106 | u32 version;
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| 107 | bool phyrst_a_enable;
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| 108 |
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| 109 | int otg_irq;
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| 110 | int dev_irq;
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| 111 | int wakeup_irq;
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| 112 | struct cdns_role_driver *roles[USB_ROLE_DEVICE + 1];
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| 113 | enum usb_role role;
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| 114 | struct platform_device *host_dev;
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| 115 | void *gadget_dev;
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| 116 | struct phy *usb2_phy;
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| 117 | struct phy *usb3_phy;
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| 118 |
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| 119 | struct mutex mutex;
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| 120 | enum usb_dr_mode dr_mode;
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| 121 | struct usb_role_switch *role_sw;
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| 122 | bool in_lpm;
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| 123 | bool wakeup_pending;
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| 124 | struct cdns3_platform_data *pdata;
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| 125 | spinlock_t lock;
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| 126 | struct xhci_plat_priv *xhci_plat_data;
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| 127 | u32 override_apb_timeout;
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| 128 | int (*gadget_init)(struct cdns *cdns);
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| 129 | int (*host_init)(struct cdns *cdns);
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| 130 | bool no_drd;
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| 131 | };
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| 132 |
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| 133 | int cdns_hw_role_switch(struct cdns *cdns);
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| 134 | int cdns_init(struct cdns *cdns);
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| 135 | int cdns_remove(struct cdns *cdns);
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| 136 | int cdns_core_init_role(struct cdns *cdns);
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| 137 |
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| 138 | #ifdef CONFIG_PM_SLEEP
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| 139 | int cdns_resume(struct cdns *cdns);
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| 140 | int cdns_suspend(struct cdns *cdns);
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| 141 | void cdns_set_active(struct cdns *cdns, u8 set_active);
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| 142 | #else
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| 143 | static inline int cdns_resume(struct cdns *cdns)
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| 144 | { return 0; }
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| 145 | static inline void cdns_set_active(struct cdns *cdns, u8 set_active) { }
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| 146 | static inline int cdns_suspend(struct cdns *cdns)
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| 147 | { return 0; }
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| 148 | #endif
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| 149 | #endif
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