| 1 | |
| 2 | |
| 3 | * sl28cpld watchdog driver
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| 4 | *
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| 5 | * Copyright 2020 Kontron Europe GmbH
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| 6 |
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| 7 |
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| 8 | #include <linux/kernel.h>
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| 9 | #include <linux/module.h>
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| 10 | #include <linux/platform_device.h>
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| 11 | #include <linux/property.h>
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| 12 | #include <linux/regmap.h>
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| 13 | #include <linux/watchdog.h>
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| 14 |
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| 15 | |
| 16 | * Watchdog timer block registers.
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| 17 |
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| 18 | #define WDT_CTRL 0x00
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| 19 | #define WDT_CTRL_EN BIT(0)
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| 20 | #define WDT_CTRL_LOCK BIT(2)
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| 21 | #define WDT_CTRL_ASSERT_SYS_RESET BIT(6)
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| 22 | #define WDT_CTRL_ASSERT_WDT_TIMEOUT BIT(7)
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| 23 | #define WDT_TIMEOUT 0x01
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| 24 | #define WDT_KICK 0x02
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| 25 | #define WDT_KICK_VALUE 0x6b
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| 26 | #define WDT_COUNT 0x03
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| 27 |
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| 28 | #define WDT_DEFAULT_TIMEOUT 10
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| 29 |
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| 30 | static bool nowayout = WATCHDOG_NOWAYOUT;
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| 31 | module_param(nowayout, bool, 0);
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| 32 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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| 33 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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| 34 |
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| 35 | static int timeout;
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| 36 | module_param(timeout, int, 0);
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| 37 | MODULE_PARM_DESC(timeout, "Initial watchdog timeout in seconds");
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| 38 |
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| 39 | struct sl28cpld_wdt {
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| 40 | struct watchdog_device wdd;
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| 41 | struct regmap *regmap;
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| 42 | u32 offset;
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| 43 | bool assert_wdt_timeout;
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| 44 | };
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| 45 |
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| 46 | static int sl28cpld_wdt_ping(struct watchdog_device *wdd)
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| 47 | {
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| 48 | struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
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| 49 |
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| 50 | return regmap_write(wdt->regmap, wdt->offset + WDT_KICK,
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| 51 | WDT_KICK_VALUE);
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| 52 | }
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| 53 |
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| 54 | static int sl28cpld_wdt_start(struct watchdog_device *wdd)
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| 55 | {
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| 56 | struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
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| 57 | unsigned int val;
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| 58 |
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| 59 | val = WDT_CTRL_EN | WDT_CTRL_ASSERT_SYS_RESET;
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| 60 | if (wdt->assert_wdt_timeout)
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| 61 | val |= WDT_CTRL_ASSERT_WDT_TIMEOUT;
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| 62 | if (nowayout)
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| 63 | val |= WDT_CTRL_LOCK;
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| 64 |
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| 65 | return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL,
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| 66 | val, val);
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| 67 | }
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| 68 |
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| 69 | static int sl28cpld_wdt_stop(struct watchdog_device *wdd)
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| 70 | {
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| 71 | struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
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| 72 |
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| 73 | return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL,
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| 74 | WDT_CTRL_EN, 0);
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| 75 | }
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| 76 |
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| 77 | static unsigned int sl28cpld_wdt_get_timeleft(struct watchdog_device *wdd)
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| 78 | {
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| 79 | struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
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| 80 | unsigned int val;
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| 81 | int ret;
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| 82 |
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| 83 | ret = regmap_read(wdt->regmap, wdt->offset + WDT_COUNT, &val);
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| 84 | if (ret)
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| 85 | return 0;
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| 86 |
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| 87 | return val;
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| 88 | }
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| 89 |
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| 90 | static int sl28cpld_wdt_set_timeout(struct watchdog_device *wdd,
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| 91 | unsigned int timeout)
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| 92 | {
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| 93 | struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
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| 94 | int ret;
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| 95 |
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| 96 | ret = regmap_write(wdt->regmap, wdt->offset + WDT_TIMEOUT, timeout);
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| 97 | if (ret)
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| 98 | return ret;
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| 99 |
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| 100 | wdd->timeout = timeout;
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| 101 |
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| 102 | return 0;
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| 103 | }
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| 104 |
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| 105 | static const struct watchdog_info sl28cpld_wdt_info = {
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| 106 | .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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| 107 | .identity = "sl28cpld watchdog",
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| 108 | };
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| 109 |
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| 110 | static const struct watchdog_ops sl28cpld_wdt_ops = {
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| 111 | .owner = THIS_MODULE,
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| 112 | .start = sl28cpld_wdt_start,
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| 113 | .stop = sl28cpld_wdt_stop,
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| 114 | .ping = sl28cpld_wdt_ping,
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| 115 | .set_timeout = sl28cpld_wdt_set_timeout,
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| 116 | .get_timeleft = sl28cpld_wdt_get_timeleft,
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| 117 | };
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| 118 |
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| 119 | static int sl28cpld_wdt_probe(struct platform_device *pdev)
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| 120 | {
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| 121 | struct watchdog_device *wdd;
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| 122 | struct sl28cpld_wdt *wdt;
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| 123 | unsigned int status;
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| 124 | unsigned int val;
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| 125 | int ret;
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| 126 |
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| 127 | if (!pdev->dev.parent)
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| 128 | return -ENODEV;
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| 129 |
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| 130 | wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
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| 131 | if (!wdt)
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| 132 | return -ENOMEM;
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| 133 |
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| 134 | wdt->regmap = dev_get_regmap(pdev->dev.parent, NULL);
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| 135 | if (!wdt->regmap)
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| 136 | return -ENODEV;
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| 137 |
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| 138 | ret = device_property_read_u32(&pdev->dev, "reg", &wdt->offset);
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| 139 | if (ret)
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| 140 | return -EINVAL;
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| 141 |
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| 142 | wdt->assert_wdt_timeout = device_property_read_bool(&pdev->dev,
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| 143 | "kontron,assert-wdt-timeout-pin");
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| 144 |
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| 145 |
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| 146 | wdd = &wdt->wdd;
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| 147 | wdd->parent = &pdev->dev;
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| 148 | wdd->info = &sl28cpld_wdt_info;
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| 149 | wdd->ops = &sl28cpld_wdt_ops;
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| 150 | wdd->min_timeout = 1;
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| 151 | wdd->max_timeout = 255;
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| 152 |
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| 153 | watchdog_set_drvdata(wdd, wdt);
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| 154 | watchdog_stop_on_reboot(wdd);
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| 155 |
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| 156 | |
| 157 | * Read the status early, in case of an error, we haven't modified the
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| 158 | * hardware.
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| 159 |
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| 160 | ret = regmap_read(wdt->regmap, wdt->offset + WDT_CTRL, &status);
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| 161 | if (ret)
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| 162 | return ret;
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| 163 |
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| 164 | |
| 165 | * Initial timeout value, may be overwritten by device tree or module
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| 166 | * parameter in watchdog_init_timeout().
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| 167 | *
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| 168 | * Reading a zero here means that either the hardware has a default
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| 169 | * value of zero (which is very unlikely and definitely a hardware
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| 170 | * bug) or the bootloader set it to zero. In any case, we handle
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| 171 | * this case gracefully and set out own timeout.
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| 172 |
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| 173 | ret = regmap_read(wdt->regmap, wdt->offset + WDT_TIMEOUT, &val);
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| 174 | if (ret)
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| 175 | return ret;
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| 176 |
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| 177 | if (val)
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| 178 | wdd->timeout = val;
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| 179 | else
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| 180 | wdd->timeout = WDT_DEFAULT_TIMEOUT;
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| 181 |
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| 182 | watchdog_init_timeout(wdd, timeout, &pdev->dev);
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| 183 | sl28cpld_wdt_set_timeout(wdd, wdd->timeout);
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| 184 |
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| 185 |
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| 186 | if (status & WDT_CTRL_LOCK)
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| 187 | nowayout = true;
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| 188 | watchdog_set_nowayout(wdd, nowayout);
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| 189 |
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| 190 | |
| 191 | * If watchdog is already running, keep it enabled, but make
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| 192 | * sure its mode is set correctly.
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| 193 |
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| 194 | if (status & WDT_CTRL_EN) {
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| 195 | sl28cpld_wdt_start(wdd);
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| 196 | set_bit(WDOG_HW_RUNNING, &wdd->status);
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| 197 | }
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| 198 |
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| 199 | ret = devm_watchdog_register_device(&pdev->dev, wdd);
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| 200 | if (ret < 0)
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| 201 | return ret;
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| 202 |
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| 203 | dev_info(&pdev->dev, "initial timeout %d sec%s\n",
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| 204 | wdd->timeout, nowayout ? ", nowayout" : "");
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| 205 |
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| 206 | return 0;
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| 207 | }
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| 208 |
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| 209 | static const struct of_device_id sl28cpld_wdt_of_match[] = {
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| 210 | { .compatible = "kontron,sl28cpld-wdt" },
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| 211 | {}
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| 212 | };
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| 213 | MODULE_DEVICE_TABLE(of, sl28cpld_wdt_of_match);
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| 214 |
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| 215 | static struct platform_driver sl28cpld_wdt_driver = {
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| 216 | .probe = sl28cpld_wdt_probe,
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| 217 | .driver = {
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| 218 | .name = "sl28cpld-wdt",
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| 219 | .of_match_table = sl28cpld_wdt_of_match,
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| 220 | },
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| 221 | };
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| 222 | module_platform_driver(sl28cpld_wdt_driver);
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| 223 |
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| 224 | MODULE_DESCRIPTION("sl28cpld Watchdog Driver");
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| 225 | MODULE_AUTHOR("Michael Walle <[email protected]>");
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| 226 | MODULE_LICENSE("GPL");
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