| 1 |
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| 2 | |
| 3 | * Generic barrier definitions.
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| 4 | *
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| 5 | * It should be possible to use these on really simple architectures,
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| 6 | * but it serves more as a starting point for new ports.
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| 7 | *
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| 8 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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| 9 | * Written by David Howells ([email protected])
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| 10 |
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| 11 | #ifndef __ASM_GENERIC_BARRIER_H
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| 12 | #define __ASM_GENERIC_BARRIER_H
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| 13 |
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| 14 | #ifndef __ASSEMBLY__
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| 15 |
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| 16 | #include <linux/compiler.h>
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| 17 | #include <linux/kcsan-checks.h>
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| 18 | #include <asm/rwonce.h>
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| 19 |
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| 20 | #ifndef nop
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| 21 | #define nop() asm volatile ("nop")
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| 22 | #endif
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| 23 |
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| 24 | |
| 25 | * Architectures that want generic instrumentation can define __ prefixed
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| 26 | * variants of all barriers.
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| 27 |
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| 28 |
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| 29 | #ifdef __mb
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| 30 | #define mb() do { kcsan_mb(); __mb(); } while (0)
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| 31 | #endif
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| 32 |
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| 33 | #ifdef __rmb
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| 34 | #define rmb() do { kcsan_rmb(); __rmb(); } while (0)
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| 35 | #endif
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| 36 |
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| 37 | #ifdef __wmb
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| 38 | #define wmb() do { kcsan_wmb(); __wmb(); } while (0)
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| 39 | #endif
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| 40 |
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| 41 | #ifdef __dma_mb
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| 42 | #define dma_mb() do { kcsan_mb(); __dma_mb(); } while (0)
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| 43 | #endif
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| 44 |
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| 45 | #ifdef __dma_rmb
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| 46 | #define dma_rmb() do { kcsan_rmb(); __dma_rmb(); } while (0)
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| 47 | #endif
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| 48 |
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| 49 | #ifdef __dma_wmb
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| 50 | #define dma_wmb() do { kcsan_wmb(); __dma_wmb(); } while (0)
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| 51 | #endif
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| 52 |
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| 53 | |
| 54 | * Force strict CPU ordering. And yes, this is required on UP too when we're
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| 55 | * talking to devices.
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| 56 | *
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| 57 | * Fall back to compiler barriers if nothing better is provided.
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| 58 |
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| 59 |
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| 60 | #ifndef mb
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| 61 | #define mb() barrier()
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| 62 | #endif
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| 63 |
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| 64 | #ifndef rmb
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| 65 | #define rmb() mb()
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| 66 | #endif
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| 67 |
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| 68 | #ifndef wmb
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| 69 | #define wmb() mb()
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| 70 | #endif
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| 71 |
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| 72 | #ifndef dma_mb
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| 73 | #define dma_mb() mb()
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| 74 | #endif
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| 75 |
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| 76 | #ifndef dma_rmb
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| 77 | #define dma_rmb() rmb()
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| 78 | #endif
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| 79 |
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| 80 | #ifndef dma_wmb
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| 81 | #define dma_wmb() wmb()
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| 82 | #endif
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| 83 |
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| 84 | #ifndef __smp_mb
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| 85 | #define __smp_mb() mb()
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| 86 | #endif
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| 87 |
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| 88 | #ifndef __smp_rmb
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| 89 | #define __smp_rmb() rmb()
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| 90 | #endif
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| 91 |
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| 92 | #ifndef __smp_wmb
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| 93 | #define __smp_wmb() wmb()
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| 94 | #endif
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| 95 |
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| 96 | #ifdef CONFIG_SMP
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| 97 |
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| 98 | #ifndef smp_mb
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| 99 | #define smp_mb() do { kcsan_mb(); __smp_mb(); } while (0)
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| 100 | #endif
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| 101 |
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| 102 | #ifndef smp_rmb
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| 103 | #define smp_rmb() do { kcsan_rmb(); __smp_rmb(); } while (0)
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| 104 | #endif
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| 105 |
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| 106 | #ifndef smp_wmb
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| 107 | #define smp_wmb() do { kcsan_wmb(); __smp_wmb(); } while (0)
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| 108 | #endif
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| 109 |
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| 110 | #else
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| 111 |
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| 112 | #ifndef smp_mb
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| 113 | #define smp_mb() barrier()
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| 114 | #endif
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| 115 |
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| 116 | #ifndef smp_rmb
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| 117 | #define smp_rmb() barrier()
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| 118 | #endif
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| 119 |
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| 120 | #ifndef smp_wmb
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| 121 | #define smp_wmb() barrier()
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| 122 | #endif
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| 123 |
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| 124 | #endif
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| 125 |
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| 126 | #ifndef __smp_store_mb
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| 127 | #define __smp_store_mb(var, value) do { WRITE_ONCE(var, value); __smp_mb(); } while (0)
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| 128 | #endif
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| 129 |
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| 130 | #ifndef __smp_mb__before_atomic
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| 131 | #define __smp_mb__before_atomic() __smp_mb()
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| 132 | #endif
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| 133 |
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| 134 | #ifndef __smp_mb__after_atomic
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| 135 | #define __smp_mb__after_atomic() __smp_mb()
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| 136 | #endif
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| 137 |
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| 138 | #ifndef __smp_store_release
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| 139 | #define __smp_store_release(p, v) \
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| 140 | do { \
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| 141 | compiletime_assert_atomic_type(*p); \
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| 142 | __smp_mb(); \
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| 143 | WRITE_ONCE(*p, v); \
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| 144 | } while (0)
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| 145 | #endif
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| 146 |
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| 147 | #ifndef __smp_load_acquire
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| 148 | #define __smp_load_acquire(p) \
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| 149 | ({ \
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| 150 | __unqual_scalar_typeof(*p) ___p1 = READ_ONCE(*p); \
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| 151 | compiletime_assert_atomic_type(*p); \
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| 152 | __smp_mb(); \
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| 153 | (typeof(*p))___p1; \
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| 154 | })
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| 155 | #endif
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| 156 |
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| 157 | #ifdef CONFIG_SMP
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| 158 |
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| 159 | #ifndef smp_store_mb
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| 160 | #define smp_store_mb(var, value) do { kcsan_mb(); __smp_store_mb(var, value); } while (0)
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| 161 | #endif
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| 162 |
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| 163 | #ifndef smp_mb__before_atomic
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| 164 | #define smp_mb__before_atomic() do { kcsan_mb(); __smp_mb__before_atomic(); } while (0)
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| 165 | #endif
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| 166 |
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| 167 | #ifndef smp_mb__after_atomic
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| 168 | #define smp_mb__after_atomic() do { kcsan_mb(); __smp_mb__after_atomic(); } while (0)
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| 169 | #endif
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| 170 |
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| 171 | #ifndef smp_store_release
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| 172 | #define smp_store_release(p, v) do { kcsan_release(); __smp_store_release(p, v); } while (0)
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| 173 | #endif
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| 174 |
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| 175 | #ifndef smp_load_acquire
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| 176 | #define smp_load_acquire(p) __smp_load_acquire(p)
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| 177 | #endif
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| 178 |
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| 179 | #else
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| 180 |
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| 181 | #ifndef smp_store_mb
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| 182 | #define smp_store_mb(var, value) do { WRITE_ONCE(var, value); barrier(); } while (0)
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| 183 | #endif
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| 184 |
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| 185 | #ifndef smp_mb__before_atomic
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| 186 | #define smp_mb__before_atomic() barrier()
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| 187 | #endif
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| 188 |
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| 189 | #ifndef smp_mb__after_atomic
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| 190 | #define smp_mb__after_atomic() barrier()
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| 191 | #endif
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| 192 |
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| 193 | #ifndef smp_store_release
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| 194 | #define smp_store_release(p, v) \
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| 195 | do { \
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| 196 | barrier(); \
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| 197 | WRITE_ONCE(*p, v); \
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| 198 | } while (0)
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| 199 | #endif
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| 200 |
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| 201 | #ifndef smp_load_acquire
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| 202 | #define smp_load_acquire(p) \
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| 203 | ({ \
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| 204 | __unqual_scalar_typeof(*p) ___p1 = READ_ONCE(*p); \
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| 205 | barrier(); \
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| 206 | (typeof(*p))___p1; \
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| 207 | })
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| 208 | #endif
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| 209 |
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| 210 | #endif
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| 211 |
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| 212 |
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| 213 | #define virt_mb() do { kcsan_mb(); __smp_mb(); } while (0)
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| 214 | #define virt_rmb() do { kcsan_rmb(); __smp_rmb(); } while (0)
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| 215 | #define virt_wmb() do { kcsan_wmb(); __smp_wmb(); } while (0)
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| 216 | #define virt_store_mb(var, value) do { kcsan_mb(); __smp_store_mb(var, value); } while (0)
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| 217 | #define virt_mb__before_atomic() do { kcsan_mb(); __smp_mb__before_atomic(); } while (0)
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| 218 | #define virt_mb__after_atomic() do { kcsan_mb(); __smp_mb__after_atomic(); } while (0)
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| 219 | #define virt_store_release(p, v) do { kcsan_release(); __smp_store_release(p, v); } while (0)
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| 220 | #define virt_load_acquire(p) __smp_load_acquire(p)
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| 221 |
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| 222 | |
| 223 | * smp_acquire__after_ctrl_dep() - Provide ACQUIRE ordering after a control dependency
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| 224 | *
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| 225 | * A control dependency provides a LOAD->STORE order, the additional RMB
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| 226 | * provides LOAD->LOAD order, together they provide LOAD->{LOAD,STORE} order,
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| 227 | * aka. (load)-ACQUIRE.
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| 228 | *
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| 229 | * Architectures that do not do load speculation can have this be barrier().
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| 230 |
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| 231 | #ifndef smp_acquire__after_ctrl_dep
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| 232 | #define smp_acquire__after_ctrl_dep() smp_rmb()
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| 233 | #endif
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| 234 |
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| 235 | |
| 236 | * smp_cond_load_relaxed() - (Spin) wait for cond with no ordering guarantees
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| 237 | * @ptr: pointer to the variable to wait on
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| 238 | * @cond_expr: boolean expression to wait for
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| 239 | *
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| 240 | * Equivalent to using READ_ONCE() on the condition variable.
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| 241 | *
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| 242 | * Due to C lacking lambda expressions we load the value of *ptr into a
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| 243 | * pre-named variable @VAL to be used in @cond.
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| 244 |
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| 245 | #ifndef smp_cond_load_relaxed
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| 246 | #define smp_cond_load_relaxed(ptr, cond_expr) ({ \
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| 247 | typeof(ptr) __PTR = (ptr); \
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| 248 | __unqual_scalar_typeof(*ptr) VAL; \
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| 249 | for (;;) { \
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| 250 | VAL = READ_ONCE(*__PTR); \
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| 251 | if (cond_expr) \
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| 252 | break; \
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| 253 | cpu_relax(); \
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| 254 | } \
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| 255 | (typeof(*ptr))VAL; \
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| 256 | })
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| 257 | #endif
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| 258 |
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| 259 | |
| 260 | * smp_cond_load_acquire() - (Spin) wait for cond with ACQUIRE ordering
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| 261 | * @ptr: pointer to the variable to wait on
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| 262 | * @cond_expr: boolean expression to wait for
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| 263 | *
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| 264 | * Equivalent to using smp_load_acquire() on the condition variable but employs
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| 265 | * the control dependency of the wait to reduce the barrier on many platforms.
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| 266 |
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| 267 | #ifndef smp_cond_load_acquire
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| 268 | #define smp_cond_load_acquire(ptr, cond_expr) ({ \
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| 269 | __unqual_scalar_typeof(*ptr) _val; \
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| 270 | _val = smp_cond_load_relaxed(ptr, cond_expr); \
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| 271 | smp_acquire__after_ctrl_dep(); \
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| 272 | (typeof(*ptr))_val; \
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| 273 | })
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| 274 | #endif
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| 275 |
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| 276 | |
| 277 | * pmem_wmb() ensures that all stores for which the modification
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| 278 | * are written to persistent storage by preceding instructions have
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| 279 | * updated persistent storage before any data access or data transfer
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| 280 | * caused by subsequent instructions is initiated.
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| 281 |
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| 282 | #ifndef pmem_wmb
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| 283 | #define pmem_wmb() wmb()
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| 284 | #endif
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| 285 |
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| 286 | |
| 287 | * ioremap_wc() maps I/O memory as memory with write-combining attributes. For
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| 288 | * this kind of memory accesses, the CPU may wait for prior accesses to be
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| 289 | * merged with subsequent ones. In some situation, such wait is bad for the
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| 290 | * performance. io_stop_wc() can be used to prevent the merging of
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| 291 | * write-combining memory accesses before this macro with those after it.
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| 292 |
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| 293 | #ifndef io_stop_wc
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| 294 | #define io_stop_wc() do { } while (0)
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| 295 | #endif
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| 296 |
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| 297 | |
| 298 | * Architectures that guarantee an implicit smp_mb() in switch_mm()
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| 299 | * can override smp_mb__after_switch_mm.
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| 300 |
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| 301 | #ifndef smp_mb__after_switch_mm
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| 302 | # define smp_mb__after_switch_mm() smp_mb()
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| 303 | #endif
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| 304 |
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| 305 | #endif
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| 306 | #endif
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