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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2012 ARM Ltd.
4 */
5#ifndef __CLKSOURCE_ARM_ARCH_TIMER_H
6#define __CLKSOURCE_ARM_ARCH_TIMER_H
7
8#include <linux/bitops.h>
9#include <linux/timecounter.h>
10#include <linux/types.h>
11
12#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
13#define ARCH_TIMER_CTRL_IT_MASK (1 << 1)
14#define ARCH_TIMER_CTRL_IT_STAT (1 << 2)
15
16#define CNTHCTL_EL1PCTEN (1 << 0)
17#define CNTHCTL_EL1PCEN (1 << 1)
18#define CNTHCTL_EVNTEN (1 << 2)
19#define CNTHCTL_EVNTDIR (1 << 3)
20#define CNTHCTL_EVNTI (0xF << 4)
21#define CNTHCTL_ECV (1 << 12)
22#define CNTHCTL_EL1TVT (1 << 13)
23#define CNTHCTL_EL1TVCT (1 << 14)
24#define CNTHCTL_EL1NVPCT (1 << 15)
25#define CNTHCTL_EL1NVVCT (1 << 16)
26#define CNTHCTL_CNTVMASK (1 << 18)
27#define CNTHCTL_CNTPMASK (1 << 19)
28
29enum arch_timer_reg {
30 ARCH_TIMER_REG_CTRL,
31 ARCH_TIMER_REG_CVAL,
32};
33
34enum arch_timer_ppi_nr {
35 ARCH_TIMER_PHYS_SECURE_PPI,
36 ARCH_TIMER_PHYS_NONSECURE_PPI,
37 ARCH_TIMER_VIRT_PPI,
38 ARCH_TIMER_HYP_PPI,
39 ARCH_TIMER_HYP_VIRT_PPI,
40 ARCH_TIMER_MAX_TIMER_PPI
41};
42
43enum arch_timer_spi_nr {
44 ARCH_TIMER_PHYS_SPI,
45 ARCH_TIMER_VIRT_SPI,
46 ARCH_TIMER_MAX_TIMER_SPI
47};
48
49#define ARCH_TIMER_PHYS_ACCESS 0
50#define ARCH_TIMER_VIRT_ACCESS 1
51
52#define ARCH_TIMER_MEM_MAX_FRAMES 8
53
54#define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */
55#define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */
56#define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
57#define ARCH_TIMER_EVT_TRIGGER_SHIFT (4)
58#define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT)
59#define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */
60#define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */
61#define ARCH_TIMER_EVT_INTERVAL_SCALE (1 << 17) /* EVNTIS in the ARMv8 ARM */
62
63#define ARCH_TIMER_EVT_STREAM_PERIOD_US 100
64#define ARCH_TIMER_EVT_STREAM_FREQ \
65 (USEC_PER_SEC / ARCH_TIMER_EVT_STREAM_PERIOD_US)
66
67struct arch_timer_kvm_info {
68 struct timecounter timecounter;
69 int virtual_irq;
70 int physical_irq;
71};
72
73struct arch_timer_mem_frame {
74 bool valid;
75 phys_addr_t cntbase;
76 size_t size;
77 int phys_irq;
78 int virt_irq;
79};
80
81struct arch_timer_mem {
82 phys_addr_t cntctlbase;
83 size_t size;
84 struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
85};
86
87#ifdef CONFIG_ARM_ARCH_TIMER
88
89extern u32 arch_timer_get_rate(void);
90extern u64 (*arch_timer_read_counter)(void);
91extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void);
92extern bool arch_timer_evtstrm_available(void);
93
94#else
95
96static inline u32 arch_timer_get_rate(void)
97{
98 return 0;
99}
100
101static inline u64 arch_timer_read_counter(void)
102{
103 return 0;
104}
105
106static inline bool arch_timer_evtstrm_available(void)
107{
108 return false;
109}
110
111#endif
112
113#endif