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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2012 ARM Ltd.
4 * Author: Marc Zyngier <[email protected]>
5 */
6
7#ifndef __ASM_ARM_KVM_ARCH_TIMER_H
8#define __ASM_ARM_KVM_ARCH_TIMER_H
9
10#include <linux/clocksource.h>
11#include <linux/hrtimer.h>
12
13#include <linux/irqchip/arm-gic-v5.h>
14
15enum kvm_arch_timers {
16 TIMER_PTIMER,
17 TIMER_VTIMER,
18 NR_KVM_EL0_TIMERS,
19 TIMER_HVTIMER = NR_KVM_EL0_TIMERS,
20 TIMER_HPTIMER,
21 NR_KVM_TIMERS
22};
23
24enum kvm_arch_timer_regs {
25 TIMER_REG_CNT,
26 TIMER_REG_CVAL,
27 TIMER_REG_TVAL,
28 TIMER_REG_CTL,
29 TIMER_REG_VOFF,
30};
31
32struct arch_timer_offset {
33 /*
34 * If set, pointer to one of the offsets in the kvm's offset
35 * structure. If NULL, assume a zero offset.
36 */
37 u64 *vm_offset;
38 /*
39 * If set, pointer to one of the offsets in the vcpu's sysreg
40 * array. If NULL, assume a zero offset.
41 */
42 u64 *vcpu_offset;
43};
44
45struct arch_timer_vm_data {
46 /* Offset applied to the virtual timer/counter */
47 u64 voffset;
48 /* Offset applied to the physical timer/counter */
49 u64 poffset;
50
51 /* The PPI for each timer, global to the VM */
52 u32 ppi[NR_KVM_TIMERS];
53};
54
55struct arch_timer_context {
56 /* Emulated Timer (may be unused) */
57 struct hrtimer hrtimer;
58 u64 ns_frac;
59
60 /* Offset for this counter/timer */
61 struct arch_timer_offset offset;
62 /*
63 * We have multiple paths which can save/restore the timer state onto
64 * the hardware, so we need some way of keeping track of where the
65 * latest state is.
66 */
67 bool loaded;
68
69 /* Who am I? */
70 enum kvm_arch_timers timer_id;
71
72 /* Duplicated state from arch_timer.c for convenience */
73 u32 host_timer_irq;
74};
75
76struct timer_map {
77 struct arch_timer_context *direct_vtimer;
78 struct arch_timer_context *direct_ptimer;
79 struct arch_timer_context *emul_vtimer;
80 struct arch_timer_context *emul_ptimer;
81};
82
83void get_timer_map(struct kvm_vcpu *vcpu, struct timer_map *map);
84
85struct arch_timer_cpu {
86 struct arch_timer_context timers[NR_KVM_TIMERS];
87
88 /* Background timer used when the guest is not running */
89 struct hrtimer bg_timer;
90
91 /* Is the timer enabled */
92 bool enabled;
93};
94
95int __init kvm_timer_hyp_init(bool has_gic);
96int kvm_timer_enable(struct kvm_vcpu *vcpu);
97void kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu);
98void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu);
99void kvm_timer_sync_nested(struct kvm_vcpu *vcpu);
100void kvm_timer_sync_user(struct kvm_vcpu *vcpu);
101bool kvm_timer_should_notify_user(struct kvm_vcpu *vcpu);
102bool kvm_timer_update_run(struct kvm_vcpu *vcpu);
103void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu);
104
105void kvm_timer_init_vm(struct kvm *kvm);
106
107int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr);
108int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr);
109int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr);
110
111u64 kvm_phys_timer_read(void);
112
113void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu);
114void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
115
116void kvm_timer_init_vhe(void);
117
118#define vcpu_timer(v) (&(v)->arch.timer_cpu)
119#define vcpu_get_timer(v,t) (&vcpu_timer(v)->timers[(t)])
120#define vcpu_vtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_VTIMER])
121#define vcpu_ptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_PTIMER])
122#define vcpu_hvtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HVTIMER])
123#define vcpu_hptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HPTIMER])
124
125#define arch_timer_ctx_index(ctx) ((ctx)->timer_id)
126#define timer_context_to_vcpu(ctx) container_of((ctx), struct kvm_vcpu, arch.timer_cpu.timers[(ctx)->timer_id])
127#define timer_vm_data(ctx) (&(timer_context_to_vcpu(ctx)->kvm->arch.timer_data))
128#define timer_irq(ctx) (timer_vm_data(ctx)->ppi[arch_timer_ctx_index(ctx)])
129
130#define get_vgic_ppi(k, i) (((k)->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V5) ? \
131 (i) : (FIELD_PREP(GICV5_HWIRQ_ID, i) | \
132 FIELD_PREP(GICV5_HWIRQ_TYPE, GICV5_HWIRQ_TYPE_PPI)))
133
134u64 kvm_arm_timer_read_sysreg(struct kvm_vcpu *vcpu,
135 enum kvm_arch_timers tmr,
136 enum kvm_arch_timer_regs treg);
137void kvm_arm_timer_write_sysreg(struct kvm_vcpu *vcpu,
138 enum kvm_arch_timers tmr,
139 enum kvm_arch_timer_regs treg,
140 u64 val);
141
142/* Needed for tracing */
143u32 timer_get_ctl(struct arch_timer_context *ctxt);
144u64 timer_get_cval(struct arch_timer_context *ctxt);
145
146/* CPU HP callbacks */
147void kvm_timer_cpu_up(void);
148void kvm_timer_cpu_down(void);
149
150/* CNTKCTL_EL1 valid bits as of DDI0487J.a */
151#define CNTKCTL_VALID_BITS (BIT(17) | GENMASK_ULL(9, 0))
152
153DECLARE_STATIC_KEY_FALSE(broken_cntvoff_key);
154
155static inline bool has_broken_cntvoff(void)
156{
157 return static_branch_unlikely(&broken_cntvoff_key);
158}
159
160static inline bool has_cntpoff(void)
161{
162 return (has_vhe() && cpus_have_final_cap(ARM64_HAS_ECV_CNTPOFF));
163}
164
165#ifdef __KVM_NVHE_HYPERVISOR__
166#define KERN_HYP_VA(x) kern_hyp_va(x)
167#else
168#define KERN_HYP_VA(x) x
169#endif
170
171#define timer_get_offset(ctxt) \
172 ({ \
173 struct arch_timer_context *__ctxt = (ctxt); \
174 u64 off = 0; \
175 \
176 if (__ctxt) { \
177 struct arch_timer_offset *ato = &__ctxt->offset;\
178 \
179 if (ato->vm_offset) \
180 off += *KERN_HYP_VA(ato->vm_offset); \
181 if (ato->vcpu_offset) \
182 off += *KERN_HYP_VA(ato->vcpu_offset); \
183 } \
184 \
185 off; \
186 })
187
188static inline void timer_set_offset(struct arch_timer_context *ctxt, u64 offset)
189{
190 if (!ctxt->offset.vm_offset) {
191 WARN(offset, "timer %d\n", arch_timer_ctx_index(ctxt));
192 return;
193 }
194
195 WRITE_ONCE(*ctxt->offset.vm_offset, offset);
196}
197
198#endif