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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2015 Linaro Ltd.
4 * Author: Shannon Zhao <[email protected]>
5 */
6
7#ifndef __ASM_ARM_KVM_PMU_H
8#define __ASM_ARM_KVM_PMU_H
9
10#include <linux/perf_event.h>
11#include <linux/perf/arm_pmuv3.h>
12
13#define KVM_ARMV8_PMU_MAX_COUNTERS 32
14
15/* PPI #23 - architecturally specified for GICv5 */
16#define KVM_ARMV8_PMU_GICV5_IRQ 0x20000017
17
18#if IS_ENABLED(CONFIG_HW_PERF_EVENTS) && IS_ENABLED(CONFIG_KVM)
19struct kvm_pmc {
20 u8 idx; /* index into the pmu->pmc array */
21 struct perf_event *perf_event;
22};
23
24struct kvm_pmu_events {
25 u64 events_host;
26 u64 events_guest;
27};
28
29struct kvm_pmu {
30 struct irq_work overflow_work;
31 struct kvm_pmu_events events;
32 struct kvm_pmc pmc[KVM_ARMV8_PMU_MAX_COUNTERS];
33 int irq_num;
34 bool created;
35};
36
37struct arm_pmu_entry {
38 struct list_head entry;
39 struct arm_pmu *arm_pmu;
40};
41
42bool kvm_supports_guest_pmuv3(void);
43#define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num != 0)
44u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx);
45void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val);
46void kvm_pmu_set_counter_value_user(struct kvm_vcpu *vcpu, u64 select_idx, u64 val);
47u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu);
48u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu);
49u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1);
50void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu);
51void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu);
52void kvm_pmu_reprogram_counter_mask(struct kvm_vcpu *vcpu, u64 val);
53void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu);
54void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu);
55bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu);
56bool kvm_pmu_update_run(struct kvm_vcpu *vcpu);
57void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val);
58void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val);
59void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
60 u64 select_idx);
61void kvm_vcpu_reload_pmu(struct kvm_vcpu *vcpu);
62int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
63 struct kvm_device_attr *attr);
64int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
65 struct kvm_device_attr *attr);
66int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
67 struct kvm_device_attr *attr);
68int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu);
69
70struct kvm_pmu_events *kvm_get_pmu_events(void);
71void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu);
72void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu);
73void kvm_vcpu_pmu_resync_el0(void);
74
75#define kvm_vcpu_has_pmu(vcpu) \
76 (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PMU_V3))
77
78#define kvm_vcpu_has_pmuv3_strict(vcpu) \
79 (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PMU_V3_STRICT))
80
81/*
82 * Updates the vcpu's view of the pmu events for this cpu.
83 * Must be called before every vcpu run after disabling interrupts, to ensure
84 * that an interrupt cannot fire and update the structure.
85 */
86#define kvm_pmu_update_vcpu_events(vcpu) \
87 do { \
88 if (!has_vhe() && system_supports_pmuv3()) \
89 vcpu->arch.pmu.events = *kvm_get_pmu_events(); \
90 } while (0)
91
92u8 kvm_arm_pmu_get_pmuver_limit(void);
93u64 kvm_pmu_evtyper_mask(struct kvm *kvm);
94int kvm_arm_set_default_pmu(struct kvm *kvm);
95u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm);
96
97u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu);
98bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx);
99void kvm_pmu_nested_transition(struct kvm_vcpu *vcpu);
100#else
101struct kvm_pmu {
102};
103
104static inline bool kvm_supports_guest_pmuv3(void)
105{
106 return false;
107}
108
109#define kvm_arm_pmu_irq_initialized(v) (false)
110static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu,
111 u64 select_idx)
112{
113 return 0;
114}
115static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu,
116 u64 select_idx, u64 val) {}
117static inline void kvm_pmu_set_counter_value_user(struct kvm_vcpu *vcpu,
118 u64 select_idx, u64 val) {}
119static inline u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu)
120{
121 return 0;
122}
123static inline u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu)
124{
125 return 0;
126}
127static inline void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu) {}
128static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {}
129static inline void kvm_pmu_reprogram_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
130static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {}
131static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {}
132static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu)
133{
134 return false;
135}
136static inline bool kvm_pmu_update_run(struct kvm_vcpu *vcpu) { return false; }
137static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {}
138static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {}
139static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu,
140 u64 data, u64 select_idx) {}
141static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
142 struct kvm_device_attr *attr)
143{
144 return -ENXIO;
145}
146static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
147 struct kvm_device_attr *attr)
148{
149 return -ENXIO;
150}
151static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
152 struct kvm_device_attr *attr)
153{
154 return -ENXIO;
155}
156static inline int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu)
157{
158 return 0;
159}
160static inline u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1)
161{
162 return 0;
163}
164
165#define kvm_vcpu_has_pmu(vcpu) ({ false; })
166#define kvm_vcpu_has_pmuv3_strict(vcpu) ({ false; })
167static inline void kvm_pmu_update_vcpu_events(struct kvm_vcpu *vcpu) {}
168static inline void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) {}
169static inline void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu) {}
170static inline void kvm_vcpu_reload_pmu(struct kvm_vcpu *vcpu) {}
171static inline u8 kvm_arm_pmu_get_pmuver_limit(void)
172{
173 return 0;
174}
175static inline u64 kvm_pmu_evtyper_mask(struct kvm *kvm)
176{
177 return 0;
178}
179static inline void kvm_vcpu_pmu_resync_el0(void) {}
180
181static inline int kvm_arm_set_default_pmu(struct kvm *kvm)
182{
183 return -ENODEV;
184}
185
186static inline u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm)
187{
188 return 0;
189}
190
191static inline u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu)
192{
193 return 0;
194}
195
196static inline bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx)
197{
198 return false;
199}
200
201static inline void kvm_pmu_nested_transition(struct kvm_vcpu *vcpu) {}
202
203#endif
204
205#endif