| 1 |
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| 2 | |
| 3 | * Copyright (C) 2023-2026 ARM Ltd.
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| 4 | *
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| 5 | * The values and structures in this file are from the Realm Management Monitor
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| 6 | * specification (DEN0137) version 2.0-bet3:
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| 7 | * https://developer.arm.com/documentation/den0137/2-0bet3/
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| 8 |
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| 9 |
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| 10 | #ifndef __LINUX_ARM_SMCCC_RMI_H_
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| 11 | #define __LINUX_ARM_SMCCC_RMI_H_
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| 12 |
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| 13 | #include <linux/arm-smccc.h>
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| 14 | #include <linux/bitfield.h>
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| 15 | #include <linux/bits.h>
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| 16 | #include <linux/build_bug.h>
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| 17 | #include <linux/sizes.h>
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| 18 | #include <linux/stddef.h>
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| 19 |
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| 20 | #include <asm/page.h>
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| 21 |
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| 22 | #define SMC_RMI_CALL(func) \
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| 23 | ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
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| 24 | ARM_SMCCC_SMC_64, \
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| 25 | ARM_SMCCC_OWNER_STANDARD, \
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| 26 | (func))
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| 27 |
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| 28 | #define SMC_RMI_VERSION SMC_RMI_CALL(0x0150)
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| 29 |
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| 30 | #define SMC_RMI_RTT_DATA_MAP_INIT SMC_RMI_CALL(0x0153)
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| 31 |
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| 32 | #define SMC_RMI_REALM_ACTIVATE SMC_RMI_CALL(0x0157)
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| 33 | #define SMC_RMI_REALM_CREATE SMC_RMI_CALL(0x0158)
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| 34 | #define SMC_RMI_REALM_DESTROY SMC_RMI_CALL(0x0159)
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| 35 | #define SMC_RMI_REC_CREATE SMC_RMI_CALL(0x015a)
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| 36 | #define SMC_RMI_REC_DESTROY SMC_RMI_CALL(0x015b)
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| 37 | #define SMC_RMI_REC_ENTER SMC_RMI_CALL(0x015c)
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| 38 | #define SMC_RMI_RTT_CREATE SMC_RMI_CALL(0x015d)
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| 39 | #define SMC_RMI_RTT_DESTROY SMC_RMI_CALL(0x015e)
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| 40 |
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| 41 | #define SMC_RMI_RTT_READ_ENTRY SMC_RMI_CALL(0x0161)
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| 42 |
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| 43 | #define SMC_RMI_RTT_DEV_VALIDATE SMC_RMI_CALL(0x0163)
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| 44 | #define SMC_RMI_PSCI_COMPLETE SMC_RMI_CALL(0x0164)
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| 45 | #define SMC_RMI_FEATURES SMC_RMI_CALL(0x0165)
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| 46 | #define SMC_RMI_RTT_FOLD SMC_RMI_CALL(0x0166)
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| 47 |
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| 48 | #define SMC_RMI_RTT_INIT_RIPAS SMC_RMI_CALL(0x0168)
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| 49 | #define SMC_RMI_RTT_SET_RIPAS SMC_RMI_CALL(0x0169)
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| 50 | #define SMC_RMI_VSMMU_CREATE SMC_RMI_CALL(0x016a)
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| 51 | #define SMC_RMI_VSMMU_DESTROY SMC_RMI_CALL(0x016b)
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| 52 |
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| 53 | #define SMC_RMI_RMM_CONFIG_SET SMC_RMI_CALL(0x016e)
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| 54 | #define SMC_RMI_PSMMU_IRQ_NOTIFY SMC_RMI_CALL(0x016f)
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| 55 | #define SMC_RMI_ATTEST_PLAT_TOKEN_REFRESH SMC_RMI_CALL(0x0170)
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| 56 |
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| 57 | #define SMC_RMI_PDEV_ABORT SMC_RMI_CALL(0x0174)
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| 58 | #define SMC_RMI_PDEV_COMMUNICATE SMC_RMI_CALL(0x0175)
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| 59 | #define SMC_RMI_PDEV_CREATE SMC_RMI_CALL(0x0176)
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| 60 | #define SMC_RMI_PDEV_DESTROY SMC_RMI_CALL(0x0177)
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| 61 | #define SMC_RMI_PDEV_GET_STATE SMC_RMI_CALL(0x0178)
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| 62 |
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| 63 | #define SMC_RMI_PDEV_STREAM_KEY_REFRESH SMC_RMI_CALL(0x017a)
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| 64 | #define SMC_RMI_PDEV_SET_PUBKEY SMC_RMI_CALL(0x017b)
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| 65 | #define SMC_RMI_PDEV_STOP SMC_RMI_CALL(0x017c)
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| 66 | #define SMC_RMI_RTT_AUX_CREATE SMC_RMI_CALL(0x017d)
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| 67 | #define SMC_RMI_RTT_AUX_DESTROY SMC_RMI_CALL(0x017e)
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| 68 | #define SMC_RMI_RTT_AUX_FOLD SMC_RMI_CALL(0x017f)
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| 69 |
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| 70 | #define SMC_RMI_VDEV_ABORT SMC_RMI_CALL(0x0185)
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| 71 | #define SMC_RMI_VDEV_COMMUNICATE SMC_RMI_CALL(0x0186)
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| 72 | #define SMC_RMI_VDEV_CREATE SMC_RMI_CALL(0x0187)
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| 73 | #define SMC_RMI_VDEV_DESTROY SMC_RMI_CALL(0x0188)
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| 74 | #define SMC_RMI_VDEV_GET_STATE SMC_RMI_CALL(0x0189)
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| 75 | #define SMC_RMI_VDEV_UNLOCK SMC_RMI_CALL(0x018a)
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| 76 | #define SMC_RMI_RTT_SET_S2AP SMC_RMI_CALL(0x018b)
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| 77 |
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| 78 | #define SMC_RMI_VDEV_GET_INTERFACE_REPORT SMC_RMI_CALL(0x01d0)
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| 79 | #define SMC_RMI_VDEV_GET_MEASUREMENTS SMC_RMI_CALL(0x01d1)
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| 80 | #define SMC_RMI_VDEV_LOCK SMC_RMI_CALL(0x01d2)
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| 81 | #define SMC_RMI_VDEV_START SMC_RMI_CALL(0x01d3)
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| 82 |
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| 83 | #define SMC_RMI_VSMMU_EVENT_HANDLE SMC_RMI_CALL(0x01d6)
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| 84 | #define SMC_RMI_PSMMU_ACTIVATE SMC_RMI_CALL(0x01d7)
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| 85 | #define SMC_RMI_PSMMU_DEACTIVATE SMC_RMI_CALL(0x01d8)
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| 86 |
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| 87 | #define SMC_RMI_PSMMU_ST_L2_CREATE SMC_RMI_CALL(0x01db)
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| 88 | #define SMC_RMI_PSMMU_ST_L2_DESTROY SMC_RMI_CALL(0x01dc)
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| 89 | #define SMC_RMI_DPT_L0_CREATE SMC_RMI_CALL(0x01dd)
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| 90 | #define SMC_RMI_DPT_L0_DESTROY SMC_RMI_CALL(0x01de)
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| 91 | #define SMC_RMI_DPT_L1_CREATE SMC_RMI_CALL(0x01df)
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| 92 | #define SMC_RMI_DPT_L1_DESTROY SMC_RMI_CALL(0x01e0)
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| 93 | #define SMC_RMI_GRANULE_TRACKING_GET SMC_RMI_CALL(0x01e1)
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| 94 |
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| 95 | #define SMC_RMI_GRANULE_TRACKING_SET SMC_RMI_CALL(0x01e3)
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| 96 |
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| 97 | #define SMC_RMI_RMM_CONFIG_GET SMC_RMI_CALL(0x01ec)
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| 98 |
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| 99 | #define SMC_RMI_RMM_STATE_GET SMC_RMI_CALL(0x01ee)
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| 100 |
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| 101 | #define SMC_RMI_PSMMU_EVENT_CONSUME SMC_RMI_CALL(0x01f0)
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| 102 | #define SMC_RMI_GRANULE_RANGE_DELEGATE SMC_RMI_CALL(0x01f1)
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| 103 | #define SMC_RMI_GRANULE_RANGE_UNDELEGATE SMC_RMI_CALL(0x01f2)
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| 104 | #define SMC_RMI_GPT_L1_CREATE SMC_RMI_CALL(0x01f3)
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| 105 | #define SMC_RMI_GPT_L1_DESTROY SMC_RMI_CALL(0x01f4)
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| 106 | #define SMC_RMI_RTT_DATA_MAP SMC_RMI_CALL(0x01f5)
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| 107 | #define SMC_RMI_RTT_DATA_UNMAP SMC_RMI_CALL(0x01f6)
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| 108 | #define SMC_RMI_RTT_DEV_MAP SMC_RMI_CALL(0x01f7)
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| 109 | #define SMC_RMI_RTT_DEV_UNMAP SMC_RMI_CALL(0x01f8)
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| 110 | #define SMC_RMI_RTT_ARCH_DEV_MAP SMC_RMI_CALL(0x01f9)
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| 111 | #define SMC_RMI_RTT_ARCH_DEV_UNMAP SMC_RMI_CALL(0x01fa)
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| 112 | #define SMC_RMI_RTT_UNPROT_MAP SMC_RMI_CALL(0x01fb)
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| 113 | #define SMC_RMI_RTT_UNPROT_UNMAP SMC_RMI_CALL(0x01fc)
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| 114 | #define SMC_RMI_RTT_AUX_PROT_MAP SMC_RMI_CALL(0x01fd)
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| 115 | #define SMC_RMI_RTT_AUX_PROT_UNMAP SMC_RMI_CALL(0x01fe)
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| 116 | #define SMC_RMI_RTT_AUX_UNPROT_MAP SMC_RMI_CALL(0x01ff)
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| 117 | #define SMC_RMI_RTT_AUX_UNPROT_UNMAP SMC_RMI_CALL(0x0200)
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| 118 | #define SMC_RMI_REALM_TERMINATE SMC_RMI_CALL(0x0201)
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| 119 | #define SMC_RMI_RMM_ACTIVATE SMC_RMI_CALL(0x0202)
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| 120 | #define SMC_RMI_OP_CONTINUE SMC_RMI_CALL(0x0203)
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| 121 | #define SMC_RMI_PDEV_STREAM_CONNECT SMC_RMI_CALL(0x0204)
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| 122 | #define SMC_RMI_PDEV_STREAM_DISCONNECT SMC_RMI_CALL(0x0205)
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| 123 | #define SMC_RMI_PDEV_STREAM_COMPLETE SMC_RMI_CALL(0x0206)
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| 124 | #define SMC_RMI_PDEV_STREAM_KEY_PURGE SMC_RMI_CALL(0x0207)
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| 125 | #define SMC_RMI_OP_MEM_DONATE SMC_RMI_CALL(0x0208)
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| 126 | #define SMC_RMI_OP_MEM_RECLAIM SMC_RMI_CALL(0x0209)
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| 127 | #define SMC_RMI_OP_CANCEL SMC_RMI_CALL(0x020a)
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| 128 | #define SMC_RMI_VSMMU_FEATURES SMC_RMI_CALL(0x020b)
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| 129 | #define SMC_RMI_VSMMU_CMD_GET SMC_RMI_CALL(0x020c)
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| 130 | #define SMC_RMI_VSMMU_CMD_COMPLETE SMC_RMI_CALL(0x020d)
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| 131 | #define SMC_RMI_PSMMU_INFO SMC_RMI_CALL(0x020e)
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| 132 | #define SMC_RMI_RMM_DEACTIVATE SMC_RMI_CALL(0x020f)
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| 133 | #define SMC_RMI_PDEV_STREAM_INFO SMC_RMI_CALL(0x0210)
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| 134 | #define SMC_RMI_GPT_INFO SMC_RMI_CALL(0x0211)
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| 135 |
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| 136 | #define RMI_ABI_MAJOR_VERSION 2
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| 137 | #define RMI_ABI_MINOR_VERSION 0
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| 138 |
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| 139 | #define RMI_ABI_VERSION_MAJOR_MASK GENMASK(30, 16)
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| 140 | #define RMI_ABI_VERSION_MINOR_MASK GENMASK(15, 0)
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| 141 |
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| 142 | #define RMI_ABI_VERSION_GET_MAJOR(v) FIELD_GET(RMI_ABI_VERSION_MAJOR_MASK, (v))
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| 143 | #define RMI_ABI_VERSION_GET_MINOR(v) FIELD_GET(RMI_ABI_VERSION_MINOR_MASK, (v))
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| 144 | #define RMI_ABI_VERSION(major, minor) \
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| 145 | (FIELD_PREP(RMI_ABI_VERSION_MAJOR_MASK, (major)) | \
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| 146 | FIELD_PREP(RMI_ABI_VERSION_MINOR_MASK, (minor)))
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| 147 |
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| 148 |
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| 149 | #define RMI_RESULT_STATUS_MASK GENMASK(7, 0)
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| 150 |
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| 151 | #define RMI_RESULT_DATA_LEVEL_MASK GENMASK(15, 8)
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| 152 |
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| 153 | #define RMI_RESULT_MEMREQ_MASK GENMASK(9, 8)
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| 154 | #define RMI_RESULT_CAN_CANCEL_MASK BIT(10)
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| 155 |
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| 156 | #define RMI_RESULT_STATUS(ret) FIELD_GET(RMI_RESULT_STATUS_MASK, ret)
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| 157 | #define RMI_RESULT_DATA_LEVEL(ret) FIELD_GET(RMI_RESULT_DATA_LEVEL_MASK, ret)
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| 158 | #define RMI_RESULT_MEMREQ(ret) FIELD_GET(RMI_RESULT_MEMREQ_MASK, ret)
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| 159 | #define RMI_RESULT_CAN_CANCEL(ret) FIELD_GET(RMI_RESULT_CAN_CANCEL_MASK, ret)
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| 160 |
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| 161 | #define RMI_SUCCESS 0
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| 162 | #define RMI_ERROR_INPUT 1
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| 163 | #define RMI_ERROR_REALM 2
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| 164 | #define RMI_ERROR_REC 3
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| 165 | #define RMI_ERROR_RTT 4
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| 166 | #define RMI_ERROR_NOT_SUPPORTED 5
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| 167 | #define RMI_ERROR_DEVICE 6
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| 168 | #define RMI_ERROR_RTT_AUX 7
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| 169 | #define RMI_ERROR_PSMMU_ST 8
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| 170 | #define RMI_ERROR_DPT 9
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| 171 | #define RMI_BUSY 10
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| 172 | #define RMI_ERROR_GLOBAL 11
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| 173 | #define RMI_ERROR_TRACKING 12
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| 174 | #define RMI_INCOMPLETE 13
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| 175 | #define RMI_BLOCKED 14
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| 176 | #define RMI_ERROR_GPT 15
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| 177 | #define RMI_ERROR_GRANULE 16
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| 178 |
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| 179 | #define RMI_CONTINUE_KEEP_GOING 0
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| 180 | #define RMI_CONTINUE_STOP 1
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| 181 |
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| 182 | #define RMI_OP_MEM_REQ_NONE 0
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| 183 | #define RMI_OP_MEM_REQ_DONATE 1
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| 184 | #define RMI_OP_MEM_REQ_RECLAIM 2
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| 185 |
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| 186 | #define RMI_OP_CANNOT_CANCEL 0
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| 187 | #define RMI_OP_CAN_CANCEL 1
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| 188 |
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| 189 | #define RMI_DONATE_STATE_MASK GENMASK(18, 17)
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| 190 | #define RMI_DONATE_CONTIG_MASK BIT(16)
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| 191 | #define RMI_DONATE_COUNT_MASK GENMASK(15, 2)
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| 192 | #define RMI_DONATE_BLOCK_SIZE_MASK GENMASK(1, 0)
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| 193 |
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| 194 | #define RMI_DONATE_STATE(req) FIELD_GET(RMI_DONATE_STATE_MASK, req)
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| 195 | #define RMI_DONATE_CONTIG(req) FIELD_GET(RMI_DONATE_CONTIG_MASK, req)
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| 196 | #define RMI_DONATE_COUNT(req) FIELD_GET(RMI_DONATE_COUNT_MASK, req)
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| 197 | #define RMI_DONATE_BLOCK_SIZE(req) FIELD_GET(RMI_DONATE_BLOCK_SIZE_MASK, req)
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| 198 |
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| 199 | #define RMI_OP_MEM_DELEGATED 0
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| 200 | #define RMI_OP_MEM_UNDELEGATED 1
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| 201 | #define RMI_OP_MEM_CONDITIONAL 2
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| 202 |
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| 203 | #define RMI_OP_MEM_NON_CONTIG 0
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| 204 | #define RMI_OP_MEM_CONTIG 1
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| 205 |
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| 206 | #define RMI_ADDR_TYPE_NONE 0
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| 207 | #define RMI_ADDR_TYPE_SINGLE 1
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| 208 | #define RMI_ADDR_TYPE_LIST 2
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| 209 |
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| 210 | #define RMI_ADDR_RANGE_STATE_MASK GENMASK_ULL(63, 62)
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| 211 | #define RMI_ADDR_RANGE_ADDR_MASK GENMASK_ULL(51, PAGE_SHIFT)
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| 212 | #define RMI_ADDR_RANGE_COUNT_MASK GENMASK(PAGE_SHIFT - 1, 2)
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| 213 | #define RMI_ADDR_RANGE_BLOCK_SIZE_MASK GENMASK(1, 0)
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| 214 |
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| 215 | #define RMI_ADDR_RANGE_STATE(r) FIELD_GET(RMI_ADDR_RANGE_STATE_MASK, (r))
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| 216 | #define RMI_ADDR_RANGE_ADDR(r) ((r) & RMI_ADDR_RANGE_ADDR_MASK)
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| 217 | #define RMI_ADDR_RANGE_COUNT(r) FIELD_GET(RMI_ADDR_RANGE_COUNT_MASK, (r))
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| 218 | #define RMI_ADDR_RANGE_BLOCK_SIZE(r) FIELD_GET(RMI_ADDR_RANGE_BLOCK_SIZE_MASK, (r))
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| 219 |
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| 220 | enum rmi_ripas {
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| 221 | RMI_EMPTY = 0,
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| 222 | RMI_RAM = 1,
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| 223 | RMI_DESTROYED = 2,
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| 224 | RMI_DEV = 3,
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| 225 | };
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| 226 |
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| 227 | #define RMI_NO_MEASURE_CONTENT 0
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| 228 | #define RMI_MEASURE_CONTENT 1
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| 229 |
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| 230 | #define RMI_FEATURE_REGISTER_0_S2OASZ GENMASK_ULL(40, 33)
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| 231 | #define RMI_FEATURE_REGISTER_0_L0GPT_BLOCK_DELEGATE BIT_ULL(32)
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| 232 | #define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS GENMASK(31, 27)
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| 233 | #define RMI_FEATURE_REGISTER_0_PMU BIT(26)
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| 234 | #define RMI_FEATURE_REGISTER_0_NUM_WPS GENMASK(25, 20)
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| 235 | #define RMI_FEATURE_REGISTER_0_NUM_BPS GENMASK(19, 14)
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| 236 | #define RMI_FEATURE_REGISTER_0_SVE_VL GENMASK(13, 10)
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| 237 | #define RMI_FEATURE_REGISTER_0_SVE BIT(9)
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| 238 | #define RMI_FEATURE_REGISTER_0_LPA2 BIT(8)
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| 239 | #define RMI_FEATURE_REGISTER_0_S2SZ GENMASK(7, 0)
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| 240 |
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| 241 | #define RMI_FEATURE_REGISTER_1_PPS GENMASK(16, 14)
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| 242 | #define RMI_FEATURE_REGISTER_1_L0GPTSZ GENMASK(13, 10)
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| 243 | #define RMI_FEATURE_REGISTER_1_MAX_RECS_ORDER GENMASK(9, 6)
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| 244 | #define RMI_FEATURE_REGISTER_1_HASH_SHA_512 BIT(5)
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| 245 | #define RMI_FEATURE_REGISTER_1_HASH_SHA_384 BIT(4)
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| 246 | #define RMI_FEATURE_REGISTER_1_HASH_SHA_256 BIT(3)
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| 247 | #define RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_64KB BIT(2)
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| 248 | #define RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_16KB BIT(1)
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| 249 | #define RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_4KB BIT(0)
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| 250 |
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| 251 | #define RMI_FEATURE_REGISTER_2_REALM_MAX_VDEVS_ORDER GENMASK(14, 10)
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| 252 | #define RMI_FEATURE_REGISTER_2_NON_TEE_STREAM BIT(9)
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| 253 | #define RMI_FEATURE_REGISTER_2_VDEV_KROU BIT(8)
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| 254 | #define RMI_FEATURE_REGISTER_2_PDEV_MAX_VDEVS_ORDER GENMASK(7, 4)
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| 255 | #define RMI_FEATURE_REGISTER_2_ATS BIT(3)
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| 256 | #define RMI_FEATURE_REGISTER_2_VSMMU BIT(2)
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| 257 | #define RMI_FEATURE_REGISTER_2_DA_COH BIT(1)
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| 258 | #define RMI_FEATURE_REGISTER_2_DA BIT(0)
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| 259 |
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| 260 | #define RMI_FEATURE_REGISTER_3_RTT_S2AP_INDIRECT BIT(6)
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| 261 | #define RMI_FEATURE_REGISTER_3_RTT_PLANE GENMASK(5, 4)
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| 262 | #define RMI_FEATURE_REGISTER_3_MAX_NUM_AUX_PLANES GENMASK(3, 0)
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| 263 |
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| 264 | #define RMI_FEATURE_REGISTER_4_MEC_COUNT GENMASK_ULL(63, 0)
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| 265 |
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| 266 | #define RMI_MEM_CATEGORY_CONVENTIONAL 0
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| 267 | #define RMI_MEM_CATEGORY_DEV_NCOH 1
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| 268 | #define RMI_MEM_CATEGORY_DEV_COH 2
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| 269 | #define RMI_MEM_CATEGORY_NONE 3
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| 270 |
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| 271 | #define RMI_TRACKING_RESERVED 0
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| 272 | #define RMI_TRACKING_NONE 1
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| 273 | #define RMI_TRACKING_FINE 2
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| 274 | #define RMI_TRACKING_COARSE 3
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| 275 | #define RMI_TRACKING_INTERMEDIATE 4
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| 276 |
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| 277 | #define RMI_GRANULE_SIZE_4KB 0
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| 278 | #define RMI_GRANULE_SIZE_16KB 1
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| 279 | #define RMI_GRANULE_SIZE_64KB 2
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| 280 |
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| 281 | #define RMI_GPT_PAR_RESERVED 0U
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| 282 | #define RMI_GPT_PAR_PLAT 1U
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| 283 | #define RMI_GPT_PAR_HOST_NOT_CREATED 2U
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| 284 | #define RMI_GPT_PAR_HOST_CREATED 3U
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| 285 |
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| 286 | |
| 287 | * Note many of these fields are smaller than u64 but all fields have u64
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| 288 | * alignment, so use u64 to ensure correct alignment.
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| 289 |
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| 290 | struct rmm_config {
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| 291 | union {
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| 292 | struct {
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| 293 | u64 tracking_region_size;
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| 294 | u64 rmi_granule_size;
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| 295 | };
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| 296 | u8 sizer[SZ_4K];
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| 297 | };
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| 298 | };
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| 299 |
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| 300 | static_assert(sizeof(struct rmm_config) == SZ_4K);
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| 301 |
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| 302 | #define RMI_REALM_PARAM_FLAG_MEC_POLICY_MASK GENMASK(8, 7)
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| 303 | #define RMI_REALM_PARAM_FLAG_LFA_POLICY_MASK GENMASK(6, 5)
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| 304 | #define RMI_REALM_PARAM_FLAG_DA BIT(3)
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| 305 | #define RMI_REALM_PARAM_FLAG_PMU BIT(2)
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| 306 | #define RMI_REALM_PARAM_FLAG_SVE BIT(1)
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| 307 |
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| 308 | #define RMI_HASH_SHA_256 0
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| 309 | #define RMI_HASH_SHA_512 1
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| 310 | #define RMI_HASH_SHA_384 2
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| 311 |
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| 312 | struct realm_params {
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| 313 | union {
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| 314 | struct {
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| 315 | u64 flags0;
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| 316 | u64 s2sz;
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| 317 | u64 sve_vl;
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| 318 | u64 num_bps;
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| 319 | u64 num_wps;
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| 320 | u64 pmu_num_ctrs;
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| 321 | u64 hash_algo;
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| 322 | u64 num_aux_planes;
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| 323 | };
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| 324 | u8 sizer0[0x400];
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| 325 | };
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| 326 | union {
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| 327 | struct {
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| 328 | u8 rpv[64];
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| 329 | u64 ats_plane;
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| 330 | };
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| 331 | u8 sizer1[0x400];
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| 332 | };
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| 333 | union {
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| 334 | struct {
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| 335 | u64 sizer2;
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| 336 | u64 rtt_base;
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| 337 | s64 rtt_level_start;
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| 338 | u64 rtt_num_start;
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| 339 | u64 flags1;
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| 340 | u64 max_num_vdevs;
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| 341 | };
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| 342 | u8 sizer3[0x700];
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| 343 | };
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| 344 | union {
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| 345 | struct {
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| 346 | u8 sizer4[0x80];
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| 347 | u64 aux_rtt_base[3];
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| 348 | };
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| 349 | u8 sizer5[0x100];
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| 350 | };
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| 351 | };
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| 352 |
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| 353 | static_assert(offsetof(struct realm_params, rpv) == 0x400);
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| 354 | static_assert(offsetof(struct realm_params, rtt_base) == 0x808);
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| 355 | static_assert(offsetof(struct realm_params, aux_rtt_base) == 0xf80);
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| 356 | static_assert(sizeof(struct realm_params) == SZ_4K);
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| 357 |
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| 358 | |
| 359 | * The number of GPRs (starting from X0) that are configured by the host when
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| 360 | * a REC is created.
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| 361 |
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| 362 | #define REC_CREATE_NR_GPRS 8
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| 363 |
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| 364 | #define REC_PARAMS_FLAG_RUNNABLE BIT(0)
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| 365 |
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| 366 | struct rec_params {
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| 367 | union {
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| 368 | u64 flags;
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| 369 | u8 sizer0[0x100];
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| 370 | };
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| 371 | union {
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| 372 | u64 mpidr;
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| 373 | u8 sizer1[0x100];
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| 374 | };
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| 375 | union {
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| 376 | u64 pc;
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| 377 | u8 sizer2[0x100];
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| 378 | };
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| 379 | union {
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| 380 | u64 gprs[REC_CREATE_NR_GPRS];
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| 381 | u8 sizer3[0xd00];
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| 382 | };
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| 383 | };
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| 384 |
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| 385 | static_assert(offsetof(struct rec_params, mpidr) == 0x100);
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| 386 | static_assert(offsetof(struct rec_params, pc) == 0x200);
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| 387 | static_assert(offsetof(struct rec_params, gprs) == 0x300);
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| 388 | static_assert(sizeof(struct rec_params) == SZ_4K);
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| 389 |
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| 390 | #define REC_ENTER_FLAG_FORCE_P0 BIT(7)
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| 391 | #define REC_ENTER_FLAG_DEV_MEM_RESPONSE BIT(6)
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| 392 | #define REC_ENTER_FLAG_S2AP_RESPONSE BIT(5)
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| 393 | #define REC_ENTER_FLAG_RIPAS_RESPONSE BIT(4)
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| 394 | #define REC_ENTER_FLAG_TRAP_WFE BIT(3)
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| 395 | #define REC_ENTER_FLAG_TRAP_WFI BIT(2)
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| 396 | #define REC_ENTER_FLAG_INJECT_SEA BIT(1)
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| 397 | #define REC_ENTER_FLAG_EMULATED_MMIO BIT(0)
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| 398 |
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| 399 | #define REC_RUN_GPRS 31
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| 400 |
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| 401 | struct rec_enter {
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| 402 | union {
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| 403 | u64 flags;
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| 404 | u8 sizer0[0x200];
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| 405 | };
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| 406 | union {
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| 407 | u64 gprs[REC_RUN_GPRS];
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| 408 | u8 sizer1[0x600];
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| 409 | };
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| 410 | };
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| 411 |
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| 412 | static_assert(offsetof(struct rec_enter, gprs) == 0x200);
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| 413 | static_assert(sizeof(struct rec_enter) == SZ_2K);
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| 414 |
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| 415 | #define RMI_EXIT_SYNC 0x00
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| 416 | #define RMI_EXIT_IRQ 0x01
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| 417 | #define RMI_EXIT_FIQ 0x02
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| 418 | #define RMI_EXIT_PSCI 0x03
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| 419 | #define RMI_EXIT_RIPAS_CHANGE 0x04
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| 420 | #define RMI_EXIT_HOST_CALL 0x05
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| 421 | #define RMI_EXIT_SERROR 0x06
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| 422 | #define RMI_EXIT_S2AP_CHANGE 0x07
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| 423 | #define RMI_EXIT_VDEV_VALIDATE_MAPPING 0x08
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| 424 | #define RMI_EXIT_VSMMU_COMMAND 0x0a
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| 425 |
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| 426 | struct rec_exit {
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| 427 | union {
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| 428 | u8 exit_reason;
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| 429 | u8 sizer0[0x100];
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| 430 | };
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| 431 | union {
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| 432 | struct {
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| 433 | u64 esr;
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| 434 | u64 far;
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| 435 | u64 hpfar;
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| 436 | u64 rtt_tree;
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| 437 | };
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| 438 | u8 sizer1[0x100];
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| 439 | };
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| 440 | union {
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| 441 | u64 gprs[REC_RUN_GPRS];
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| 442 | u8 sizer2[0x200];
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| 443 | };
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| 444 | union {
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| 445 | struct {
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| 446 | u64 cntp_ctl;
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| 447 | u64 cntp_cval;
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| 448 | u64 cntv_ctl;
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| 449 | u64 cntv_cval;
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| 450 | };
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| 451 | u8 sizer4[0x100];
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| 452 | };
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| 453 | union {
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| 454 | struct {
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| 455 | u64 ripas_base;
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| 456 | u64 ripas_top;
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| 457 | u8 ripas_value;
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| 458 | u8 sizer5[0xf];
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| 459 | u64 s2ap_base;
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| 460 | u64 s2ap_top;
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| 461 | u64 vdev_id_1;
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| 462 | u64 vdev_id_2;
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| 463 | u64 dev_mem_base;
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| 464 | u64 dev_mem_top;
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| 465 | u64 dev_mem_pa;
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| 466 | };
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| 467 | u8 sizer6[0x100];
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| 468 | };
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| 469 | union {
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| 470 | struct {
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| 471 | u16 imm;
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| 472 | u8 sizer7[0x6];
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| 473 | u64 plane;
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| 474 | };
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| 475 | u8 sizer8[0x100];
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| 476 | };
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| 477 | union {
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| 478 | struct {
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| 479 | u8 pmu_ovf_status;
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| 480 | u8 sizer9[0xf];
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| 481 | u64 vsmmu;
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| 482 | };
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| 483 | u8 sizer10[0x100];
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| 484 | };
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| 485 | };
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| 486 |
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| 487 | static_assert(sizeof(struct rec_exit) == SZ_2K);
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| 488 | static_assert(offsetof(struct rec_exit, esr) == 0x100);
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| 489 | static_assert(offsetof(struct rec_exit, gprs) == 0x200);
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| 490 | static_assert(offsetof(struct rec_exit, cntp_ctl) == 0x400);
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| 491 | static_assert(offsetof(struct rec_exit, ripas_base) == 0x500);
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| 492 | static_assert(offsetof(struct rec_exit, imm) == 0x600);
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| 493 | static_assert(offsetof(struct rec_exit, pmu_ovf_status) == 0x700);
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| 494 |
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| 495 | struct rec_run {
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| 496 | struct rec_enter enter;
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| 497 | struct rec_exit exit;
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| 498 | };
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| 499 |
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| 500 | static_assert(sizeof(struct rec_run) == SZ_4K);
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| 501 |
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| 502 |
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| 503 | #define RMI_RTT_UNPROT_MAP_FLAGS_S2AP_MASK GENMASK(22, 19)
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| 504 | #define RMI_RTT_UNPROT_MAP_FLAGS_MEMATTR_MASK GENMASK(18, 16)
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| 505 | #define RMI_RTT_UNPROT_MAP_FLAGS_LIST_COUNT_MASK GENMASK(15, 2)
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| 506 | #define RMI_RTT_UNPROT_MAP_FLAGS_OADDR_TYPE_MASK GENMASK(1, 0)
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| 507 |
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| 508 |
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| 509 | #define RMI_RTT_PROT_MAP_FLAGS_LIST_COUNT_MASK GENMASK(15, 2)
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| 510 | #define RMI_RTT_PROT_MAP_FLAGS_OADDR_TYPE_MASK GENMASK(1, 0)
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| 511 |
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| 512 |
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| 513 | #define RMI_S2AP_DIRECT_READ BIT(1)
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| 514 | #define RMI_S2AP_DIRECT_WRITE BIT(0)
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| 515 |
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| 516 | #endif
|