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| 2 | |
| 3 | * Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved
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| 5 |
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| 6 | #ifndef _IB_UCAPS_H_
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| 7 | #define _IB_UCAPS_H_
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| 8 |
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| 9 | #define UCAP_ENABLED(ucaps, type) (!!((ucaps) & (1U << (type))))
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| 10 |
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| 11 | enum rdma_user_cap {
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| 12 | RDMA_UCAP_MLX5_CTRL_LOCAL,
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| 13 | RDMA_UCAP_MLX5_CTRL_OTHER_VHCA,
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| 14 | RDMA_UCAP_MAX
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| 15 | };
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| 16 |
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| 17 | int ib_get_ucaps(int *fds, int fd_count, uint64_t *idx_mask);
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| 18 | #if IS_ENABLED(CONFIG_INFINIBAND_USER_ACCESS)
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| 19 | int ib_create_ucap(enum rdma_user_cap type);
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| 20 | void ib_remove_ucap(enum rdma_user_cap type);
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| 21 | #else
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| 22 | static inline int ib_create_ucap(enum rdma_user_cap type)
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| 23 | {
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| 24 | return -EOPNOTSUPP;
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| 25 | }
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| 26 | static inline void ib_remove_ucap(enum rdma_user_cap type) {}
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| 27 | #endif
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| 28 |
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| 29 | #endif
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