| 1 |
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| 2 | |
| 3 | * Xilinx SD-FEC
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| 4 | *
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| 5 | * Copyright (C) 2019 Xilinx, Inc.
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| 6 | *
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| 7 | * Description:
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| 8 | * This driver is developed for SDFEC16 IP. It provides a char device
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| 9 | * in sysfs and supports file operations like open(), close() and ioctl().
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| 10 |
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| 11 | #ifndef __XILINX_SDFEC_H__
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| 12 | #define __XILINX_SDFEC_H__
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| 13 |
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| 14 | #include <linux/types.h>
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| 15 |
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| 16 |
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| 17 | #define XSDFEC_LDPC_SC_TABLE_ADDR_BASE (0x10000)
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| 18 | #define XSDFEC_LDPC_SC_TABLE_ADDR_HIGH (0x10400)
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| 19 | #define XSDFEC_LDPC_LA_TABLE_ADDR_BASE (0x18000)
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| 20 | #define XSDFEC_LDPC_LA_TABLE_ADDR_HIGH (0x19000)
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| 21 | #define XSDFEC_LDPC_QC_TABLE_ADDR_BASE (0x20000)
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| 22 | #define XSDFEC_LDPC_QC_TABLE_ADDR_HIGH (0x28000)
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| 23 |
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| 24 |
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| 25 | #define XSDFEC_SC_TABLE_DEPTH \
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| 26 | (XSDFEC_LDPC_SC_TABLE_ADDR_HIGH - XSDFEC_LDPC_SC_TABLE_ADDR_BASE)
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| 27 | #define XSDFEC_LA_TABLE_DEPTH \
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| 28 | (XSDFEC_LDPC_LA_TABLE_ADDR_HIGH - XSDFEC_LDPC_LA_TABLE_ADDR_BASE)
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| 29 | #define XSDFEC_QC_TABLE_DEPTH \
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| 30 | (XSDFEC_LDPC_QC_TABLE_ADDR_HIGH - XSDFEC_LDPC_QC_TABLE_ADDR_BASE)
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| 31 |
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| 32 | |
| 33 | * enum xsdfec_code - Code Type.
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| 34 | * @XSDFEC_TURBO_CODE: Driver is configured for Turbo mode.
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| 35 | * @XSDFEC_LDPC_CODE: Driver is configured for LDPC mode.
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| 36 | *
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| 37 | * This enum is used to indicate the mode of the driver. The mode is determined
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| 38 | * by checking which codes are set in the driver. Note that the mode cannot be
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| 39 | * changed by the driver.
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| 40 |
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| 41 | enum xsdfec_code {
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| 42 | XSDFEC_TURBO_CODE = 0,
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| 43 | XSDFEC_LDPC_CODE,
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| 44 | };
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| 45 |
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| 46 | |
| 47 | * enum xsdfec_order - Order
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| 48 | * @XSDFEC_MAINTAIN_ORDER: Maintain order execution of blocks.
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| 49 | * @XSDFEC_OUT_OF_ORDER: Out-of-order execution of blocks.
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| 50 | *
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| 51 | * This enum is used to indicate whether the order of blocks can change from
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| 52 | * input to output.
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| 53 |
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| 54 | enum xsdfec_order {
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| 55 | XSDFEC_MAINTAIN_ORDER = 0,
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| 56 | XSDFEC_OUT_OF_ORDER,
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| 57 | };
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| 58 |
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| 59 | |
| 60 | * enum xsdfec_turbo_alg - Turbo Algorithm Type.
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| 61 | * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When
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| 62 | * scaling is set to this is equivalent to the Max Log-Map
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| 63 | * algorithm.
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| 64 | * @XSDFEC_MAX_STAR: Log-Map algorithm.
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| 65 | * @XSDFEC_TURBO_ALG_MAX: Used to indicate out of bound Turbo algorithms.
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| 66 | *
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| 67 | * This enum specifies which Turbo Decode algorithm is in use.
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| 68 |
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| 69 | enum xsdfec_turbo_alg {
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| 70 | XSDFEC_MAX_SCALE = 0,
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| 71 | XSDFEC_MAX_STAR,
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| 72 | XSDFEC_TURBO_ALG_MAX,
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| 73 | };
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| 74 |
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| 75 | |
| 76 | * enum xsdfec_state - State.
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| 77 | * @XSDFEC_INIT: Driver is initialized.
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| 78 | * @XSDFEC_STARTED: Driver is started.
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| 79 | * @XSDFEC_STOPPED: Driver is stopped.
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| 80 | * @XSDFEC_NEEDS_RESET: Driver needs to be reset.
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| 81 | * @XSDFEC_PL_RECONFIGURE: Programmable Logic needs to be recofigured.
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| 82 | *
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| 83 | * This enum is used to indicate the state of the driver.
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| 84 |
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| 85 | enum xsdfec_state {
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| 86 | XSDFEC_INIT = 0,
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| 87 | XSDFEC_STARTED,
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| 88 | XSDFEC_STOPPED,
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| 89 | XSDFEC_NEEDS_RESET,
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| 90 | XSDFEC_PL_RECONFIGURE,
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| 91 | };
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| 92 |
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| 93 | |
| 94 | * enum xsdfec_axis_width - AXIS_WIDTH.DIN Setting for 128-bit width.
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| 95 | * @XSDFEC_1x128b: DIN data input stream consists of a 128-bit lane
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| 96 | * @XSDFEC_2x128b: DIN data input stream consists of two 128-bit lanes
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| 97 | * @XSDFEC_4x128b: DIN data input stream consists of four 128-bit lanes
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| 98 | *
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| 99 | * This enum is used to indicate the AXIS_WIDTH.DIN setting for 128-bit width.
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| 100 | * The number of lanes of the DIN data input stream depends upon the
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| 101 | * AXIS_WIDTH.DIN parameter.
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| 102 |
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| 103 | enum xsdfec_axis_width {
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| 104 | XSDFEC_1x128b = 1,
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| 105 | XSDFEC_2x128b = 2,
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| 106 | XSDFEC_4x128b = 4,
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| 107 | };
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| 108 |
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| 109 | |
| 110 | * enum xsdfec_axis_word_include - Words Configuration.
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| 111 | * @XSDFEC_FIXED_VALUE: Fixed, the DIN_WORDS AXI4-Stream interface is removed
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| 112 | * from the IP instance and is driven with the specified
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| 113 | * number of words.
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| 114 | * @XSDFEC_IN_BLOCK: In Block, configures the IP instance to expect a single
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| 115 | * DIN_WORDS value per input code block. The DIN_WORDS
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| 116 | * interface is present.
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| 117 | * @XSDFEC_PER_AXI_TRANSACTION: Per Transaction, configures the IP instance to
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| 118 | * expect one DIN_WORDS value per input transaction on the DIN interface. The
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| 119 | * DIN_WORDS interface is present.
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| 120 | * @XSDFEC_AXIS_WORDS_INCLUDE_MAX: Used to indicate out of bound Words
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| 121 | * Configurations.
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| 122 | *
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| 123 | * This enum is used to specify the DIN_WORDS configuration.
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| 124 |
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| 125 | enum xsdfec_axis_word_include {
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| 126 | XSDFEC_FIXED_VALUE = 0,
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| 127 | XSDFEC_IN_BLOCK,
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| 128 | XSDFEC_PER_AXI_TRANSACTION,
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| 129 | XSDFEC_AXIS_WORDS_INCLUDE_MAX,
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| 130 | };
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| 131 |
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| 132 | |
| 133 | * struct xsdfec_turbo - User data for Turbo codes.
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| 134 | * @alg: Specifies which Turbo decode algorithm to use
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| 135 | * @scale: Specifies the extrinsic scaling to apply when the Max Scale algorithm
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| 136 | * has been selected
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| 137 | *
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| 138 | * Turbo code structure to communicate parameters to XSDFEC driver.
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| 139 |
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| 140 | struct xsdfec_turbo {
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| 141 | __u32 alg;
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| 142 | __u8 scale;
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| 143 | };
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| 144 |
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| 145 | |
| 146 | * struct xsdfec_ldpc_params - User data for LDPC codes.
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| 147 | * @n: Number of code word bits
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| 148 | * @k: Number of information bits
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| 149 | * @psize: Size of sub-matrix
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| 150 | * @nlayers: Number of layers in code
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| 151 | * @nqc: Quasi Cyclic Number
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| 152 | * @nmqc: Number of M-sized QC operations in parity check matrix
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| 153 | * @nm: Number of M-size vectors in N
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| 154 | * @norm_type: Normalization required or not
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| 155 | * @no_packing: Determines if multiple QC ops should be performed
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| 156 | * @special_qc: Sub-Matrix property for Circulant weight > 0
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| 157 | * @no_final_parity: Decide if final parity check needs to be performed
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| 158 | * @max_schedule: Experimental code word scheduling limit
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| 159 | * @sc_off: SC offset
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| 160 | * @la_off: LA offset
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| 161 | * @qc_off: QC offset
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| 162 | * @sc_table: Pointer to SC Table which must be page aligned
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| 163 | * @la_table: Pointer to LA Table which must be page aligned
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| 164 | * @qc_table: Pointer to QC Table which must be page aligned
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| 165 | * @code_id: LDPC Code
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| 166 | *
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| 167 | * This structure describes the LDPC code that is passed to the driver by the
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| 168 | * application.
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| 169 |
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| 170 | struct xsdfec_ldpc_params {
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| 171 | __u32 n;
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| 172 | __u32 k;
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| 173 | __u32 psize;
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| 174 | __u32 nlayers;
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| 175 | __u32 nqc;
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| 176 | __u32 nmqc;
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| 177 | __u32 nm;
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| 178 | __u32 norm_type;
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| 179 | __u32 no_packing;
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| 180 | __u32 special_qc;
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| 181 | __u32 no_final_parity;
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| 182 | __u32 max_schedule;
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| 183 | __u32 sc_off;
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| 184 | __u32 la_off;
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| 185 | __u32 qc_off;
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| 186 | __u32 *sc_table;
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| 187 | __u32 *la_table;
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| 188 | __u32 *qc_table;
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| 189 | __u16 code_id;
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| 190 | };
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| 191 |
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| 192 | |
| 193 | * struct xsdfec_status - Status of SD-FEC core.
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| 194 | * @state: State of the SD-FEC core
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| 195 | * @activity: Describes if the SD-FEC instance is Active
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| 196 |
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| 197 | struct xsdfec_status {
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| 198 | __u32 state;
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| 199 | __s8 activity;
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| 200 | };
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| 201 |
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| 202 | |
| 203 | * struct xsdfec_irq - Enabling or Disabling Interrupts.
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| 204 | * @enable_isr: If true enables the ISR
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| 205 | * @enable_ecc_isr: If true enables the ECC ISR
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| 206 |
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| 207 | struct xsdfec_irq {
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| 208 | __s8 enable_isr;
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| 209 | __s8 enable_ecc_isr;
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| 210 | };
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| 211 |
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| 212 | |
| 213 | * struct xsdfec_config - Configuration of SD-FEC core.
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| 214 | * @code: The codes being used by the SD-FEC instance
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| 215 | * @order: Order of Operation
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| 216 | * @din_width: Width of the DIN AXI4-Stream
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| 217 | * @din_word_include: How DIN_WORDS are inputted
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| 218 | * @dout_width: Width of the DOUT AXI4-Stream
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| 219 | * @dout_word_include: HOW DOUT_WORDS are outputted
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| 220 | * @irq: Enabling or disabling interrupts
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| 221 | * @bypass: Is the core being bypassed
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| 222 | * @code_wr_protect: Is write protection of LDPC codes enabled
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| 223 |
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| 224 | struct xsdfec_config {
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| 225 | __u32 code;
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| 226 | __u32 order;
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| 227 | __u32 din_width;
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| 228 | __u32 din_word_include;
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| 229 | __u32 dout_width;
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| 230 | __u32 dout_word_include;
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| 231 | struct xsdfec_irq irq;
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| 232 | __s8 bypass;
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| 233 | __s8 code_wr_protect;
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| 234 | };
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| 235 |
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| 236 | |
| 237 | * struct xsdfec_stats - Stats retrived by ioctl XSDFEC_GET_STATS. Used
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| 238 | * to buffer atomic_t variables from struct
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| 239 | * xsdfec_dev. Counts are accumulated until
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| 240 | * the user clears them.
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| 241 | * @isr_err_count: Count of ISR errors
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| 242 | * @cecc_count: Count of Correctable ECC errors (SBE)
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| 243 | * @uecc_count: Count of Uncorrectable ECC errors (MBE)
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| 244 |
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| 245 | struct xsdfec_stats {
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| 246 | __u32 isr_err_count;
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| 247 | __u32 cecc_count;
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| 248 | __u32 uecc_count;
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| 249 | };
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| 250 |
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| 251 | |
| 252 | * struct xsdfec_ldpc_param_table_sizes - Used to store sizes of SD-FEC table
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| 253 | * entries for an individual LPDC code
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| 254 | * parameter.
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| 255 | * @sc_size: Size of SC table used
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| 256 | * @la_size: Size of LA table used
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| 257 | * @qc_size: Size of QC table used
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| 258 |
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| 259 | struct xsdfec_ldpc_param_table_sizes {
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| 260 | __u32 sc_size;
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| 261 | __u32 la_size;
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| 262 | __u32 qc_size;
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| 263 | };
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| 264 |
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| 265 | |
| 266 | * XSDFEC IOCTL List
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| 267 |
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| 268 | #define XSDFEC_MAGIC 'f'
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| 269 | |
| 270 | * DOC: XSDFEC_START_DEV
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| 271 | *
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| 272 | * @Description
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| 273 | *
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| 274 | * ioctl to start SD-FEC core
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| 275 | *
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| 276 | * This fails if the XSDFEC_SET_ORDER ioctl has not been previously called
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| 277 |
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| 278 | #define XSDFEC_START_DEV _IO(XSDFEC_MAGIC, 0)
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| 279 | |
| 280 | * DOC: XSDFEC_STOP_DEV
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| 281 | *
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| 282 | * @Description
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| 283 | *
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| 284 | * ioctl to stop the SD-FEC core
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| 285 |
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| 286 | #define XSDFEC_STOP_DEV _IO(XSDFEC_MAGIC, 1)
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| 287 | |
| 288 | * DOC: XSDFEC_GET_STATUS
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| 289 | *
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| 290 | * @Description
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| 291 | *
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| 292 | * ioctl that returns status of SD-FEC core
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| 293 |
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| 294 | #define XSDFEC_GET_STATUS _IOR(XSDFEC_MAGIC, 2, struct xsdfec_status)
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| 295 | |
| 296 | * DOC: XSDFEC_SET_IRQ
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| 297 | * @Parameters
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| 298 | *
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| 299 | * @struct xsdfec_irq *
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| 300 | * Pointer to the &struct xsdfec_irq that contains the interrupt settings
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| 301 | * for the SD-FEC core
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| 302 | *
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| 303 | * @Description
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| 304 | *
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| 305 | * ioctl to enable or disable irq
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| 306 |
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| 307 | #define XSDFEC_SET_IRQ _IOW(XSDFEC_MAGIC, 3, struct xsdfec_irq)
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| 308 | |
| 309 | * DOC: XSDFEC_SET_TURBO
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| 310 | * @Parameters
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| 311 | *
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| 312 | * @struct xsdfec_turbo *
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| 313 | * Pointer to the &struct xsdfec_turbo that contains the Turbo decode
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| 314 | * settings for the SD-FEC core
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| 315 | *
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| 316 | * @Description
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| 317 | *
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| 318 | * ioctl that sets the SD-FEC Turbo parameter values
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| 319 | *
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| 320 | * This can only be used when the driver is in the XSDFEC_STOPPED state
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| 321 |
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| 322 | #define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo)
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| 323 | |
| 324 | * DOC: XSDFEC_ADD_LDPC_CODE_PARAMS
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| 325 | * @Parameters
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| 326 | *
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| 327 | * @struct xsdfec_ldpc_params *
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| 328 | * Pointer to the &struct xsdfec_ldpc_params that contains the LDPC code
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| 329 | * parameters to be added to the SD-FEC Block
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| 330 | *
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| 331 | * @Description
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| 332 | * ioctl to add an LDPC code to the SD-FEC LDPC codes
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| 333 | *
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| 334 | * This can only be used when:
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| 335 | *
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| 336 | * - Driver is in the XSDFEC_STOPPED state
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| 337 | *
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| 338 | * - SD-FEC core is configured as LPDC
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| 339 | *
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| 340 | * - SD-FEC Code Write Protection is disabled
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| 341 |
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| 342 | #define XSDFEC_ADD_LDPC_CODE_PARAMS \
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| 343 | _IOW(XSDFEC_MAGIC, 5, struct xsdfec_ldpc_params)
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| 344 | |
| 345 | * DOC: XSDFEC_GET_CONFIG
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| 346 | * @Parameters
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| 347 | *
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| 348 | * @struct xsdfec_config *
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| 349 | * Pointer to the &struct xsdfec_config that contains the current
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| 350 | * configuration settings of the SD-FEC Block
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| 351 | *
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| 352 | * @Description
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| 353 | *
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| 354 | * ioctl that returns SD-FEC core configuration
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| 355 |
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| 356 | #define XSDFEC_GET_CONFIG _IOR(XSDFEC_MAGIC, 6, struct xsdfec_config)
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| 357 | |
| 358 | * DOC: XSDFEC_GET_TURBO
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| 359 | * @Parameters
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| 360 | *
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| 361 | * @struct xsdfec_turbo *
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| 362 | * Pointer to the &struct xsdfec_turbo that contains the current Turbo
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| 363 | * decode settings of the SD-FEC Block
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| 364 | *
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| 365 | * @Description
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| 366 | *
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| 367 | * ioctl that returns SD-FEC turbo param values
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| 368 |
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| 369 | #define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo)
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| 370 | |
| 371 | * DOC: XSDFEC_SET_ORDER
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| 372 | * @Parameters
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| 373 | *
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| 374 | * @struct unsigned long *
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| 375 | * Pointer to the unsigned long that contains a value from the
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| 376 | * @enum xsdfec_order
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| 377 | *
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| 378 | * @Description
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| 379 | *
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| 380 | * ioctl that sets order, if order of blocks can change from input to output
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| 381 | *
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| 382 | * This can only be used when the driver is in the XSDFEC_STOPPED state
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| 383 |
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| 384 | #define XSDFEC_SET_ORDER _IOW(XSDFEC_MAGIC, 8, unsigned long)
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| 385 | |
| 386 | * DOC: XSDFEC_SET_BYPASS
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| 387 | * @Parameters
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| 388 | *
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| 389 | * @struct bool *
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| 390 | * Pointer to bool that sets the bypass value, where false results in
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| 391 | * normal operation and false results in the SD-FEC performing the
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| 392 | * configured operations (same number of cycles) but output data matches
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| 393 | * the input data
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| 394 | *
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| 395 | * @Description
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| 396 | *
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| 397 | * ioctl that sets bypass.
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| 398 | *
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| 399 | * This can only be used when the driver is in the XSDFEC_STOPPED state
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| 400 |
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| 401 | #define XSDFEC_SET_BYPASS _IOW(XSDFEC_MAGIC, 9, bool)
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| 402 | |
| 403 | * DOC: XSDFEC_IS_ACTIVE
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| 404 | * @Parameters
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| 405 | *
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| 406 | * @struct bool *
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| 407 | * Pointer to bool that returns true if the SD-FEC is processing data
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| 408 | *
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| 409 | * @Description
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| 410 | *
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| 411 | * ioctl that determines if SD-FEC is processing data
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| 412 |
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| 413 | #define XSDFEC_IS_ACTIVE _IOR(XSDFEC_MAGIC, 10, bool)
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| 414 | |
| 415 | * DOC: XSDFEC_CLEAR_STATS
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| 416 | *
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| 417 | * @Description
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| 418 | *
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| 419 | * ioctl that clears error stats collected during interrupts
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| 420 |
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| 421 | #define XSDFEC_CLEAR_STATS _IO(XSDFEC_MAGIC, 11)
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| 422 | |
| 423 | * DOC: XSDFEC_GET_STATS
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| 424 | * @Parameters
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| 425 | *
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| 426 | * @struct xsdfec_stats *
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| 427 | * Pointer to the &struct xsdfec_stats that will contain the updated stats
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| 428 | * values
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| 429 | *
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| 430 | * @Description
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| 431 | *
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| 432 | * ioctl that returns SD-FEC core stats
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| 433 | *
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| 434 | * This can only be used when the driver is in the XSDFEC_STOPPED state
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| 435 |
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| 436 | #define XSDFEC_GET_STATS _IOR(XSDFEC_MAGIC, 12, struct xsdfec_stats)
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| 437 | |
| 438 | * DOC: XSDFEC_SET_DEFAULT_CONFIG
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| 439 | *
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| 440 | * @Description
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| 441 | *
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| 442 | * ioctl that returns SD-FEC core to default config, use after a reset
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| 443 | *
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| 444 | * This can only be used when the driver is in the XSDFEC_STOPPED state
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| 445 |
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| 446 | #define XSDFEC_SET_DEFAULT_CONFIG _IO(XSDFEC_MAGIC, 13)
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| 447 |
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| 448 | #endif
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