| 1 | |
| 2 | |
| 3 | * Copyright (C) 2015 Imagination Technologies Ltd
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| 4 | * Author: Qais Yousef <[email protected]>
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| 5 | *
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| 6 | * This file contains driver APIs to the IPI subsystem.
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| 7 |
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| 8 |
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| 9 | #define pr_fmt(fmt) "genirq/ipi: " fmt
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| 10 |
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| 11 | #include <linux/irqdomain.h>
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| 12 | #include <linux/irq.h>
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| 13 |
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| 14 | |
| 15 | * irq_reserve_ipi() - Setup an IPI to destination cpumask
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| 16 | * @domain: IPI domain
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| 17 | * @dest: cpumask of CPUs which can receive the IPI
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| 18 | *
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| 19 | * Allocate a virq that can be used to send IPI to any CPU in dest mask.
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| 20 | *
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| 21 | * Return: Linux IRQ number on success or error code on failure
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| 22 |
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| 23 | int irq_reserve_ipi(struct irq_domain *domain,
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| 24 | const struct cpumask *dest)
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| 25 | {
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| 26 | unsigned int nr_irqs, offset;
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| 27 | struct irq_data *data;
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| 28 | int virq, i;
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| 29 |
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| 30 | if (!domain ||!irq_domain_is_ipi(domain)) {
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| 31 | pr_warn("Reservation on a non IPI domain\n");
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| 32 | return -EINVAL;
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| 33 | }
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| 34 |
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| 35 | if (!cpumask_subset(dest, cpu_possible_mask)) {
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| 36 | pr_warn("Reservation is not in possible_cpu_mask\n");
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| 37 | return -EINVAL;
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| 38 | }
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| 39 |
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| 40 | nr_irqs = cpumask_weight(dest);
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| 41 | if (!nr_irqs) {
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| 42 | pr_warn("Reservation for empty destination mask\n");
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| 43 | return -EINVAL;
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| 44 | }
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| 45 |
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| 46 | if (irq_domain_is_ipi_single(domain)) {
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| 47 | |
| 48 | * If the underlying implementation uses a single HW irq on
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| 49 | * all cpus then we only need a single Linux irq number for
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| 50 | * it. We have no restrictions vs. the destination mask. The
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| 51 | * underlying implementation can deal with holes nicely.
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| 52 |
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| 53 | nr_irqs = 1;
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| 54 | offset = 0;
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| 55 | } else {
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| 56 | unsigned int next;
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| 57 |
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| 58 | |
| 59 | * The IPI requires a separate HW irq on each CPU. We require
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| 60 | * that the destination mask is consecutive. If an
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| 61 | * implementation needs to support holes, it can reserve
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| 62 | * several IPI ranges.
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| 63 |
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| 64 | offset = cpumask_first(dest);
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| 65 | |
| 66 | * Find a hole and if found look for another set bit after the
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| 67 | * hole. For now we don't support this scenario.
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| 68 |
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| 69 | next = cpumask_next_zero(offset, dest);
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| 70 | if (next < nr_cpu_ids)
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| 71 | next = cpumask_next(next, dest);
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| 72 | if (next < nr_cpu_ids) {
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| 73 | pr_warn("Destination mask has holes\n");
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| 74 | return -EINVAL;
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| 75 | }
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| 76 | }
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| 77 |
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| 78 | virq = irq_domain_alloc_descs(-1, nr_irqs, 0, NUMA_NO_NODE, NULL);
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| 79 | if (virq <= 0) {
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| 80 | pr_warn("Can't reserve IPI, failed to alloc descs\n");
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| 81 | return -ENOMEM;
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| 82 | }
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| 83 |
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| 84 | virq = __irq_domain_alloc_irqs(domain, virq, nr_irqs, NUMA_NO_NODE,
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| 85 | (void *) dest, true, NULL);
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| 86 |
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| 87 | if (virq <= 0) {
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| 88 | pr_warn("Can't reserve IPI, failed to alloc hw irqs\n");
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| 89 | goto free_descs;
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| 90 | }
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| 91 |
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| 92 | for (i = 0; i < nr_irqs; i++) {
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| 93 | data = irq_get_irq_data(virq + i);
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| 94 | cpumask_copy(data->common->affinity, dest);
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| 95 | data->common->ipi_offset = offset;
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| 96 | irq_set_status_flags(virq + i, IRQ_NO_BALANCING);
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| 97 | }
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| 98 | return virq;
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| 99 |
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| 100 | free_descs:
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| 101 | irq_free_descs(virq, nr_irqs);
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| 102 | return -EBUSY;
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| 103 | }
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| 104 |
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| 105 | |
| 106 | * irq_destroy_ipi() - unreserve an IPI that was previously allocated
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| 107 | * @irq: Linux IRQ number to be destroyed
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| 108 | * @dest: cpumask of CPUs which should have the IPI removed
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| 109 | *
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| 110 | * The IPIs allocated with irq_reserve_ipi() are returned to the system
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| 111 | * destroying all virqs associated with them.
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| 112 | *
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| 113 | * Return: %0 on success or error code on failure.
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| 114 |
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| 115 | int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest)
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| 116 | {
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| 117 | struct irq_data *data = irq_get_irq_data(irq);
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| 118 | const struct cpumask *ipimask;
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| 119 | struct irq_domain *domain;
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| 120 | unsigned int nr_irqs;
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| 121 |
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| 122 | if (!irq || !data)
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| 123 | return -EINVAL;
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| 124 |
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| 125 | domain = data->domain;
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| 126 | if (WARN_ON(domain == NULL))
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| 127 | return -EINVAL;
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| 128 |
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| 129 | if (!irq_domain_is_ipi(domain)) {
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| 130 | pr_warn("Trying to destroy a non IPI domain!\n");
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| 131 | return -EINVAL;
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| 132 | }
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| 133 |
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| 134 | ipimask = irq_data_get_affinity_mask(data);
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| 135 | if (!ipimask || WARN_ON(!cpumask_subset(dest, ipimask)))
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| 136 | |
| 137 | * Must be destroying a subset of CPUs to which this IPI
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| 138 | * was set up to target
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| 139 |
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| 140 | return -EINVAL;
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| 141 |
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| 142 | if (irq_domain_is_ipi_per_cpu(domain)) {
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| 143 | irq = irq + cpumask_first(dest) - data->common->ipi_offset;
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| 144 | nr_irqs = cpumask_weight(dest);
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| 145 | } else {
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| 146 | nr_irqs = 1;
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| 147 | }
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| 148 |
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| 149 | irq_domain_free_irqs(irq, nr_irqs);
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| 150 | return 0;
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| 151 | }
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| 152 |
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| 153 | |
| 154 | * ipi_get_hwirq - Get the hwirq associated with an IPI to a CPU
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| 155 | * @irq: Linux IRQ number
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| 156 | * @cpu: the target CPU
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| 157 | *
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| 158 | * When dealing with coprocessors IPI, we need to inform the coprocessor of
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| 159 | * the hwirq it needs to use to receive and send IPIs.
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| 160 | *
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| 161 | * Return: hwirq value on success or INVALID_HWIRQ on failure.
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| 162 |
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| 163 | irq_hw_number_t ipi_get_hwirq(unsigned int irq, unsigned int cpu)
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| 164 | {
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| 165 | struct irq_data *data = irq_get_irq_data(irq);
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| 166 | const struct cpumask *ipimask;
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| 167 |
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| 168 | if (!data || cpu >= nr_cpu_ids)
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| 169 | return INVALID_HWIRQ;
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| 170 |
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| 171 | ipimask = irq_data_get_affinity_mask(data);
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| 172 | if (!ipimask || !cpumask_test_cpu(cpu, ipimask))
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| 173 | return INVALID_HWIRQ;
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| 174 |
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| 175 | |
| 176 | * Get the real hardware irq number if the underlying implementation
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| 177 | * uses a separate irq per cpu. If the underlying implementation uses
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| 178 | * a single hardware irq for all cpus then the IPI send mechanism
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| 179 | * needs to take care of the cpu destinations.
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| 180 |
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| 181 | if (irq_domain_is_ipi_per_cpu(data->domain))
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| 182 | data = irq_get_irq_data(irq + cpu - data->common->ipi_offset);
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| 183 |
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| 184 | return data ? irqd_to_hwirq(data) : INVALID_HWIRQ;
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| 185 | }
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| 186 | EXPORT_SYMBOL_GPL(ipi_get_hwirq);
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| 187 |
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| 188 | static int ipi_send_verify(struct irq_chip *chip, struct irq_data *data,
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| 189 | const struct cpumask *dest, unsigned int cpu)
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| 190 | {
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| 191 | const struct cpumask *ipimask;
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| 192 |
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| 193 | if (!chip || !data)
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| 194 | return -EINVAL;
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| 195 |
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| 196 | if (!chip->ipi_send_single && !chip->ipi_send_mask)
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| 197 | return -EINVAL;
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| 198 |
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| 199 | if (cpu >= nr_cpu_ids)
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| 200 | return -EINVAL;
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| 201 |
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| 202 | ipimask = irq_data_get_affinity_mask(data);
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| 203 | if (!ipimask)
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| 204 | return -EINVAL;
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| 205 |
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| 206 | if (dest) {
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| 207 | if (!cpumask_subset(dest, ipimask))
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| 208 | return -EINVAL;
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| 209 | } else {
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| 210 | if (!cpumask_test_cpu(cpu, ipimask))
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| 211 | return -EINVAL;
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| 212 | }
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| 213 | return 0;
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| 214 | }
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| 215 |
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| 216 | |
| 217 | * __ipi_send_single - send an IPI to a target Linux SMP CPU
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| 218 | * @desc: pointer to irq_desc of the IRQ
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| 219 | * @cpu: destination CPU, must in the destination mask passed to
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| 220 | * irq_reserve_ipi()
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| 221 | *
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| 222 | * This function is for architecture or core code to speed up IPI sending. Not
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| 223 | * usable from driver code.
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| 224 | *
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| 225 | * Return: %0 on success or negative error number on failure.
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| 226 |
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| 227 | int __ipi_send_single(struct irq_desc *desc, unsigned int cpu)
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| 228 | {
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| 229 | struct irq_data *data = irq_desc_get_irq_data(desc);
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| 230 | struct irq_chip *chip = irq_data_get_irq_chip(data);
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| 231 |
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| 232 | #ifdef DEBUG
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| 233 | |
| 234 | * Minimise the overhead by omitting the checks for Linux SMP IPIs.
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| 235 | * Since the callers should be arch or core code which is generally
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| 236 | * trusted, only check for errors when debugging.
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| 237 |
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| 238 | if (WARN_ON_ONCE(ipi_send_verify(chip, data, NULL, cpu)))
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| 239 | return -EINVAL;
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| 240 | #endif
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| 241 | if (!chip->ipi_send_single) {
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| 242 | chip->ipi_send_mask(data, cpumask_of(cpu));
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| 243 | return 0;
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| 244 | }
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| 245 |
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| 246 |
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| 247 | if (irq_domain_is_ipi_per_cpu(data->domain) &&
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| 248 | cpu != data->common->ipi_offset) {
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| 249 |
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| 250 | unsigned irq = data->irq + cpu - data->common->ipi_offset;
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| 251 |
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| 252 | data = irq_get_irq_data(irq);
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| 253 | }
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| 254 | chip->ipi_send_single(data, cpu);
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| 255 | return 0;
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| 256 | }
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| 257 |
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| 258 | |
| 259 | * __ipi_send_mask - send an IPI to target Linux SMP CPU(s)
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| 260 | * @desc: pointer to irq_desc of the IRQ
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| 261 | * @dest: dest CPU(s), must be a subset of the mask passed to
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| 262 | * irq_reserve_ipi()
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| 263 | *
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| 264 | * This function is for architecture or core code to speed up IPI sending. Not
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| 265 | * usable from driver code.
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| 266 | *
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| 267 | * Return: %0 on success or negative error number on failure.
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| 268 |
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| 269 | int __ipi_send_mask(struct irq_desc *desc, const struct cpumask *dest)
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| 270 | {
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| 271 | struct irq_data *data = irq_desc_get_irq_data(desc);
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| 272 | struct irq_chip *chip = irq_data_get_irq_chip(data);
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| 273 | unsigned int cpu;
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| 274 |
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| 275 | #ifdef DEBUG
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| 276 | |
| 277 | * Minimise the overhead by omitting the checks for Linux SMP IPIs.
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| 278 | * Since the callers should be arch or core code which is generally
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| 279 | * trusted, only check for errors when debugging.
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| 280 |
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| 281 | if (WARN_ON_ONCE(ipi_send_verify(chip, data, dest, 0)))
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| 282 | return -EINVAL;
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| 283 | #endif
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| 284 | if (chip->ipi_send_mask) {
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| 285 | chip->ipi_send_mask(data, dest);
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| 286 | return 0;
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| 287 | }
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| 288 |
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| 289 | if (irq_domain_is_ipi_per_cpu(data->domain)) {
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| 290 | unsigned int base = data->irq;
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| 291 |
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| 292 | for_each_cpu(cpu, dest) {
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| 293 | unsigned irq = base + cpu - data->common->ipi_offset;
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| 294 |
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| 295 | data = irq_get_irq_data(irq);
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| 296 | chip->ipi_send_single(data, cpu);
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| 297 | }
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| 298 | } else {
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| 299 | for_each_cpu(cpu, dest)
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| 300 | chip->ipi_send_single(data, cpu);
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| 301 | }
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| 302 | return 0;
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| 303 | }
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| 304 |
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| 305 | |
| 306 | * ipi_send_single - Send an IPI to a single CPU
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| 307 | * @virq: Linux IRQ number from irq_reserve_ipi()
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| 308 | * @cpu: destination CPU, must in the destination mask passed to
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| 309 | * irq_reserve_ipi()
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| 310 | *
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| 311 | * Return: %0 on success or negative error number on failure.
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| 312 |
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| 313 | int ipi_send_single(unsigned int virq, unsigned int cpu)
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| 314 | {
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| 315 | struct irq_desc *desc = irq_to_desc(virq);
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| 316 | struct irq_data *data = desc ? irq_desc_get_irq_data(desc) : NULL;
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| 317 | struct irq_chip *chip = data ? irq_data_get_irq_chip(data) : NULL;
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| 318 |
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| 319 | if (WARN_ON_ONCE(ipi_send_verify(chip, data, NULL, cpu)))
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| 320 | return -EINVAL;
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| 321 |
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| 322 | return __ipi_send_single(desc, cpu);
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| 323 | }
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| 324 | EXPORT_SYMBOL_GPL(ipi_send_single);
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| 325 |
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| 326 | |
| 327 | * ipi_send_mask - Send an IPI to target CPU(s)
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| 328 | * @virq: Linux IRQ number from irq_reserve_ipi()
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| 329 | * @dest: dest CPU(s), must be a subset of the mask passed to
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| 330 | * irq_reserve_ipi()
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| 331 | *
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| 332 | * Return: %0 on success or negative error number on failure.
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| 333 |
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| 334 | int ipi_send_mask(unsigned int virq, const struct cpumask *dest)
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| 335 | {
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| 336 | struct irq_desc *desc = irq_to_desc(virq);
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| 337 | struct irq_data *data = desc ? irq_desc_get_irq_data(desc) : NULL;
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| 338 | struct irq_chip *chip = data ? irq_data_get_irq_chip(data) : NULL;
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| 339 |
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| 340 | if (WARN_ON_ONCE(ipi_send_verify(chip, data, dest, 0)))
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| 341 | return -EINVAL;
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| 342 |
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| 343 | return __ipi_send_mask(desc, dest);
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| 344 | }
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| 345 | EXPORT_SYMBOL_GPL(ipi_send_mask);
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