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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2018 Intel Corporation
7 *
8 * Author: Liam Girdwood <[email protected]>
9 */
10
11#ifndef __SOUND_SOC_SOF_PRIV_H
12#define __SOUND_SOC_SOF_PRIV_H
13
14#include <linux/device.h>
15#include <sound/hdaudio.h>
16#include <sound/sof.h>
17#include <sound/sof/info.h>
18#include <sound/sof/pm.h>
19#include <sound/sof/trace.h>
20#include <sound/compress_params.h>
21#include <uapi/sound/sof/fw.h>
22#include <sound/sof/ext_manifest.h>
23
24struct snd_sof_pcm_stream;
25
26/* Flag definitions used in sof_core_debug (sof_debug module parameter) */
27#define SOF_DBG_ENABLE_TRACE BIT(0)
28#define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */
29#define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */
30#define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token
31 * 1: override topology
32 */
33#define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines
34 * 1: use dynamic pipelines
35 */
36#define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets
37 * on primary core
38 */
39#define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */
40#define SOF_DBG_IGNORE_D3_PERSISTENT BIT(7) /* ignore the DSP D3 persistent capability
41 * and always download firmware upon D3 exit
42 */
43#define SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS BIT(8) /* print DMA position updates
44 * in dmesg logs
45 */
46#define SOF_DBG_PRINT_IPC_SUCCESS_LOGS BIT(9) /* print IPC success
47 * in dmesg logs
48 */
49#define SOF_DBG_FORCE_NOCODEC BIT(10) /* ignore all codec-related
50 * configurations
51 */
52#define SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD BIT(11) /* On top of the IPC message header
53 * dump the message payload also
54 */
55#define SOF_DBG_DSPLESS_MODE BIT(15) /* Do not initialize and use the DSP */
56
57/* Flag definitions used for controlling the DSP dump behavior */
58#define SOF_DBG_DUMP_REGS BIT(0)
59#define SOF_DBG_DUMP_MBOX BIT(1)
60#define SOF_DBG_DUMP_TEXT BIT(2)
61#define SOF_DBG_DUMP_PCI BIT(3)
62/* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */
63#define SOF_DBG_DUMP_OPTIONAL BIT(4)
64
65/* global debug state set by SOF_DBG_ flags */
66bool sof_debug_check_flag(int mask);
67
68/* max BARs mmaped devices can use */
69#define SND_SOF_BARS 8
70
71/* time in ms for runtime suspend delay */
72#define SND_SOF_SUSPEND_DELAY_MS 2000
73
74/* DMA buffer size for trace */
75#define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
76
77#define SOF_IPC_DSP_REPLY 0
78#define SOF_IPC_HOST_REPLY 1
79
80/* So far the primary core on all DSPs has ID 0 */
81#define SOF_DSP_PRIMARY_CORE 0
82
83/* max number of DSP cores */
84#define SOF_MAX_DSP_NUM_CORES 8
85
86struct sof_dsp_power_state {
87 u32 state;
88 u32 substate; /* platform-specific */
89};
90
91/* System suspend target state */
92enum sof_system_suspend_state {
93 SOF_SUSPEND_NONE = 0,
94 SOF_SUSPEND_S0IX,
95 SOF_SUSPEND_S3,
96 SOF_SUSPEND_S4,
97 SOF_SUSPEND_S5,
98};
99
100enum sof_dfsentry_type {
101 SOF_DFSENTRY_TYPE_IOMEM = 0,
102 SOF_DFSENTRY_TYPE_BUF,
103};
104
105enum sof_debugfs_access_type {
106 SOF_DEBUGFS_ACCESS_ALWAYS = 0,
107 SOF_DEBUGFS_ACCESS_D0_ONLY,
108};
109
110struct sof_compr_stream {
111 u64 copied_total;
112 u32 sampling_rate;
113 u16 channels;
114 u16 sample_container_bytes;
115 struct snd_codec codec_params;
116 size_t posn_offset;
117};
118
119struct snd_sof_dev;
120struct snd_sof_ipc_msg;
121struct snd_sof_ipc;
122struct snd_sof_debugfs_map;
123struct snd_soc_tplg_ops;
124struct snd_soc_component;
125struct snd_sof_pdata;
126
127/**
128 * struct snd_sof_platform_stream_params - platform dependent stream parameters
129 * @phy_addr: Platform dependent address to be used, if @use_phy_addr
130 * is true
131 * @stream_tag: Stream tag to use
132 * @use_phy_addr: Use the provided @phy_addr for configuration
133 * @no_ipc_position: Disable position update IPC from firmware
134 * @cont_update_posn: Continuous position update.
135 */
136struct snd_sof_platform_stream_params {
137 u32 phy_addr;
138 u16 stream_tag;
139 bool use_phy_address;
140 bool no_ipc_position;
141 bool cont_update_posn;
142};
143
144/**
145 * struct sof_firmware - Container struct for SOF firmware
146 * @fw: Pointer to the firmware
147 * @payload_offset: Offset of the data within the loaded firmware image to be
148 * loaded to the DSP (skipping for example ext_manifest section)
149 */
150struct sof_firmware {
151 const struct firmware *fw;
152 u32 payload_offset;
153};
154
155enum sof_dai_access {
156 SOF_DAI_DSP_ACCESS, /* access from DSP only */
157 SOF_DAI_HOST_ACCESS, /* access from host only */
158
159 SOF_DAI_ACCESS_NUM
160};
161
162/*
163 * SOF DSP HW abstraction operations.
164 * Used to abstract DSP HW architecture and any IO busses between host CPU
165 * and DSP device(s).
166 */
167struct snd_sof_dsp_ops {
168
169 /* probe/remove/shutdown */
170 int (*probe_early)(struct snd_sof_dev *sof_dev); /* optional */
171 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
172 void (*remove)(struct snd_sof_dev *sof_dev); /* optional */
173 void (*remove_late)(struct snd_sof_dev *sof_dev); /* optional */
174 int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */
175
176 /* DSP core boot / reset */
177 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
178 int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */
179 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
180 int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */
181 int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */
182
183 /*
184 * Register IO: only used by respective drivers themselves,
185 * TODO: consider removing these operations and calling respective
186 * implementations directly
187 */
188 void (*write8)(struct snd_sof_dev *sof_dev, void __iomem *addr,
189 u8 value); /* optional */
190 u8 (*read8)(struct snd_sof_dev *sof_dev,
191 void __iomem *addr); /* optional */
192 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
193 u32 value); /* optional */
194 u32 (*read)(struct snd_sof_dev *sof_dev,
195 void __iomem *addr); /* optional */
196 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
197 u64 value); /* optional */
198 u64 (*read64)(struct snd_sof_dev *sof_dev,
199 void __iomem *addr); /* optional */
200
201 /* memcpy IO */
202 int (*block_read)(struct snd_sof_dev *sof_dev,
203 enum snd_sof_fw_blk_type type, u32 offset,
204 void *dest, size_t size); /* mandatory */
205 int (*block_write)(struct snd_sof_dev *sof_dev,
206 enum snd_sof_fw_blk_type type, u32 offset,
207 void *src, size_t size); /* mandatory */
208
209 /* Mailbox IO */
210 void (*mailbox_read)(struct snd_sof_dev *sof_dev,
211 u32 offset, void *dest,
212 size_t size); /* optional */
213 void (*mailbox_write)(struct snd_sof_dev *sof_dev,
214 u32 offset, void *src,
215 size_t size); /* optional */
216
217 /* doorbell */
218 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
219 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
220
221 /* ipc */
222 int (*send_msg)(struct snd_sof_dev *sof_dev,
223 struct snd_sof_ipc_msg *msg); /* mandatory */
224
225 /* FW loading */
226 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
227 int (*load_module)(struct snd_sof_dev *sof_dev,
228 struct snd_sof_mod_hdr *hdr); /* optional */
229
230 /* connect pcm substream to a host stream */
231 int (*pcm_open)(struct snd_sof_dev *sdev,
232 struct snd_pcm_substream *substream); /* optional */
233 /* disconnect pcm substream to a host stream */
234 int (*pcm_close)(struct snd_sof_dev *sdev,
235 struct snd_pcm_substream *substream); /* optional */
236
237 /* host stream hw params */
238 int (*pcm_hw_params)(struct snd_sof_dev *sdev,
239 struct snd_pcm_substream *substream,
240 struct snd_pcm_hw_params *params,
241 struct snd_sof_platform_stream_params *platform_params); /* optional */
242
243 /* host stream hw_free */
244 int (*pcm_hw_free)(struct snd_sof_dev *sdev,
245 struct snd_pcm_substream *substream); /* optional */
246
247 /* host stream trigger */
248 int (*pcm_trigger)(struct snd_sof_dev *sdev,
249 struct snd_pcm_substream *substream,
250 int cmd); /* optional */
251
252 /* host stream pointer */
253 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
254 struct snd_pcm_substream *substream); /* optional */
255
256 /* pcm ack */
257 int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */
258
259 /*
260 * optional callback to retrieve the number of frames left/arrived from/to
261 * the DSP on the DAI side (link/codec/DMIC/etc).
262 *
263 * The callback is used when the firmware does not provide this information
264 * via the shared SRAM window and it can be retrieved by host.
265 */
266 u64 (*get_dai_frame_counter)(struct snd_sof_dev *sdev,
267 struct snd_soc_component *component,
268 struct snd_pcm_substream *substream); /* optional */
269
270 /*
271 * Optional callback to retrieve the number of bytes left/arrived from/to
272 * the DSP on the host side (bytes between host ALSA buffer and DSP).
273 *
274 * The callback is needed for ALSA delay reporting.
275 */
276 u64 (*get_host_byte_counter)(struct snd_sof_dev *sdev,
277 struct snd_soc_component *component,
278 struct snd_pcm_substream *substream); /* optional */
279
280 /* host read DSP stream data */
281 int (*ipc_msg_data)(struct snd_sof_dev *sdev,
282 struct snd_sof_pcm_stream *sps,
283 void *p, size_t sz); /* mandatory */
284
285 /* host side configuration of the stream's data offset in stream mailbox area */
286 int (*set_stream_data_offset)(struct snd_sof_dev *sdev,
287 struct snd_sof_pcm_stream *sps,
288 size_t posn_offset); /* optional */
289
290 /* pre/post firmware run */
291 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
292 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
293
294 /* parse platform specific extended manifest, optional */
295 int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev,
296 const struct sof_ext_man_elem_header *hdr);
297
298 /* DSP PM */
299 int (*suspend)(struct snd_sof_dev *sof_dev,
300 u32 target_state); /* optional */
301 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
302 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
303 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
304 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
305 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
306 int (*set_power_state)(struct snd_sof_dev *sdev,
307 const struct sof_dsp_power_state *target_state); /* optional */
308
309 /* DSP clocking */
310 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
311
312 /* debug */
313 const struct snd_sof_debugfs_map *debug_map; /* optional */
314 int debug_map_count; /* optional */
315 void (*dbg_dump)(struct snd_sof_dev *sof_dev,
316 u32 flags); /* optional */
317 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
318 int (*debugfs_add_region_item)(struct snd_sof_dev *sdev,
319 enum snd_sof_fw_blk_type blk_type, u32 offset,
320 size_t size, const char *name,
321 enum sof_debugfs_access_type access_type); /* optional */
322
323 /* host DMA trace (IPC3) */
324 int (*trace_init)(struct snd_sof_dev *sdev,
325 struct snd_dma_buffer *dmatb,
326 struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */
327 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
328 int (*trace_trigger)(struct snd_sof_dev *sdev,
329 int cmd); /* optional */
330
331 /* misc */
332 int (*get_bar_index)(struct snd_sof_dev *sdev,
333 u32 type); /* optional */
334 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
335 int (*get_window_offset)(struct snd_sof_dev *sdev,
336 u32 id);/* mandatory for common loader code */
337
338 /* machine driver ops */
339 int (*machine_register)(struct snd_sof_dev *sdev,
340 void *pdata); /* optional */
341 void (*machine_unregister)(struct snd_sof_dev *sdev,
342 void *pdata); /* optional */
343 struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */
344 void (*set_mach_params)(struct snd_soc_acpi_mach *mach,
345 struct snd_sof_dev *sdev); /* optional */
346
347 /* IPC client ops */
348 int (*register_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
349 void (*unregister_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
350
351 /* DAI ops */
352 struct snd_soc_dai_driver *drv;
353 int num_drv;
354
355 bool (*is_chain_dma_supported)(struct snd_sof_dev *sdev, u32 dai_type); /* optional */
356
357 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
358 u32 hw_info;
359
360 const struct dsp_arch_ops *dsp_arch_ops;
361};
362
363/* DSP architecture specific callbacks for oops and stack dumps */
364struct dsp_arch_ops {
365 void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops);
366 void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops,
367 u32 *stack, u32 stack_words);
368};
369
370#define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops)
371
372/* FS entry for debug files that can expose DSP memories, registers */
373struct snd_sof_dfsentry {
374 size_t size;
375 size_t buf_data_size; /* length of buffered data for file read operation */
376 enum sof_dfsentry_type type;
377 /*
378 * access_type specifies if the
379 * memory -> DSP resource (memory, register etc) is always accessible
380 * or if it is accessible only when the DSP is in D0.
381 */
382 enum sof_debugfs_access_type access_type;
383#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE)
384 char *cache_buf; /* buffer to cache the contents of debugfs memory */
385#endif
386 struct snd_sof_dev *sdev;
387 struct list_head list; /* list in sdev dfsentry list */
388 union {
389 void __iomem *io_mem;
390 void *buf;
391 };
392};
393
394/* Debug mapping for any DSP memory or registers that can used for debug */
395struct snd_sof_debugfs_map {
396 const char *name;
397 u32 bar;
398 u32 offset;
399 u32 size;
400 /*
401 * access_type specifies if the memory is always accessible
402 * or if it is accessible only when the DSP is in D0.
403 */
404 enum sof_debugfs_access_type access_type;
405};
406
407/* mailbox descriptor, used for host <-> DSP IPC */
408struct snd_sof_mailbox {
409 size_t size;
410 u32 offset;
411};
412
413/* IPC message descriptor for host <-> DSP IO */
414struct snd_sof_ipc_msg {
415 /* message data */
416 void *msg_data;
417 void *reply_data;
418 size_t msg_size;
419 size_t reply_size;
420 int reply_error;
421
422 bool ipc_complete;
423
424 wait_queue_head_t waitq;
425
426 /* notification, firmware initiated messages */
427 void *rx_data;
428};
429
430/**
431 * struct sof_ipc_fw_tracing_ops - IPC-specific firmware tracing ops
432 * @init: Function pointer for initialization of the tracing
433 * @free: Optional function pointer for freeing of the tracing
434 * @fw_crashed: Optional function pointer to notify the tracing of a firmware crash
435 * @suspend: Function pointer for system/runtime suspend
436 * @resume: Function pointer for system/runtime resume
437 */
438struct sof_ipc_fw_tracing_ops {
439 int (*init)(struct snd_sof_dev *sdev);
440 void (*free)(struct snd_sof_dev *sdev);
441 void (*fw_crashed)(struct snd_sof_dev *sdev);
442 void (*suspend)(struct snd_sof_dev *sdev, pm_message_t pm_state);
443 int (*resume)(struct snd_sof_dev *sdev);
444};
445
446/**
447 * struct sof_ipc_pm_ops - IPC-specific PM ops
448 * @ctx_save: Optional function pointer for context save
449 * @ctx_restore: Optional function pointer for context restore
450 * @set_core_state: Optional function pointer for turning on/off a DSP core
451 * @set_pm_gate: Optional function pointer for pm gate settings
452 */
453struct sof_ipc_pm_ops {
454 int (*ctx_save)(struct snd_sof_dev *sdev);
455 int (*ctx_restore)(struct snd_sof_dev *sdev);
456 int (*set_core_state)(struct snd_sof_dev *sdev, int core_idx, bool on);
457 int (*set_pm_gate)(struct snd_sof_dev *sdev, u32 flags);
458};
459
460/**
461 * struct sof_ipc_fw_loader_ops - IPC/FW-specific loader ops
462 * @validate: Function pointer for validating the firmware image
463 * @parse_ext_manifest: Function pointer for parsing the manifest of the firmware
464 * @load_fw_to_dsp: Optional function pointer for loading the firmware to the
465 * DSP.
466 * The function implements generic, hardware independent way
467 * of loading the initial firmware and its modules (if any).
468 */
469struct sof_ipc_fw_loader_ops {
470 int (*validate)(struct snd_sof_dev *sdev);
471 size_t (*parse_ext_manifest)(struct snd_sof_dev *sdev);
472 int (*load_fw_to_dsp)(struct snd_sof_dev *sdev);
473};
474
475struct sof_ipc_tplg_ops;
476struct sof_ipc_pcm_ops;
477
478/**
479 * struct sof_ipc_ops - IPC-specific ops
480 * @tplg: Pointer to IPC-specific topology ops
481 * @pm: Pointer to PM ops
482 * @pcm: Pointer to PCM ops
483 * @fw_loader: Pointer to Firmware Loader ops
484 * @fw_tracing: Optional pointer to Firmware tracing ops
485 *
486 * @init: Optional pointer for IPC related initialization
487 * @exit: Optional pointer for IPC related cleanup
488 * @post_fw_boot: Optional pointer to execute IPC related tasks after firmware
489 * boot.
490 *
491 * @tx_msg: Function pointer for sending a 'short' IPC message
492 * @set_get_data: Function pointer for set/get data ('large' IPC message). This
493 * function may split up the 'large' message and use the @tx_msg
494 * path to transfer individual chunks, or use other means to transfer
495 * the message.
496 * @get_reply: Function pointer for fetching the reply to
497 * sdev->ipc->msg.reply_data
498 * @rx_msg: Function pointer for handling a received message
499 *
500 * Note: both @tx_msg and @set_get_data considered as TX functions and they are
501 * serialized for the duration of the instructed transfer. A large message sent
502 * via @set_get_data is a single transfer even if at the hardware level it is
503 * handled with multiple chunks.
504 */
505struct sof_ipc_ops {
506 const struct sof_ipc_tplg_ops *tplg;
507 const struct sof_ipc_pm_ops *pm;
508 const struct sof_ipc_pcm_ops *pcm;
509 const struct sof_ipc_fw_loader_ops *fw_loader;
510 const struct sof_ipc_fw_tracing_ops *fw_tracing;
511
512 int (*init)(struct snd_sof_dev *sdev);
513 void (*exit)(struct snd_sof_dev *sdev);
514 int (*post_fw_boot)(struct snd_sof_dev *sdev);
515
516 int (*tx_msg)(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
517 void *reply_data, size_t reply_bytes, bool no_pm);
518 int (*set_get_data)(struct snd_sof_dev *sdev, void *data, size_t data_bytes,
519 bool set);
520 int (*get_reply)(struct snd_sof_dev *sdev);
521 void (*rx_msg)(struct snd_sof_dev *sdev);
522};
523
524/* SOF generic IPC data */
525struct snd_sof_ipc {
526 struct snd_sof_dev *sdev;
527
528 /* protects messages and the disable flag */
529 struct mutex tx_mutex;
530 /* disables further sending of ipc's */
531 bool disable_ipc_tx;
532
533 /* Maximum allowed size of a single IPC message/reply */
534 size_t max_payload_size;
535
536 struct snd_sof_ipc_msg msg;
537
538 /* IPC ops based on version */
539 const struct sof_ipc_ops *ops;
540};
541
542/* Helper to retrieve the IPC ops */
543#define sof_ipc_get_ops(sdev, ops_name) \
544 (((sdev)->ipc && (sdev)->ipc->ops) ? (sdev)->ipc->ops->ops_name : NULL)
545
546/*
547 * SOF Device Level.
548 */
549struct snd_sof_dev {
550 struct device *dev;
551 spinlock_t ipc_lock; /* lock for IPC users */
552 spinlock_t hw_lock; /* lock for HW IO access */
553
554 /*
555 * When true the DSP is not used.
556 * It is set under the following condition:
557 * User sets the SOF_DBG_DSPLESS_MODE flag in sof_debug module parameter
558 * and
559 * the platform advertises that it can support such mode
560 * pdata->desc->dspless_mode_supported is true.
561 */
562 bool dspless_mode_selected;
563
564 /* Main, Base firmware image */
565 struct sof_firmware basefw;
566
567 /*
568 * ASoC components. plat_drv fields are set dynamically so
569 * can't use const
570 */
571 struct snd_soc_component_driver plat_drv;
572
573 /* current DSP power state */
574 struct sof_dsp_power_state dsp_power_state;
575 /* mutex to protect the dsp_power_state access */
576 struct mutex power_state_access;
577
578 /* Intended power target of system suspend */
579 enum sof_system_suspend_state system_suspend_target;
580
581 /* DSP firmware boot */
582 wait_queue_head_t boot_wait;
583 enum sof_fw_state fw_state;
584 bool first_boot;
585 /* mutex to protect DSP firmware boot (except initial, probe time boot */
586 struct mutex dsp_fw_boot_mutex;
587
588 /* work queue in case the probe is implemented in two steps */
589 struct work_struct probe_work;
590 bool probe_completed;
591
592 /* DSP HW differentiation */
593 struct snd_sof_pdata *pdata;
594
595 /* IPC */
596 struct snd_sof_ipc *ipc;
597 struct snd_sof_mailbox fw_info_box; /* FW shared memory */
598 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */
599 struct snd_sof_mailbox host_box; /* Host initiated IPC */
600 struct snd_sof_mailbox stream_box; /* Stream position update */
601 struct snd_sof_mailbox debug_box; /* Debug info updates */
602 struct snd_sof_ipc_msg *msg;
603 int ipc_irq;
604 u32 next_comp_id; /* monotonic - reset during S3 */
605
606 /* memory bases for mmaped DSPs - set by dsp_init() */
607 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */
608 int mmio_bar;
609 int mailbox_bar;
610 size_t dsp_oops_offset;
611
612 /* debug */
613 struct dentry *debugfs_root;
614 struct list_head dfsentry_list;
615 bool dbg_dump_printed;
616 bool ipc_dump_printed;
617 bool d3_prevented; /* runtime pm use count incremented to prevent context lost */
618
619 /* firmware loader */
620 struct sof_ipc_fw_ready fw_ready;
621 struct sof_ipc_fw_version fw_version;
622 struct sof_ipc_cc_version *cc_version;
623
624 /* topology */
625 struct snd_soc_tplg_ops *tplg_ops;
626 struct list_head pcm_list;
627 struct list_head kcontrol_list;
628 struct list_head widget_list;
629 struct list_head pipeline_list;
630 struct list_head dai_list;
631 struct list_head dai_link_list;
632 struct list_head route_list;
633 struct snd_soc_component *component;
634 u32 enabled_cores_mask; /* keep track of enabled cores */
635 bool led_present;
636
637 /* FW configuration */
638 struct sof_ipc_window *info_window;
639
640 /* IPC timeouts in ms */
641 int ipc_timeout;
642 int boot_timeout;
643
644 /* firmwre tracing */
645 bool fw_trace_is_supported; /* set with Kconfig or module parameter */
646 void *fw_trace_data; /* private data used by firmware tracing implementation */
647
648 bool msi_enabled;
649
650 /* DSP core context */
651 u32 num_cores;
652
653 /*
654 * ref count per core that will be modified during system suspend/resume and during pcm
655 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm
656 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in
657 * sound/core/ when streams are active and during system suspend/resume, streams are
658 * already suspended.
659 */
660 int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES];
661
662 /*
663 * Used to keep track of registered IPC client devices so that they can
664 * be removed when the parent SOF module is removed.
665 */
666 struct list_head ipc_client_list;
667
668 /* mutex to protect client list */
669 struct mutex ipc_client_mutex;
670
671 /*
672 * Used for tracking the IPC client's RX registration for DSP initiated
673 * message handling.
674 */
675 struct list_head ipc_rx_handler_list;
676
677 /*
678 * Used for tracking the IPC client's registration for DSP state change
679 * notification
680 */
681 struct list_head fw_state_handler_list;
682
683 /* to protect the ipc_rx_handler_list and dsp_state_handler_list list */
684 struct mutex client_event_handler_mutex;
685
686 /* quirks to override topology values */
687 bool mclk_id_override;
688 u16 mclk_id_quirk; /* same size as in IPC3 definitions */
689
690 void *private; /* core does not touch this */
691};
692
693/*
694 * Device Level.
695 */
696
697int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
698int snd_sof_device_remove(struct device *dev);
699int snd_sof_device_shutdown(struct device *dev);
700bool snd_sof_device_probe_completed(struct device *dev);
701
702int snd_sof_runtime_suspend(struct device *dev);
703int snd_sof_runtime_resume(struct device *dev);
704int snd_sof_runtime_idle(struct device *dev);
705int snd_sof_resume(struct device *dev);
706int snd_sof_suspend(struct device *dev);
707int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev);
708int snd_sof_prepare(struct device *dev);
709void snd_sof_complete(struct device *dev);
710int snd_sof_boot_dsp_firmware(struct snd_sof_dev *sdev);
711
712void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
713
714/*
715 * Compress support
716 */
717extern struct snd_compress_ops sof_compressed_ops;
718
719/*
720 * Firmware (firmware, libraries, topologies) file location
721 */
722int sof_create_ipc_file_profile(struct snd_sof_dev *sdev,
723 struct sof_loadable_file_profile *base_profile,
724 struct sof_loadable_file_profile *out_profile);
725
726/*
727 * Firmware loading.
728 */
729int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
730int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
731int snd_sof_run_firmware(struct snd_sof_dev *sdev);
732void snd_sof_fw_unload(struct snd_sof_dev *sdev);
733
734/*
735 * IPC low level APIs.
736 */
737struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
738void snd_sof_ipc_free(struct snd_sof_dev *sdev);
739void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev);
740void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
741static inline void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
742{
743 sdev->ipc->ops->rx_msg(sdev);
744}
745int sof_ipc_tx_message(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
746 void *reply_data, size_t reply_bytes);
747static inline int sof_ipc_tx_message_no_reply(struct snd_sof_ipc *ipc, void *msg_data,
748 size_t msg_bytes)
749{
750 return sof_ipc_tx_message(ipc, msg_data, msg_bytes, NULL, 0);
751}
752int sof_ipc_set_get_data(struct snd_sof_ipc *ipc, void *msg_data,
753 size_t msg_bytes, bool set);
754int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
755 void *reply_data, size_t reply_bytes);
756static inline int sof_ipc_tx_message_no_pm_no_reply(struct snd_sof_ipc *ipc, void *msg_data,
757 size_t msg_bytes)
758{
759 return sof_ipc_tx_message_no_pm(ipc, msg_data, msg_bytes, NULL, 0);
760}
761int sof_ipc_send_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
762 size_t reply_bytes);
763
764static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id)
765{
766 snd_sof_ipc_get_reply(sdev);
767 snd_sof_ipc_reply(sdev, msg_id);
768}
769
770/*
771 * Trace/debug
772 */
773int snd_sof_dbg_init(struct snd_sof_dev *sdev);
774void snd_sof_free_debug(struct snd_sof_dev *sdev);
775int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
776 void *base, size_t size,
777 const char *name, mode_t mode);
778void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level,
779 u32 panic_code, u32 tracep_code, void *oops,
780 struct sof_ipc_panic_info *panic_info,
781 void *stack, size_t stack_words);
782void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev, const char *msg);
783int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev);
784int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev,
785 enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size,
786 const char *name, enum sof_debugfs_access_type access_type);
787/* Firmware tracing */
788int sof_fw_trace_init(struct snd_sof_dev *sdev);
789void sof_fw_trace_free(struct snd_sof_dev *sdev);
790void sof_fw_trace_fw_crashed(struct snd_sof_dev *sdev);
791void sof_fw_trace_suspend(struct snd_sof_dev *sdev, pm_message_t pm_state);
792int sof_fw_trace_resume(struct snd_sof_dev *sdev);
793
794/*
795 * DSP Architectures.
796 */
797static inline void sof_stack(struct snd_sof_dev *sdev, const char *level,
798 void *oops, u32 *stack, u32 stack_words)
799{
800 sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level, oops, stack,
801 stack_words);
802}
803
804static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops)
805{
806 if (sof_dsp_arch_ops(sdev)->dsp_oops)
807 sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops);
808}
809
810extern const struct dsp_arch_ops sof_xtensa_arch_ops;
811
812/*
813 * Firmware state tracking
814 */
815void sof_set_fw_state(struct snd_sof_dev *sdev, enum sof_fw_state new_state);
816
817/*
818 * Utilities
819 */
820void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
821void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
822u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
823u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
824void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
825 void *message, size_t bytes);
826void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
827 void *message, size_t bytes);
828int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
829 u32 offset, void *src, size_t size);
830int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
831 u32 offset, void *dest, size_t size);
832
833int sof_ipc_msg_data(struct snd_sof_dev *sdev,
834 struct snd_sof_pcm_stream *sps,
835 void *p, size_t sz);
836int sof_set_stream_data_offset(struct snd_sof_dev *sdev,
837 struct snd_sof_pcm_stream *sps,
838 size_t posn_offset);
839
840int sof_stream_pcm_open(struct snd_sof_dev *sdev,
841 struct snd_pcm_substream *substream);
842int sof_stream_pcm_close(struct snd_sof_dev *sdev,
843 struct snd_pcm_substream *substream);
844
845/* SOF client support */
846struct sof_client_dev;
847
848#if IS_ENABLED(CONFIG_SND_SOC_SOF_CLIENT)
849struct snd_sof_dev *sof_client_dev_to_sof_dev(struct sof_client_dev *cdev);
850
851int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, u32 id,
852 const void *data, size_t size);
853void sof_client_dev_unregister(struct snd_sof_dev *sdev, const char *name, u32 id);
854int sof_register_clients(struct snd_sof_dev *sdev);
855void sof_unregister_clients(struct snd_sof_dev *sdev);
856void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf);
857void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev);
858int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state);
859int sof_resume_clients(struct snd_sof_dev *sdev);
860#else /* CONFIG_SND_SOC_SOF_CLIENT */
861static inline struct snd_sof_dev *
862sof_client_dev_to_sof_dev(struct sof_client_dev *cdev) {
863 return NULL;
864}
865
866static inline int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name,
867 u32 id, const void *data, size_t size)
868{
869 return 0;
870}
871
872static inline void sof_client_dev_unregister(struct snd_sof_dev *sdev,
873 const char *name, u32 id)
874{
875}
876
877static inline int sof_register_clients(struct snd_sof_dev *sdev)
878{
879 return 0;
880}
881
882static inline void sof_unregister_clients(struct snd_sof_dev *sdev)
883{
884}
885
886static inline void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf)
887{
888}
889
890static inline void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev)
891{
892}
893
894static inline int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state)
895{
896 return 0;
897}
898
899static inline int sof_resume_clients(struct snd_sof_dev *sdev)
900{
901 return 0;
902}
903#endif /* CONFIG_SND_SOC_SOF_CLIENT */
904
905/* Main ops for IPC implementations */
906extern const struct sof_ipc_ops ipc3_ops;
907extern const struct sof_ipc_ops ipc4_ops;
908
909#endif