| 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | ldflags-y += --wrap=acpi_table_parse_cedt |
| 3 | ldflags-y += --wrap=is_acpi_device_node |
| 4 | ldflags-y += --wrap=acpi_evaluate_integer |
| 5 | ldflags-y += --wrap=acpi_pci_find_root |
| 6 | ldflags-y += --wrap=nvdimm_bus_register |
| 7 | ldflags-y += --wrap=cxl_await_media_ready |
| 8 | ldflags-y += --wrap=devm_cxl_add_rch_dport |
| 9 | ldflags-y += --wrap=cxl_endpoint_parse_cdat |
| 10 | ldflags-y += --wrap=devm_cxl_endpoint_decoders_setup |
| 11 | ldflags-y += --wrap=hmat_get_extended_linear_cache_size |
| 12 | ldflags-y += --wrap=devm_cxl_add_dport_by_dev |
| 13 | ldflags-y += --wrap=devm_cxl_switch_port_decoders_setup |
| 14 | ldflags-y += --wrap=walk_hmem_resources |
| 15 | ldflags-y += --wrap=region_intersects |
| 16 | ldflags-y += --wrap=region_intersects_soft_reserve |
| 17 | |
| 18 | DRIVERS := ../../../drivers |
| 19 | DAX_HMEM_SRC := $(DRIVERS)/dax/hmem |
| 20 | CXL_SRC := $(DRIVERS)/cxl |
| 21 | CXL_CORE_SRC := $(DRIVERS)/cxl/core |
| 22 | ccflags-y := -I$(srctree)/drivers/cxl/ |
| 23 | ccflags-y += -D__mock=__weak |
| 24 | ccflags-y += -DCXL_TEST_ENABLE=1 |
| 25 | ccflags-y += -DTRACE_INCLUDE_PATH=$(CXL_CORE_SRC) -I$(srctree)/drivers/cxl/core/ |
| 26 | |
| 27 | obj-m += cxl_acpi.o |
| 28 | |
| 29 | cxl_acpi-y := $(CXL_SRC)/acpi.o |
| 30 | cxl_acpi-y += mock_acpi.o |
| 31 | cxl_acpi-y += config_check.o |
| 32 | cxl_acpi-y += cxl_acpi_test.o |
| 33 | |
| 34 | obj-m += cxl_pmem.o |
| 35 | |
| 36 | cxl_pmem-y := $(CXL_SRC)/pmem.o |
| 37 | cxl_pmem-y += $(CXL_SRC)/security.o |
| 38 | cxl_pmem-y += config_check.o |
| 39 | cxl_pmem-y += cxl_pmem_test.o |
| 40 | |
| 41 | obj-m += cxl_port.o |
| 42 | |
| 43 | cxl_port-y := $(CXL_SRC)/port.o |
| 44 | cxl_port-y += config_check.o |
| 45 | cxl_port-y += cxl_port_test.o |
| 46 | |
| 47 | |
| 48 | obj-m += cxl_mem.o |
| 49 | |
| 50 | cxl_mem-y := $(CXL_SRC)/mem.o |
| 51 | cxl_mem-y += config_check.o |
| 52 | cxl_mem-y += cxl_mem_test.o |
| 53 | |
| 54 | obj-m += cxl_core.o |
| 55 | |
| 56 | cxl_core-y := $(CXL_CORE_SRC)/port.o |
| 57 | cxl_core-y += $(CXL_CORE_SRC)/pmem.o |
| 58 | cxl_core-y += $(CXL_CORE_SRC)/regs.o |
| 59 | cxl_core-y += $(CXL_CORE_SRC)/memdev.o |
| 60 | cxl_core-y += $(CXL_CORE_SRC)/mbox.o |
| 61 | cxl_core-y += $(CXL_CORE_SRC)/pci.o |
| 62 | cxl_core-y += $(CXL_CORE_SRC)/hdm.o |
| 63 | cxl_core-y += $(CXL_CORE_SRC)/pmu.o |
| 64 | cxl_core-y += $(CXL_CORE_SRC)/cdat.o |
| 65 | cxl_core-$(CONFIG_TRACING) += $(CXL_CORE_SRC)/trace.o |
| 66 | cxl_core-$(CONFIG_CXL_REGION) += $(CXL_CORE_SRC)/region.o $(CXL_CORE_SRC)/region_pmem.o $(CXL_CORE_SRC)/region_dax.o |
| 67 | cxl_core-$(CONFIG_CXL_MCE) += $(CXL_CORE_SRC)/mce.o |
| 68 | cxl_core-$(CONFIG_CXL_FEATURES) += $(CXL_CORE_SRC)/features.o |
| 69 | cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) += $(CXL_CORE_SRC)/edac.o |
| 70 | cxl_core-$(CONFIG_CXL_RAS) += $(CXL_CORE_SRC)/ras.o |
| 71 | cxl_core-$(CONFIG_CXL_RAS) += $(CXL_CORE_SRC)/ras_rch.o |
| 72 | cxl_core-$(CONFIG_CXL_ATL) += $(CXL_CORE_SRC)/atl.o |
| 73 | cxl_core-y += config_check.o |
| 74 | cxl_core-y += cxl_core_test.o |
| 75 | cxl_core-y += cxl_core_exports.o |
| 76 | |
| 77 | obj-m += dax_hmem.o |
| 78 | dax_hmem-y := $(DAX_HMEM_SRC)/hmem.o |
| 79 | |
| 80 | KBUILD_CFLAGS := $(filter-out -Wmissing-prototypes -Wmissing-declarations, $(KBUILD_CFLAGS)) |
| 81 | |
| 82 | obj-m += test/ |