| 1 | |
| 2 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
| 3 |
|
| 4 | #include <linux/platform_device.h>
|
| 5 | #include <linux/device.h>
|
| 6 | #include <linux/module.h>
|
| 7 | #include <linux/genalloc.h>
|
| 8 | #include <linux/vmalloc.h>
|
| 9 | #include <linux/dma-mapping.h>
|
| 10 | #include <linux/list_sort.h>
|
| 11 | #include <linux/libnvdimm.h>
|
| 12 | #include <linux/ndctl.h>
|
| 13 | #include <nd-core.h>
|
| 14 | #include <linux/printk.h>
|
| 15 | #include <linux/seq_buf.h>
|
| 16 | #include <linux/papr_scm.h>
|
| 17 | #include <uapi/linux/papr_pdsm.h>
|
| 18 |
|
| 19 | #include "../watermark.h"
|
| 20 | #include "nfit_test.h"
|
| 21 | #include "ndtest.h"
|
| 22 |
|
| 23 | enum {
|
| 24 | DIMM_SIZE = SZ_32M,
|
| 25 | LABEL_SIZE = SZ_128K,
|
| 26 | NUM_INSTANCES = 2,
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| 27 | NUM_DCR = 4,
|
| 28 | NDTEST_MAX_MAPPING = 6,
|
| 29 | };
|
| 30 |
|
| 31 | #define NDTEST_SCM_DIMM_CMD_MASK \
|
| 32 | ((1ul << ND_CMD_GET_CONFIG_SIZE) | \
|
| 33 | (1ul << ND_CMD_GET_CONFIG_DATA) | \
|
| 34 | (1ul << ND_CMD_SET_CONFIG_DATA) | \
|
| 35 | (1ul << ND_CMD_CALL))
|
| 36 |
|
| 37 | #define NFIT_DIMM_HANDLE(node, socket, imc, chan, dimm) \
|
| 38 | (((node & 0xfff) << 16) | ((socket & 0xf) << 12) \
|
| 39 | | ((imc & 0xf) << 8) | ((chan & 0xf) << 4) | (dimm & 0xf))
|
| 40 |
|
| 41 | static DEFINE_SPINLOCK(ndtest_lock);
|
| 42 | static struct ndtest_priv *instances[NUM_INSTANCES];
|
| 43 |
|
| 44 | static const struct class ndtest_dimm_class = {
|
| 45 | .name = "nfit_test_dimm",
|
| 46 | };
|
| 47 |
|
| 48 | static struct gen_pool *ndtest_pool;
|
| 49 |
|
| 50 | static struct ndtest_dimm dimm_group1[] = {
|
| 51 | {
|
| 52 | .size = DIMM_SIZE,
|
| 53 | .handle = NFIT_DIMM_HANDLE(0, 0, 0, 0, 0),
|
| 54 | .uuid_str = "1e5c75d2-b618-11ea-9aa3-507b9ddc0f72",
|
| 55 | .physical_id = 0,
|
| 56 | .num_formats = 2,
|
| 57 | },
|
| 58 | {
|
| 59 | .size = DIMM_SIZE,
|
| 60 | .handle = NFIT_DIMM_HANDLE(0, 0, 0, 0, 1),
|
| 61 | .uuid_str = "1c4d43ac-b618-11ea-be80-507b9ddc0f72",
|
| 62 | .physical_id = 1,
|
| 63 | .num_formats = 2,
|
| 64 | },
|
| 65 | {
|
| 66 | .size = DIMM_SIZE,
|
| 67 | .handle = NFIT_DIMM_HANDLE(0, 0, 1, 0, 0),
|
| 68 | .uuid_str = "a9f17ffc-b618-11ea-b36d-507b9ddc0f72",
|
| 69 | .physical_id = 2,
|
| 70 | .num_formats = 2,
|
| 71 | },
|
| 72 | {
|
| 73 | .size = DIMM_SIZE,
|
| 74 | .handle = NFIT_DIMM_HANDLE(0, 0, 1, 0, 1),
|
| 75 | .uuid_str = "b6b83b22-b618-11ea-8aae-507b9ddc0f72",
|
| 76 | .physical_id = 3,
|
| 77 | .num_formats = 2,
|
| 78 | },
|
| 79 | {
|
| 80 | .size = DIMM_SIZE,
|
| 81 | .handle = NFIT_DIMM_HANDLE(0, 1, 0, 0, 0),
|
| 82 | .uuid_str = "bf9baaee-b618-11ea-b181-507b9ddc0f72",
|
| 83 | .physical_id = 4,
|
| 84 | .num_formats = 2,
|
| 85 | },
|
| 86 | };
|
| 87 |
|
| 88 | static struct ndtest_dimm dimm_group2[] = {
|
| 89 | {
|
| 90 | .size = DIMM_SIZE,
|
| 91 | .handle = NFIT_DIMM_HANDLE(1, 0, 0, 0, 0),
|
| 92 | .uuid_str = "ca0817e2-b618-11ea-9db3-507b9ddc0f72",
|
| 93 | .physical_id = 0,
|
| 94 | .num_formats = 1,
|
| 95 | .flags = PAPR_PMEM_UNARMED | PAPR_PMEM_EMPTY |
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| 96 | PAPR_PMEM_SAVE_FAILED | PAPR_PMEM_SHUTDOWN_DIRTY |
|
| 97 | PAPR_PMEM_HEALTH_FATAL,
|
| 98 | },
|
| 99 | };
|
| 100 |
|
| 101 | static struct ndtest_mapping region0_mapping[] = {
|
| 102 | {
|
| 103 | .dimm = 0,
|
| 104 | .position = 0,
|
| 105 | .start = 0,
|
| 106 | .size = SZ_16M,
|
| 107 | },
|
| 108 | {
|
| 109 | .dimm = 1,
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| 110 | .position = 1,
|
| 111 | .start = 0,
|
| 112 | .size = SZ_16M,
|
| 113 | }
|
| 114 | };
|
| 115 |
|
| 116 | static struct ndtest_mapping region1_mapping[] = {
|
| 117 | {
|
| 118 | .dimm = 0,
|
| 119 | .position = 0,
|
| 120 | .start = SZ_16M,
|
| 121 | .size = SZ_16M,
|
| 122 | },
|
| 123 | {
|
| 124 | .dimm = 1,
|
| 125 | .position = 1,
|
| 126 | .start = SZ_16M,
|
| 127 | .size = SZ_16M,
|
| 128 | },
|
| 129 | {
|
| 130 | .dimm = 2,
|
| 131 | .position = 2,
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| 132 | .start = SZ_16M,
|
| 133 | .size = SZ_16M,
|
| 134 | },
|
| 135 | {
|
| 136 | .dimm = 3,
|
| 137 | .position = 3,
|
| 138 | .start = SZ_16M,
|
| 139 | .size = SZ_16M,
|
| 140 | },
|
| 141 | };
|
| 142 |
|
| 143 | static struct ndtest_region bus0_regions[] = {
|
| 144 | {
|
| 145 | .type = ND_DEVICE_NAMESPACE_PMEM,
|
| 146 | .num_mappings = ARRAY_SIZE(region0_mapping),
|
| 147 | .mapping = region0_mapping,
|
| 148 | .size = DIMM_SIZE,
|
| 149 | .range_index = 1,
|
| 150 | },
|
| 151 | {
|
| 152 | .type = ND_DEVICE_NAMESPACE_PMEM,
|
| 153 | .num_mappings = ARRAY_SIZE(region1_mapping),
|
| 154 | .mapping = region1_mapping,
|
| 155 | .size = DIMM_SIZE * 2,
|
| 156 | .range_index = 2,
|
| 157 | },
|
| 158 | };
|
| 159 |
|
| 160 | static struct ndtest_mapping region6_mapping[] = {
|
| 161 | {
|
| 162 | .dimm = 0,
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| 163 | .position = 0,
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| 164 | .start = 0,
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| 165 | .size = DIMM_SIZE,
|
| 166 | },
|
| 167 | };
|
| 168 |
|
| 169 | static struct ndtest_region bus1_regions[] = {
|
| 170 | {
|
| 171 | .type = ND_DEVICE_NAMESPACE_IO,
|
| 172 | .num_mappings = ARRAY_SIZE(region6_mapping),
|
| 173 | .mapping = region6_mapping,
|
| 174 | .size = DIMM_SIZE,
|
| 175 | .range_index = 1,
|
| 176 | },
|
| 177 | };
|
| 178 |
|
| 179 | static struct ndtest_config bus_configs[NUM_INSTANCES] = {
|
| 180 |
|
| 181 | {
|
| 182 | .dimm_start = 0,
|
| 183 | .dimm_count = ARRAY_SIZE(dimm_group1),
|
| 184 | .dimms = dimm_group1,
|
| 185 | .regions = bus0_regions,
|
| 186 | .num_regions = ARRAY_SIZE(bus0_regions),
|
| 187 | },
|
| 188 |
|
| 189 | {
|
| 190 | .dimm_start = ARRAY_SIZE(dimm_group1),
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| 191 | .dimm_count = ARRAY_SIZE(dimm_group2),
|
| 192 | .dimms = dimm_group2,
|
| 193 | .regions = bus1_regions,
|
| 194 | .num_regions = ARRAY_SIZE(bus1_regions),
|
| 195 | },
|
| 196 | };
|
| 197 |
|
| 198 | static inline struct ndtest_priv *to_ndtest_priv(struct device *dev)
|
| 199 | {
|
| 200 | struct platform_device *pdev = to_platform_device(dev);
|
| 201 |
|
| 202 | return container_of(pdev, struct ndtest_priv, pdev);
|
| 203 | }
|
| 204 |
|
| 205 | static int ndtest_config_get(struct ndtest_dimm *p, unsigned int buf_len,
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| 206 | struct nd_cmd_get_config_data_hdr *hdr)
|
| 207 | {
|
| 208 | unsigned int len;
|
| 209 |
|
| 210 | if ((hdr->in_offset + hdr->in_length) > LABEL_SIZE)
|
| 211 | return -EINVAL;
|
| 212 |
|
| 213 | hdr->status = 0;
|
| 214 | len = min(hdr->in_length, LABEL_SIZE - hdr->in_offset);
|
| 215 | memcpy(hdr->out_buf, p->label_area + hdr->in_offset, len);
|
| 216 |
|
| 217 | return buf_len - len;
|
| 218 | }
|
| 219 |
|
| 220 | static int ndtest_config_set(struct ndtest_dimm *p, unsigned int buf_len,
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| 221 | struct nd_cmd_set_config_hdr *hdr)
|
| 222 | {
|
| 223 | unsigned int len;
|
| 224 |
|
| 225 | if ((hdr->in_offset + hdr->in_length) > LABEL_SIZE)
|
| 226 | return -EINVAL;
|
| 227 |
|
| 228 | len = min(hdr->in_length, LABEL_SIZE - hdr->in_offset);
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| 229 | memcpy(p->label_area + hdr->in_offset, hdr->in_buf, len);
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| 230 |
|
| 231 | return buf_len - len;
|
| 232 | }
|
| 233 |
|
| 234 | static int ndtest_get_config_size(struct ndtest_dimm *dimm, unsigned int buf_len,
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| 235 | struct nd_cmd_get_config_size *size)
|
| 236 | {
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| 237 | size->status = 0;
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| 238 | size->max_xfer = 8;
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| 239 | size->config_size = dimm->config_size;
|
| 240 |
|
| 241 | return 0;
|
| 242 | }
|
| 243 |
|
| 244 | static int ndtest_ctl(struct nvdimm_bus_descriptor *nd_desc,
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| 245 | struct nvdimm *nvdimm, unsigned int cmd, void *buf,
|
| 246 | unsigned int buf_len, int *cmd_rc)
|
| 247 | {
|
| 248 | struct ndtest_dimm *dimm;
|
| 249 | int _cmd_rc;
|
| 250 |
|
| 251 | if (!cmd_rc)
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| 252 | cmd_rc = &_cmd_rc;
|
| 253 |
|
| 254 | *cmd_rc = 0;
|
| 255 |
|
| 256 | if (!nvdimm)
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| 257 | return -EINVAL;
|
| 258 |
|
| 259 | dimm = nvdimm_provider_data(nvdimm);
|
| 260 | if (!dimm)
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| 261 | return -EINVAL;
|
| 262 |
|
| 263 | switch (cmd) {
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| 264 | case ND_CMD_GET_CONFIG_SIZE:
|
| 265 | *cmd_rc = ndtest_get_config_size(dimm, buf_len, buf);
|
| 266 | break;
|
| 267 | case ND_CMD_GET_CONFIG_DATA:
|
| 268 | *cmd_rc = ndtest_config_get(dimm, buf_len, buf);
|
| 269 | break;
|
| 270 | case ND_CMD_SET_CONFIG_DATA:
|
| 271 | *cmd_rc = ndtest_config_set(dimm, buf_len, buf);
|
| 272 | break;
|
| 273 | default:
|
| 274 | return -EINVAL;
|
| 275 | }
|
| 276 |
|
| 277 | |
| 278 | * fail_cmd_code, see the device attributes below
|
| 279 |
|
| 280 | if ((1 << cmd) & dimm->fail_cmd)
|
| 281 | return dimm->fail_cmd_code ? dimm->fail_cmd_code : -EIO;
|
| 282 |
|
| 283 | return 0;
|
| 284 | }
|
| 285 |
|
| 286 | static struct nfit_test_resource *ndtest_resource_lookup(resource_size_t addr)
|
| 287 | {
|
| 288 | int i;
|
| 289 |
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| 290 | for (i = 0; i < NUM_INSTANCES; i++) {
|
| 291 | struct nfit_test_resource *n, *nfit_res = NULL;
|
| 292 | struct ndtest_priv *t = instances[i];
|
| 293 |
|
| 294 | if (!t)
|
| 295 | continue;
|
| 296 | spin_lock(&ndtest_lock);
|
| 297 | list_for_each_entry(n, &t->resources, list) {
|
| 298 | if (addr >= n->res.start && (addr < n->res.start
|
| 299 | + resource_size(&n->res))) {
|
| 300 | nfit_res = n;
|
| 301 | break;
|
| 302 | } else if (addr >= (unsigned long) n->buf
|
| 303 | && (addr < (unsigned long) n->buf
|
| 304 | + resource_size(&n->res))) {
|
| 305 | nfit_res = n;
|
| 306 | break;
|
| 307 | }
|
| 308 | }
|
| 309 | spin_unlock(&ndtest_lock);
|
| 310 | if (nfit_res)
|
| 311 | return nfit_res;
|
| 312 | }
|
| 313 |
|
| 314 | pr_warn("Failed to get resource\n");
|
| 315 |
|
| 316 | return NULL;
|
| 317 | }
|
| 318 |
|
| 319 | static void ndtest_release_resource(void *data)
|
| 320 | {
|
| 321 | struct nfit_test_resource *res = data;
|
| 322 |
|
| 323 | spin_lock(&ndtest_lock);
|
| 324 | list_del(&res->list);
|
| 325 | spin_unlock(&ndtest_lock);
|
| 326 |
|
| 327 | if (resource_size(&res->res) >= DIMM_SIZE)
|
| 328 | gen_pool_free(ndtest_pool, res->res.start,
|
| 329 | resource_size(&res->res));
|
| 330 | vfree(res->buf);
|
| 331 | kfree(res);
|
| 332 | }
|
| 333 |
|
| 334 | static void *ndtest_alloc_resource(struct ndtest_priv *p, size_t size,
|
| 335 | dma_addr_t *dma)
|
| 336 | {
|
| 337 | dma_addr_t __dma;
|
| 338 | void *buf;
|
| 339 | struct nfit_test_resource *res;
|
| 340 | struct genpool_data_align data = {
|
| 341 | .align = SZ_128M,
|
| 342 | };
|
| 343 |
|
| 344 | res = kzalloc(sizeof(*res), GFP_KERNEL);
|
| 345 | if (!res)
|
| 346 | return NULL;
|
| 347 |
|
| 348 | buf = vmalloc(size);
|
| 349 | if (size >= DIMM_SIZE)
|
| 350 | __dma = gen_pool_alloc_algo(ndtest_pool, size,
|
| 351 | gen_pool_first_fit_align, &data);
|
| 352 | else
|
| 353 | __dma = (unsigned long) buf;
|
| 354 |
|
| 355 | if (!__dma)
|
| 356 | goto buf_err;
|
| 357 |
|
| 358 | INIT_LIST_HEAD(&res->list);
|
| 359 | res->dev = &p->pdev.dev;
|
| 360 | res->buf = buf;
|
| 361 | res->res.start = __dma;
|
| 362 | res->res.end = __dma + size - 1;
|
| 363 | res->res.name = "NFIT";
|
| 364 | spin_lock_init(&res->lock);
|
| 365 | INIT_LIST_HEAD(&res->requests);
|
| 366 | spin_lock(&ndtest_lock);
|
| 367 | list_add(&res->list, &p->resources);
|
| 368 | spin_unlock(&ndtest_lock);
|
| 369 |
|
| 370 | if (dma)
|
| 371 | *dma = __dma;
|
| 372 |
|
| 373 | if (!devm_add_action(&p->pdev.dev, ndtest_release_resource, res))
|
| 374 | return res->buf;
|
| 375 |
|
| 376 | buf_err:
|
| 377 | if (__dma && size >= DIMM_SIZE)
|
| 378 | gen_pool_free(ndtest_pool, __dma, size);
|
| 379 | vfree(buf);
|
| 380 | kfree(res);
|
| 381 |
|
| 382 | return NULL;
|
| 383 | }
|
| 384 |
|
| 385 | static ssize_t range_index_show(struct device *dev,
|
| 386 | struct device_attribute *attr, char *buf)
|
| 387 | {
|
| 388 | struct nd_region *nd_region = to_nd_region(dev);
|
| 389 | struct ndtest_region *region = nd_region_provider_data(nd_region);
|
| 390 |
|
| 391 | return sprintf(buf, "%d\n", region->range_index);
|
| 392 | }
|
| 393 | static DEVICE_ATTR_RO(range_index);
|
| 394 |
|
| 395 | static struct attribute *ndtest_region_attributes[] = {
|
| 396 | &dev_attr_range_index.attr,
|
| 397 | NULL,
|
| 398 | };
|
| 399 |
|
| 400 | static const struct attribute_group ndtest_region_attribute_group = {
|
| 401 | .name = "papr",
|
| 402 | .attrs = ndtest_region_attributes,
|
| 403 | };
|
| 404 |
|
| 405 | static const struct attribute_group *ndtest_region_attribute_groups[] = {
|
| 406 | &ndtest_region_attribute_group,
|
| 407 | NULL,
|
| 408 | };
|
| 409 |
|
| 410 | static int ndtest_create_region(struct ndtest_priv *p,
|
| 411 | struct ndtest_region *region)
|
| 412 | {
|
| 413 | struct nd_mapping_desc mappings[NDTEST_MAX_MAPPING];
|
| 414 | struct nd_region_desc *ndr_desc, _ndr_desc;
|
| 415 | struct nd_interleave_set *nd_set;
|
| 416 | struct resource res;
|
| 417 | int i, ndimm = region->mapping[0].dimm;
|
| 418 | u64 uuid[2];
|
| 419 |
|
| 420 | memset(&res, 0, sizeof(res));
|
| 421 | memset(&mappings, 0, sizeof(mappings));
|
| 422 | memset(&_ndr_desc, 0, sizeof(_ndr_desc));
|
| 423 | ndr_desc = &_ndr_desc;
|
| 424 |
|
| 425 | if (!ndtest_alloc_resource(p, region->size, &res.start))
|
| 426 | return -ENOMEM;
|
| 427 |
|
| 428 | res.end = res.start + region->size - 1;
|
| 429 | ndr_desc->mapping = mappings;
|
| 430 | ndr_desc->res = &res;
|
| 431 | ndr_desc->provider_data = region;
|
| 432 | ndr_desc->attr_groups = ndtest_region_attribute_groups;
|
| 433 |
|
| 434 | if (uuid_parse(p->config->dimms[ndimm].uuid_str, (uuid_t *)uuid)) {
|
| 435 | pr_err("failed to parse UUID\n");
|
| 436 | return -ENXIO;
|
| 437 | }
|
| 438 |
|
| 439 | nd_set = devm_kzalloc(&p->pdev.dev, sizeof(*nd_set), GFP_KERNEL);
|
| 440 | if (!nd_set)
|
| 441 | return -ENOMEM;
|
| 442 |
|
| 443 | nd_set->cookie1 = cpu_to_le64(uuid[0]);
|
| 444 | nd_set->cookie2 = cpu_to_le64(uuid[1]);
|
| 445 | nd_set->altcookie = nd_set->cookie1;
|
| 446 | ndr_desc->nd_set = nd_set;
|
| 447 |
|
| 448 | for (i = 0; i < region->num_mappings; i++) {
|
| 449 | ndimm = region->mapping[i].dimm;
|
| 450 | mappings[i].start = region->mapping[i].start;
|
| 451 | mappings[i].size = region->mapping[i].size;
|
| 452 | mappings[i].position = region->mapping[i].position;
|
| 453 | mappings[i].nvdimm = p->config->dimms[ndimm].nvdimm;
|
| 454 | }
|
| 455 |
|
| 456 | ndr_desc->num_mappings = region->num_mappings;
|
| 457 | region->region = nvdimm_pmem_region_create(p->bus, ndr_desc);
|
| 458 |
|
| 459 | if (!region->region) {
|
| 460 | dev_err(&p->pdev.dev, "Error registering region %pR\n",
|
| 461 | ndr_desc->res);
|
| 462 | return -ENXIO;
|
| 463 | }
|
| 464 |
|
| 465 | return 0;
|
| 466 | }
|
| 467 |
|
| 468 | static int ndtest_init_regions(struct ndtest_priv *p)
|
| 469 | {
|
| 470 | int i, ret = 0;
|
| 471 |
|
| 472 | for (i = 0; i < p->config->num_regions; i++) {
|
| 473 | ret = ndtest_create_region(p, &p->config->regions[i]);
|
| 474 | if (ret)
|
| 475 | return ret;
|
| 476 | }
|
| 477 |
|
| 478 | return 0;
|
| 479 | }
|
| 480 |
|
| 481 | static void put_dimms(void *data)
|
| 482 | {
|
| 483 | struct ndtest_priv *p = data;
|
| 484 | int i;
|
| 485 |
|
| 486 | for (i = 0; i < p->config->dimm_count; i++)
|
| 487 | if (p->config->dimms[i].dev) {
|
| 488 | device_unregister(p->config->dimms[i].dev);
|
| 489 | p->config->dimms[i].dev = NULL;
|
| 490 | }
|
| 491 | }
|
| 492 |
|
| 493 | static ssize_t handle_show(struct device *dev, struct device_attribute *attr,
|
| 494 | char *buf)
|
| 495 | {
|
| 496 | struct ndtest_dimm *dimm = dev_get_drvdata(dev);
|
| 497 |
|
| 498 | return sprintf(buf, "%#x\n", dimm->handle);
|
| 499 | }
|
| 500 | static DEVICE_ATTR_RO(handle);
|
| 501 |
|
| 502 | static ssize_t fail_cmd_show(struct device *dev, struct device_attribute *attr,
|
| 503 | char *buf)
|
| 504 | {
|
| 505 | struct ndtest_dimm *dimm = dev_get_drvdata(dev);
|
| 506 |
|
| 507 | return sprintf(buf, "%#x\n", dimm->fail_cmd);
|
| 508 | }
|
| 509 |
|
| 510 | static ssize_t fail_cmd_store(struct device *dev, struct device_attribute *attr,
|
| 511 | const char *buf, size_t size)
|
| 512 | {
|
| 513 | struct ndtest_dimm *dimm = dev_get_drvdata(dev);
|
| 514 | unsigned long val;
|
| 515 | ssize_t rc;
|
| 516 |
|
| 517 | rc = kstrtol(buf, 0, &val);
|
| 518 | if (rc)
|
| 519 | return rc;
|
| 520 |
|
| 521 | dimm->fail_cmd = val;
|
| 522 |
|
| 523 | return size;
|
| 524 | }
|
| 525 | static DEVICE_ATTR_RW(fail_cmd);
|
| 526 |
|
| 527 | static ssize_t fail_cmd_code_show(struct device *dev, struct device_attribute *attr,
|
| 528 | char *buf)
|
| 529 | {
|
| 530 | struct ndtest_dimm *dimm = dev_get_drvdata(dev);
|
| 531 |
|
| 532 | return sprintf(buf, "%d\n", dimm->fail_cmd_code);
|
| 533 | }
|
| 534 |
|
| 535 | static ssize_t fail_cmd_code_store(struct device *dev, struct device_attribute *attr,
|
| 536 | const char *buf, size_t size)
|
| 537 | {
|
| 538 | struct ndtest_dimm *dimm = dev_get_drvdata(dev);
|
| 539 | unsigned long val;
|
| 540 | ssize_t rc;
|
| 541 |
|
| 542 | rc = kstrtol(buf, 0, &val);
|
| 543 | if (rc)
|
| 544 | return rc;
|
| 545 |
|
| 546 | dimm->fail_cmd_code = val;
|
| 547 | return size;
|
| 548 | }
|
| 549 | static DEVICE_ATTR_RW(fail_cmd_code);
|
| 550 |
|
| 551 | static struct attribute *dimm_attributes[] = {
|
| 552 | &dev_attr_handle.attr,
|
| 553 | &dev_attr_fail_cmd.attr,
|
| 554 | &dev_attr_fail_cmd_code.attr,
|
| 555 | NULL,
|
| 556 | };
|
| 557 |
|
| 558 | static struct attribute_group dimm_attribute_group = {
|
| 559 | .attrs = dimm_attributes,
|
| 560 | };
|
| 561 |
|
| 562 | static const struct attribute_group *dimm_attribute_groups[] = {
|
| 563 | &dimm_attribute_group,
|
| 564 | NULL,
|
| 565 | };
|
| 566 |
|
| 567 | static ssize_t phys_id_show(struct device *dev,
|
| 568 | struct device_attribute *attr, char *buf)
|
| 569 | {
|
| 570 | struct nvdimm *nvdimm = to_nvdimm(dev);
|
| 571 | struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
|
| 572 |
|
| 573 | return sprintf(buf, "%#x\n", dimm->physical_id);
|
| 574 | }
|
| 575 | static DEVICE_ATTR_RO(phys_id);
|
| 576 |
|
| 577 | static ssize_t vendor_show(struct device *dev,
|
| 578 | struct device_attribute *attr, char *buf)
|
| 579 | {
|
| 580 | return sprintf(buf, "0x1234567\n");
|
| 581 | }
|
| 582 | static DEVICE_ATTR_RO(vendor);
|
| 583 |
|
| 584 | static ssize_t id_show(struct device *dev,
|
| 585 | struct device_attribute *attr, char *buf)
|
| 586 | {
|
| 587 | struct nvdimm *nvdimm = to_nvdimm(dev);
|
| 588 | struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
|
| 589 |
|
| 590 | return sprintf(buf, "%04x-%02x-%04x-%08x", 0xabcd,
|
| 591 | 0xa, 2016, ~(dimm->handle));
|
| 592 | }
|
| 593 | static DEVICE_ATTR_RO(id);
|
| 594 |
|
| 595 | static ssize_t nvdimm_handle_show(struct device *dev,
|
| 596 | struct device_attribute *attr, char *buf)
|
| 597 | {
|
| 598 | struct nvdimm *nvdimm = to_nvdimm(dev);
|
| 599 | struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
|
| 600 |
|
| 601 | return sprintf(buf, "%#x\n", dimm->handle);
|
| 602 | }
|
| 603 |
|
| 604 | static struct device_attribute dev_attr_nvdimm_show_handle = {
|
| 605 | .attr = { .name = "handle", .mode = 0444 },
|
| 606 | .show = nvdimm_handle_show,
|
| 607 | };
|
| 608 |
|
| 609 | static ssize_t subsystem_vendor_show(struct device *dev,
|
| 610 | struct device_attribute *attr, char *buf)
|
| 611 | {
|
| 612 | return sprintf(buf, "0x%04x\n", 0);
|
| 613 | }
|
| 614 | static DEVICE_ATTR_RO(subsystem_vendor);
|
| 615 |
|
| 616 | static ssize_t dirty_shutdown_show(struct device *dev,
|
| 617 | struct device_attribute *attr, char *buf)
|
| 618 | {
|
| 619 | return sprintf(buf, "%d\n", 42);
|
| 620 | }
|
| 621 | static DEVICE_ATTR_RO(dirty_shutdown);
|
| 622 |
|
| 623 | static ssize_t formats_show(struct device *dev,
|
| 624 | struct device_attribute *attr, char *buf)
|
| 625 | {
|
| 626 | struct nvdimm *nvdimm = to_nvdimm(dev);
|
| 627 | struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
|
| 628 |
|
| 629 | return sprintf(buf, "%d\n", dimm->num_formats);
|
| 630 | }
|
| 631 | static DEVICE_ATTR_RO(formats);
|
| 632 |
|
| 633 | static ssize_t format_show(struct device *dev,
|
| 634 | struct device_attribute *attr, char *buf)
|
| 635 | {
|
| 636 | struct nvdimm *nvdimm = to_nvdimm(dev);
|
| 637 | struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
|
| 638 |
|
| 639 | if (dimm->num_formats > 1)
|
| 640 | return sprintf(buf, "0x201\n");
|
| 641 |
|
| 642 | return sprintf(buf, "0x101\n");
|
| 643 | }
|
| 644 | static DEVICE_ATTR_RO(format);
|
| 645 |
|
| 646 | static ssize_t format1_show(struct device *dev, struct device_attribute *attr,
|
| 647 | char *buf)
|
| 648 | {
|
| 649 | return sprintf(buf, "0x301\n");
|
| 650 | }
|
| 651 | static DEVICE_ATTR_RO(format1);
|
| 652 |
|
| 653 | static umode_t ndtest_nvdimm_attr_visible(struct kobject *kobj,
|
| 654 | struct attribute *a, int n)
|
| 655 | {
|
| 656 | struct device *dev = container_of(kobj, struct device, kobj);
|
| 657 | struct nvdimm *nvdimm = to_nvdimm(dev);
|
| 658 | struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
|
| 659 |
|
| 660 | if (a == &dev_attr_format1.attr && dimm->num_formats <= 1)
|
| 661 | return 0;
|
| 662 |
|
| 663 | return a->mode;
|
| 664 | }
|
| 665 |
|
| 666 | static ssize_t flags_show(struct device *dev,
|
| 667 | struct device_attribute *attr, char *buf)
|
| 668 | {
|
| 669 | struct nvdimm *nvdimm = to_nvdimm(dev);
|
| 670 | struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
|
| 671 | struct seq_buf s;
|
| 672 | u64 flags;
|
| 673 |
|
| 674 | flags = dimm->flags;
|
| 675 |
|
| 676 | seq_buf_init(&s, buf, PAGE_SIZE);
|
| 677 | if (flags & PAPR_PMEM_UNARMED_MASK)
|
| 678 | seq_buf_printf(&s, "not_armed ");
|
| 679 |
|
| 680 | if (flags & PAPR_PMEM_BAD_SHUTDOWN_MASK)
|
| 681 | seq_buf_printf(&s, "flush_fail ");
|
| 682 |
|
| 683 | if (flags & PAPR_PMEM_BAD_RESTORE_MASK)
|
| 684 | seq_buf_printf(&s, "restore_fail ");
|
| 685 |
|
| 686 | if (flags & PAPR_PMEM_SAVE_MASK)
|
| 687 | seq_buf_printf(&s, "save_fail ");
|
| 688 |
|
| 689 | if (flags & PAPR_PMEM_SMART_EVENT_MASK)
|
| 690 | seq_buf_printf(&s, "smart_notify ");
|
| 691 |
|
| 692 |
|
| 693 | if (seq_buf_used(&s))
|
| 694 | seq_buf_printf(&s, "\n");
|
| 695 |
|
| 696 | return seq_buf_used(&s);
|
| 697 | }
|
| 698 | static DEVICE_ATTR_RO(flags);
|
| 699 |
|
| 700 | static struct attribute *ndtest_nvdimm_attributes[] = {
|
| 701 | &dev_attr_nvdimm_show_handle.attr,
|
| 702 | &dev_attr_vendor.attr,
|
| 703 | &dev_attr_id.attr,
|
| 704 | &dev_attr_phys_id.attr,
|
| 705 | &dev_attr_subsystem_vendor.attr,
|
| 706 | &dev_attr_dirty_shutdown.attr,
|
| 707 | &dev_attr_formats.attr,
|
| 708 | &dev_attr_format.attr,
|
| 709 | &dev_attr_format1.attr,
|
| 710 | &dev_attr_flags.attr,
|
| 711 | NULL,
|
| 712 | };
|
| 713 |
|
| 714 | static const struct attribute_group ndtest_nvdimm_attribute_group = {
|
| 715 | .name = "papr",
|
| 716 | .attrs = ndtest_nvdimm_attributes,
|
| 717 | .is_visible = ndtest_nvdimm_attr_visible,
|
| 718 | };
|
| 719 |
|
| 720 | static const struct attribute_group *ndtest_nvdimm_attribute_groups[] = {
|
| 721 | &ndtest_nvdimm_attribute_group,
|
| 722 | NULL,
|
| 723 | };
|
| 724 |
|
| 725 | static int ndtest_dimm_register(struct ndtest_priv *priv,
|
| 726 | struct ndtest_dimm *dimm, int id)
|
| 727 | {
|
| 728 | struct device *dev = &priv->pdev.dev;
|
| 729 | unsigned long dimm_flags = dimm->flags;
|
| 730 |
|
| 731 | if (dimm->num_formats > 1)
|
| 732 | set_bit(NDD_LABELING, &dimm_flags);
|
| 733 |
|
| 734 | if (dimm->flags & PAPR_PMEM_UNARMED_MASK)
|
| 735 | set_bit(NDD_UNARMED, &dimm_flags);
|
| 736 |
|
| 737 | dimm->nvdimm = nvdimm_create(priv->bus, dimm,
|
| 738 | ndtest_nvdimm_attribute_groups, dimm_flags,
|
| 739 | NDTEST_SCM_DIMM_CMD_MASK, 0, NULL);
|
| 740 | if (!dimm->nvdimm) {
|
| 741 | dev_err(dev, "Error creating DIMM object for %pOF\n", priv->dn);
|
| 742 | return -ENXIO;
|
| 743 | }
|
| 744 |
|
| 745 | dimm->dev = device_create_with_groups(&ndtest_dimm_class,
|
| 746 | &priv->pdev.dev,
|
| 747 | 0, dimm, dimm_attribute_groups,
|
| 748 | "test_dimm%d", id);
|
| 749 | if (!dimm->dev) {
|
| 750 | pr_err("Could not create dimm device attributes\n");
|
| 751 | return -ENOMEM;
|
| 752 | }
|
| 753 |
|
| 754 | return 0;
|
| 755 | }
|
| 756 |
|
| 757 | static int ndtest_nvdimm_init(struct ndtest_priv *p)
|
| 758 | {
|
| 759 | struct ndtest_dimm *d;
|
| 760 | void *res;
|
| 761 | int i, id;
|
| 762 |
|
| 763 | for (i = 0; i < p->config->dimm_count; i++) {
|
| 764 | d = &p->config->dimms[i];
|
| 765 | d->id = id = p->config->dimm_start + i;
|
| 766 | res = ndtest_alloc_resource(p, LABEL_SIZE, NULL);
|
| 767 | if (!res)
|
| 768 | return -ENOMEM;
|
| 769 |
|
| 770 | d->label_area = res;
|
| 771 | sprintf(d->label_area, "label%d", id);
|
| 772 | d->config_size = LABEL_SIZE;
|
| 773 |
|
| 774 | if (!ndtest_alloc_resource(p, d->size,
|
| 775 | &p->dimm_dma[id]))
|
| 776 | return -ENOMEM;
|
| 777 |
|
| 778 | if (!ndtest_alloc_resource(p, LABEL_SIZE,
|
| 779 | &p->label_dma[id]))
|
| 780 | return -ENOMEM;
|
| 781 |
|
| 782 | if (!ndtest_alloc_resource(p, LABEL_SIZE,
|
| 783 | &p->dcr_dma[id]))
|
| 784 | return -ENOMEM;
|
| 785 |
|
| 786 | d->address = p->dimm_dma[id];
|
| 787 |
|
| 788 | ndtest_dimm_register(p, d, id);
|
| 789 | }
|
| 790 |
|
| 791 | return 0;
|
| 792 | }
|
| 793 |
|
| 794 | static ssize_t compatible_show(struct device *dev,
|
| 795 | struct device_attribute *attr, char *buf)
|
| 796 | {
|
| 797 | return sprintf(buf, "nvdimm_test");
|
| 798 | }
|
| 799 | static DEVICE_ATTR_RO(compatible);
|
| 800 |
|
| 801 | static struct attribute *of_node_attributes[] = {
|
| 802 | &dev_attr_compatible.attr,
|
| 803 | NULL
|
| 804 | };
|
| 805 |
|
| 806 | static const struct attribute_group of_node_attribute_group = {
|
| 807 | .name = "of_node",
|
| 808 | .attrs = of_node_attributes,
|
| 809 | };
|
| 810 |
|
| 811 | static const struct attribute_group *ndtest_attribute_groups[] = {
|
| 812 | &of_node_attribute_group,
|
| 813 | NULL,
|
| 814 | };
|
| 815 |
|
| 816 | static int ndtest_bus_register(struct ndtest_priv *p)
|
| 817 | {
|
| 818 | p->config = &bus_configs[p->pdev.id];
|
| 819 |
|
| 820 | p->bus_desc.ndctl = ndtest_ctl;
|
| 821 | p->bus_desc.module = THIS_MODULE;
|
| 822 | p->bus_desc.provider_name = NULL;
|
| 823 | p->bus_desc.attr_groups = ndtest_attribute_groups;
|
| 824 |
|
| 825 | p->bus = nvdimm_bus_register(&p->pdev.dev, &p->bus_desc);
|
| 826 | if (!p->bus) {
|
| 827 | dev_err(&p->pdev.dev, "Error creating nvdimm bus %pOF\n", p->dn);
|
| 828 | return -ENOMEM;
|
| 829 | }
|
| 830 |
|
| 831 | return 0;
|
| 832 | }
|
| 833 |
|
| 834 | static void ndtest_remove(struct platform_device *pdev)
|
| 835 | {
|
| 836 | struct ndtest_priv *p = to_ndtest_priv(&pdev->dev);
|
| 837 |
|
| 838 | nvdimm_bus_unregister(p->bus);
|
| 839 | }
|
| 840 |
|
| 841 | static int ndtest_probe(struct platform_device *pdev)
|
| 842 | {
|
| 843 | struct ndtest_priv *p;
|
| 844 | int rc;
|
| 845 |
|
| 846 | p = to_ndtest_priv(&pdev->dev);
|
| 847 | if (ndtest_bus_register(p))
|
| 848 | return -ENOMEM;
|
| 849 |
|
| 850 | p->dcr_dma = devm_kcalloc(&p->pdev.dev, NUM_DCR,
|
| 851 | sizeof(dma_addr_t), GFP_KERNEL);
|
| 852 | if (!p->dcr_dma) {
|
| 853 | rc = -ENOMEM;
|
| 854 | goto err;
|
| 855 | }
|
| 856 | p->label_dma = devm_kcalloc(&p->pdev.dev, NUM_DCR,
|
| 857 | sizeof(dma_addr_t), GFP_KERNEL);
|
| 858 | if (!p->label_dma) {
|
| 859 | rc = -ENOMEM;
|
| 860 | goto err;
|
| 861 | }
|
| 862 | p->dimm_dma = devm_kcalloc(&p->pdev.dev, NUM_DCR,
|
| 863 | sizeof(dma_addr_t), GFP_KERNEL);
|
| 864 | if (!p->dimm_dma) {
|
| 865 | rc = -ENOMEM;
|
| 866 | goto err;
|
| 867 | }
|
| 868 | rc = ndtest_nvdimm_init(p);
|
| 869 | if (rc)
|
| 870 | goto err;
|
| 871 |
|
| 872 | rc = ndtest_init_regions(p);
|
| 873 | if (rc)
|
| 874 | goto err;
|
| 875 |
|
| 876 | rc = devm_add_action_or_reset(&pdev->dev, put_dimms, p);
|
| 877 | if (rc)
|
| 878 | goto err;
|
| 879 |
|
| 880 | platform_set_drvdata(pdev, p);
|
| 881 |
|
| 882 | return 0;
|
| 883 |
|
| 884 | err:
|
| 885 | pr_err("%s:%d Failed nvdimm init\n", __func__, __LINE__);
|
| 886 | return rc;
|
| 887 | }
|
| 888 |
|
| 889 | static const struct platform_device_id ndtest_id[] = {
|
| 890 | { KBUILD_MODNAME },
|
| 891 | { },
|
| 892 | };
|
| 893 |
|
| 894 | static struct platform_driver ndtest_driver = {
|
| 895 | .probe = ndtest_probe,
|
| 896 | .remove = ndtest_remove,
|
| 897 | .driver = {
|
| 898 | .name = KBUILD_MODNAME,
|
| 899 | },
|
| 900 | .id_table = ndtest_id,
|
| 901 | };
|
| 902 |
|
| 903 | static void ndtest_release(struct device *dev)
|
| 904 | {
|
| 905 | struct ndtest_priv *p = to_ndtest_priv(dev);
|
| 906 |
|
| 907 | kfree(p);
|
| 908 | }
|
| 909 |
|
| 910 | static void cleanup_devices(void)
|
| 911 | {
|
| 912 | int i;
|
| 913 |
|
| 914 | for (i = 0; i < NUM_INSTANCES; i++)
|
| 915 | if (instances[i])
|
| 916 | platform_device_unregister(&instances[i]->pdev);
|
| 917 |
|
| 918 | nfit_test_teardown();
|
| 919 |
|
| 920 | if (ndtest_pool)
|
| 921 | gen_pool_destroy(ndtest_pool);
|
| 922 |
|
| 923 |
|
| 924 | class_unregister(&ndtest_dimm_class);
|
| 925 | }
|
| 926 |
|
| 927 | static __init int ndtest_init(void)
|
| 928 | {
|
| 929 | int rc, i;
|
| 930 |
|
| 931 | pmem_test();
|
| 932 | libnvdimm_test();
|
| 933 | device_dax_test();
|
| 934 | dax_pmem_test();
|
| 935 |
|
| 936 | nfit_test_setup(ndtest_resource_lookup, NULL);
|
| 937 |
|
| 938 | rc = class_register(&ndtest_dimm_class);
|
| 939 | if (rc)
|
| 940 | goto err_register;
|
| 941 |
|
| 942 | ndtest_pool = gen_pool_create(ilog2(SZ_4M), NUMA_NO_NODE);
|
| 943 | if (!ndtest_pool) {
|
| 944 | rc = -ENOMEM;
|
| 945 | goto err_register;
|
| 946 | }
|
| 947 |
|
| 948 | if (gen_pool_add(ndtest_pool, SZ_4G, SZ_4G, NUMA_NO_NODE)) {
|
| 949 | rc = -ENOMEM;
|
| 950 | goto err_register;
|
| 951 | }
|
| 952 |
|
| 953 |
|
| 954 | for (i = 0; i < NUM_INSTANCES; i++) {
|
| 955 | struct ndtest_priv *priv;
|
| 956 | struct platform_device *pdev;
|
| 957 |
|
| 958 | priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
| 959 | if (!priv) {
|
| 960 | rc = -ENOMEM;
|
| 961 | goto err_register;
|
| 962 | }
|
| 963 |
|
| 964 | INIT_LIST_HEAD(&priv->resources);
|
| 965 | pdev = &priv->pdev;
|
| 966 | pdev->name = KBUILD_MODNAME;
|
| 967 | pdev->id = i;
|
| 968 | pdev->dev.release = ndtest_release;
|
| 969 | rc = platform_device_register(pdev);
|
| 970 | if (rc) {
|
| 971 | put_device(&pdev->dev);
|
| 972 | goto err_register;
|
| 973 | }
|
| 974 | get_device(&pdev->dev);
|
| 975 |
|
| 976 | instances[i] = priv;
|
| 977 | }
|
| 978 |
|
| 979 | rc = platform_driver_register(&ndtest_driver);
|
| 980 | if (rc)
|
| 981 | goto err_register;
|
| 982 |
|
| 983 | return 0;
|
| 984 |
|
| 985 | err_register:
|
| 986 | pr_err("Error registering platform device\n");
|
| 987 | cleanup_devices();
|
| 988 |
|
| 989 | return rc;
|
| 990 | }
|
| 991 |
|
| 992 | static __exit void ndtest_exit(void)
|
| 993 | {
|
| 994 | cleanup_devices();
|
| 995 | platform_driver_unregister(&ndtest_driver);
|
| 996 | }
|
| 997 |
|
| 998 | module_init(ndtest_init);
|
| 999 | module_exit(ndtest_exit);
|
| 1000 | MODULE_DESCRIPTION("Test non-NFIT devices");
|
| 1001 | MODULE_LICENSE("GPL");
|
| 1002 | MODULE_AUTHOR("IBM Corporation");
|