| 1 | |
| 2 | * This file is subject to the terms and conditions of the GNU General Public
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| 3 | * License. See the file "COPYING" in the main directory of this archive
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| 4 | * for more details.
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| 5 | *
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| 6 | * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
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| 7 | * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
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| 8 | * Copyright (C) 1999 Silicon Graphics, Inc.
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| 9 |
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| 10 | #ifndef _ASM_STACKFRAME_H
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| 11 | #define _ASM_STACKFRAME_H
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| 12 |
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| 13 | #include <linux/config.h>
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| 14 | #include <linux/threads.h>
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| 15 |
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| 16 | #include <asm/asm.h>
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| 17 | #include <asm/mipsregs.h>
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| 18 | #include <asm/offset.h>
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| 19 |
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| 20 | .macro SAVE_AT
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| 21 | .set push
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| 22 | .set noat
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| 23 | LONG_S $1, PT_R1(sp)
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| 24 | .set pop
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| 25 | .endm
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| 26 |
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| 27 | .macro SAVE_TEMP
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| 28 | mfhi v1
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| 29 | #ifdef CONFIG_MIPS32
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| 30 | LONG_S $8, PT_R8(sp)
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| 31 | LONG_S $9, PT_R9(sp)
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| 32 | #endif
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| 33 | LONG_S v1, PT_HI(sp)
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| 34 | mflo v1
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| 35 | LONG_S $10, PT_R10(sp)
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| 36 | LONG_S $11, PT_R11(sp)
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| 37 | LONG_S v1, PT_LO(sp)
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| 38 | LONG_S $12, PT_R12(sp)
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| 39 | LONG_S $13, PT_R13(sp)
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| 40 | LONG_S $14, PT_R14(sp)
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| 41 | LONG_S $15, PT_R15(sp)
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| 42 | LONG_S $24, PT_R24(sp)
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| 43 | .endm
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| 44 |
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| 45 | .macro SAVE_STATIC
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| 46 | LONG_S $16, PT_R16(sp)
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| 47 | LONG_S $17, PT_R17(sp)
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| 48 | LONG_S $18, PT_R18(sp)
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| 49 | LONG_S $19, PT_R19(sp)
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| 50 | LONG_S $20, PT_R20(sp)
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| 51 | LONG_S $21, PT_R21(sp)
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| 52 | LONG_S $22, PT_R22(sp)
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| 53 | LONG_S $23, PT_R23(sp)
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| 54 | LONG_S $30, PT_R30(sp)
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| 55 | .endm
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| 56 |
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| 57 | #ifdef CONFIG_SMP
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| 58 | .macro get_saved_sp
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| 59 | #ifdef CONFIG_MIPS32
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| 60 | mfc0 k0, CP0_CONTEXT
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| 61 | lui k1, %hi(kernelsp)
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| 62 | srl k0, k0, 23
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| 63 | sll k0, k0, 2
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| 64 | addu k1, k0
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| 65 | LONG_L k1, %lo(kernelsp)(k1)
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| 66 | #endif
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| 67 | #if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
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| 68 | MFC0 k1, CP0_CONTEXT
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| 69 | dsra k1, 23
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| 70 | lui k0, %hi(pgd_current)
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| 71 | addiu k0, %lo(pgd_current)
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| 72 | dsubu k1, k0
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| 73 | lui k0, %hi(kernelsp)
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| 74 | daddu k1, k0
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| 75 | LONG_L k1, %lo(kernelsp)(k1)
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| 76 | #endif
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| 77 | #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
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| 78 | MFC0 k1, CP0_CONTEXT
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| 79 | dsrl k1, 23
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| 80 | dsll k1, k1, 3
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| 81 | LONG_L k1, kernelsp(k1)
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| 82 | #endif
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| 83 | .endm
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| 84 |
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| 85 | .macro set_saved_sp stackp temp temp2
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| 86 | #ifdef CONFIG_MIPS32
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| 87 | mfc0 \temp, CP0_CONTEXT
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| 88 | srl \temp, 23
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| 89 | sll \temp, 2
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| 90 | LONG_S \stackp, kernelsp(\temp)
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| 91 | #endif
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| 92 | #if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
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| 93 | lw \temp, TI_CPU(gp)
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| 94 | dsll \temp, 3
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| 95 | lui \temp2, %hi(kernelsp)
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| 96 | daddu \temp, \temp2
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| 97 | LONG_S \stackp, %lo(kernelsp)(\temp)
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| 98 | #endif
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| 99 | #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
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| 100 | lw \temp, TI_CPU(gp)
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| 101 | dsll \temp, 3
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| 102 | LONG_S \stackp, kernelsp(\temp)
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| 103 | #endif
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| 104 | .endm
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| 105 | #else
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| 106 | .macro get_saved_sp
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| 107 | lui k1, %hi(kernelsp)
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| 108 | LONG_L k1, %lo(kernelsp)(k1)
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| 109 | .endm
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| 110 |
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| 111 | .macro set_saved_sp stackp temp temp2
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| 112 | LONG_S \stackp, kernelsp
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| 113 | .endm
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| 114 | #endif
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| 115 |
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| 116 | .macro SAVE_SOME
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| 117 | .set push
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| 118 | .set noat
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| 119 | .set reorder
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| 120 | mfc0 k0, CP0_STATUS
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| 121 | sll k0, 3
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| 122 | .set noreorder
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| 123 | bltz k0, 8f
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| 124 | move k1, sp
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| 125 | .set reorder
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| 126 |
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| 127 | get_saved_sp
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| 128 | 8: move k0, sp
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| 129 | PTR_SUBU sp, k1, PT_SIZE
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| 130 | LONG_S k0, PT_R29(sp)
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| 131 | LONG_S $3, PT_R3(sp)
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| 132 | LONG_S $0, PT_R0(sp)
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| 133 | mfc0 v1, CP0_STATUS
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| 134 | LONG_S $2, PT_R2(sp)
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| 135 | LONG_S v1, PT_STATUS(sp)
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| 136 | LONG_S $4, PT_R4(sp)
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| 137 | mfc0 v1, CP0_CAUSE
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| 138 | LONG_S $5, PT_R5(sp)
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| 139 | LONG_S v1, PT_CAUSE(sp)
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| 140 | LONG_S $6, PT_R6(sp)
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| 141 | MFC0 v1, CP0_EPC
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| 142 | LONG_S $7, PT_R7(sp)
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| 143 | #ifdef CONFIG_MIPS64
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| 144 | LONG_S $8, PT_R8(sp)
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| 145 | LONG_S $9, PT_R9(sp)
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| 146 | #endif
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| 147 | LONG_S v1, PT_EPC(sp)
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| 148 | LONG_S $25, PT_R25(sp)
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| 149 | LONG_S $28, PT_R28(sp)
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| 150 | LONG_S $31, PT_R31(sp)
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| 151 | ori $28, sp, _THREAD_MASK
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| 152 | xori $28, _THREAD_MASK
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| 153 | .set pop
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| 154 | .endm
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| 155 |
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| 156 | .macro SAVE_ALL
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| 157 | SAVE_SOME
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| 158 | SAVE_AT
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| 159 | SAVE_TEMP
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| 160 | SAVE_STATIC
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| 161 | .endm
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| 162 |
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| 163 | .macro RESTORE_AT
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| 164 | .set push
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| 165 | .set noat
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| 166 | LONG_L $1, PT_R1(sp)
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| 167 | .set pop
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| 168 | .endm
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| 169 |
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| 170 | .macro RESTORE_TEMP
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| 171 | LONG_L $24, PT_LO(sp)
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| 172 | #ifdef CONFIG_MIPS32
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| 173 | LONG_L $8, PT_R8(sp)
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| 174 | LONG_L $9, PT_R9(sp)
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| 175 | #endif
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| 176 | mtlo $24
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| 177 | LONG_L $24, PT_HI(sp)
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| 178 | LONG_L $10, PT_R10(sp)
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| 179 | LONG_L $11, PT_R11(sp)
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| 180 | mthi $24
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| 181 | LONG_L $12, PT_R12(sp)
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| 182 | LONG_L $13, PT_R13(sp)
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| 183 | LONG_L $14, PT_R14(sp)
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| 184 | LONG_L $15, PT_R15(sp)
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| 185 | LONG_L $24, PT_R24(sp)
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| 186 | .endm
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| 187 |
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| 188 | .macro RESTORE_STATIC
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| 189 | LONG_L $16, PT_R16(sp)
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| 190 | LONG_L $17, PT_R17(sp)
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| 191 | LONG_L $18, PT_R18(sp)
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| 192 | LONG_L $19, PT_R19(sp)
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| 193 | LONG_L $20, PT_R20(sp)
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| 194 | LONG_L $21, PT_R21(sp)
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| 195 | LONG_L $22, PT_R22(sp)
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| 196 | LONG_L $23, PT_R23(sp)
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| 197 | LONG_L $30, PT_R30(sp)
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| 198 | .endm
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| 199 |
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| 200 | #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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| 201 |
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| 202 | .macro RESTORE_SOME
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| 203 | .set push
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| 204 | .set reorder
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| 205 | .set noat
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| 206 | mfc0 a0, CP0_STATUS
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| 207 | ori a0, 0x1f
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| 208 | xori a0, 0x1f
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| 209 | mtc0 a0, CP0_STATUS
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| 210 | li v1, 0xff00
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| 211 | and a0, v1
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| 212 | LONG_L v0, PT_STATUS(sp)
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| 213 | nor v1, $0, v1
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| 214 | and v0, v1
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| 215 | or v0, a0
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| 216 | mtc0 v0, CP0_STATUS
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| 217 | LONG_L $31, PT_R31(sp)
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| 218 | LONG_L $28, PT_R28(sp)
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| 219 | LONG_L $25, PT_R25(sp)
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| 220 | #ifdef CONFIG_MIPS64
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| 221 | LONG_L $8, PT_R8(sp)
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| 222 | LONG_L $9, PT_R9(sp)
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| 223 | #endif
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| 224 | LONG_L $7, PT_R7(sp)
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| 225 | LONG_L $6, PT_R6(sp)
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| 226 | LONG_L $5, PT_R5(sp)
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| 227 | LONG_L $4, PT_R4(sp)
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| 228 | LONG_L $3, PT_R3(sp)
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| 229 | LONG_L $2, PT_R2(sp)
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| 230 | .set pop
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| 231 | .endm
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| 232 |
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| 233 | .macro RESTORE_SP_AND_RET
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| 234 | .set push
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| 235 | .set noreorder
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| 236 | LONG_L k0, PT_EPC(sp)
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| 237 | LONG_L sp, PT_R29(sp)
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| 238 | jr k0
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| 239 | rfe
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| 240 | .set pop
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| 241 | .endm
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| 242 |
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| 243 | #else
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| 244 |
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| 245 | .macro RESTORE_SOME
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| 246 | .set push
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| 247 | .set reorder
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| 248 | .set noat
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| 249 | mfc0 a0, CP0_STATUS
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| 250 | ori a0, 0x1f
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| 251 | xori a0, 0x1f
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| 252 | mtc0 a0, CP0_STATUS
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| 253 | li v1, 0xff00
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| 254 | and a0, v1
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| 255 | LONG_L v0, PT_STATUS(sp)
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| 256 | nor v1, $0, v1
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| 257 | and v0, v1
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| 258 | or v0, a0
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| 259 | mtc0 v0, CP0_STATUS
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| 260 | LONG_L v1, PT_EPC(sp)
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| 261 | MTC0 v1, CP0_EPC
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| 262 | LONG_L $31, PT_R31(sp)
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| 263 | LONG_L $28, PT_R28(sp)
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| 264 | LONG_L $25, PT_R25(sp)
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| 265 | #ifdef CONFIG_MIPS64
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| 266 | LONG_L $8, PT_R8(sp)
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| 267 | LONG_L $9, PT_R9(sp)
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| 268 | #endif
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| 269 | LONG_L $7, PT_R7(sp)
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| 270 | LONG_L $6, PT_R6(sp)
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| 271 | LONG_L $5, PT_R5(sp)
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| 272 | LONG_L $4, PT_R4(sp)
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| 273 | LONG_L $3, PT_R3(sp)
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| 274 | LONG_L $2, PT_R2(sp)
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| 275 | .set pop
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| 276 | .endm
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| 277 |
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| 278 | .macro RESTORE_SP_AND_RET
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| 279 | LONG_L sp, PT_R29(sp)
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| 280 | .set mips3
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| 281 | eret
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| 282 | .set mips0
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| 283 | .endm
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| 284 |
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| 285 | #endif
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| 286 |
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| 287 | .macro RESTORE_SP
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| 288 | LONG_L sp, PT_R29(sp)
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| 289 | .endm
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| 290 |
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| 291 | .macro RESTORE_ALL
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| 292 | RESTORE_TEMP
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| 293 | RESTORE_STATIC
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| 294 | RESTORE_AT
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| 295 | RESTORE_SOME
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| 296 | RESTORE_SP
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| 297 | .endm
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| 298 |
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| 299 | .macro RESTORE_ALL_AND_RET
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| 300 | RESTORE_TEMP
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| 301 | RESTORE_STATIC
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| 302 | RESTORE_AT
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| 303 | RESTORE_SOME
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| 304 | RESTORE_SP_AND_RET
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| 305 | .endm
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| 306 |
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| 307 | |
| 308 | * Move to kernel mode and disable interrupts.
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| 309 | * Set cp0 enable bit as sign that we're running on the kernel stack
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| 310 |
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| 311 | .macro CLI
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| 312 | mfc0 t0, CP0_STATUS
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| 313 | li t1, ST0_CU0 | 0x1f
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| 314 | or t0, t1
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| 315 | xori t0, 0x1f
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| 316 | mtc0 t0, CP0_STATUS
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| 317 | irq_disable_hazard
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| 318 | .endm
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| 319 |
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| 320 | |
| 321 | * Move to kernel mode and enable interrupts.
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| 322 | * Set cp0 enable bit as sign that we're running on the kernel stack
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| 323 |
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| 324 | .macro STI
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| 325 | mfc0 t0, CP0_STATUS
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| 326 | li t1, ST0_CU0 | 0x1f
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| 327 | or t0, t1
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| 328 | xori t0, 0x1e
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| 329 | mtc0 t0, CP0_STATUS
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| 330 | irq_enable_hazard
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| 331 | .endm
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| 332 |
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| 333 | |
| 334 | * Just move to kernel mode and leave interrupts as they are.
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| 335 | * Set cp0 enable bit as sign that we're running on the kernel stack
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| 336 |
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| 337 | .macro KMODE
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| 338 | mfc0 t0, CP0_STATUS
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| 339 | li t1, ST0_CU0 | 0x1e
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| 340 | or t0, t1
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| 341 | xori t0, 0x1e
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| 342 | mtc0 t0, CP0_STATUS
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| 343 | irq_disable_hazard
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| 344 | .endm
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| 345 |
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| 346 | #endif
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