| 1 | |
| 2 | * Timer device implementation for SGI SN platforms.
|
| 3 | *
|
| 4 | * This file is subject to the terms and conditions of the GNU General Public
|
| 5 | * License. See the file "COPYING" in the main directory of this archive
|
| 6 | * for more details.
|
| 7 | *
|
| 8 | * Copyright (c) 2001-2006 Silicon Graphics, Inc. All rights reserved.
|
| 9 | *
|
| 10 | * This driver exports an API that should be supportable by any HPET or IA-PC
|
| 11 | * multimedia timer. The code below is currently specific to the SGI Altix
|
| 12 | * SHub RTC, however.
|
| 13 | *
|
| 14 | * 11/01/01 - jbarnes - initial revision
|
| 15 | * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion
|
| 16 | * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE
|
| 17 | * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
|
| 18 | * support via the posix timer interface
|
| 19 |
|
| 20 |
|
| 21 | #include <linux/types.h>
|
| 22 | #include <linux/kernel.h>
|
| 23 | #include <linux/ioctl.h>
|
| 24 | #include <linux/module.h>
|
| 25 | #include <linux/init.h>
|
| 26 | #include <linux/errno.h>
|
| 27 | #include <linux/mm.h>
|
| 28 | #include <linux/mmtimer.h>
|
| 29 | #include <linux/miscdevice.h>
|
| 30 | #include <linux/posix-timers.h>
|
| 31 | #include <linux/interrupt.h>
|
| 32 |
|
| 33 | #include <asm/uaccess.h>
|
| 34 | #include <asm/sn/addrs.h>
|
| 35 | #include <asm/sn/intr.h>
|
| 36 | #include <asm/sn/shub_mmr.h>
|
| 37 | #include <asm/sn/nodepda.h>
|
| 38 | #include <asm/sn/shubio.h>
|
| 39 |
|
| 40 | MODULE_AUTHOR("Jesse Barnes <[email protected]>");
|
| 41 | MODULE_DESCRIPTION("SGI Altix RTC Timer");
|
| 42 | MODULE_LICENSE("GPL");
|
| 43 |
|
| 44 |
|
| 45 | #define MMTIMER_NAME "mmtimer"
|
| 46 | #define MMTIMER_DESC "SGI Altix RTC Timer"
|
| 47 | #define MMTIMER_VERSION "2.1"
|
| 48 |
|
| 49 | #define RTC_BITS 55
|
| 50 |
|
| 51 | extern unsigned long sn_rtc_cycles_per_second;
|
| 52 |
|
| 53 | #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC))
|
| 54 |
|
| 55 | #define rtc_time() (*RTC_COUNTER_ADDR)
|
| 56 |
|
| 57 | static int mmtimer_ioctl(struct inode *inode, struct file *file,
|
| 58 | unsigned int cmd, unsigned long arg);
|
| 59 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma);
|
| 60 |
|
| 61 | |
| 62 | * Period in femtoseconds (10^-15 s)
|
| 63 |
|
| 64 | static unsigned long mmtimer_femtoperiod = 0;
|
| 65 |
|
| 66 | static const struct file_operations mmtimer_fops = {
|
| 67 | .owner = THIS_MODULE,
|
| 68 | .mmap = mmtimer_mmap,
|
| 69 | .ioctl = mmtimer_ioctl,
|
| 70 | };
|
| 71 |
|
| 72 | |
| 73 | * We only have comparison registers RTC1-4 currently available per
|
| 74 | * node. RTC0 is used by SAL.
|
| 75 |
|
| 76 | #define NUM_COMPARATORS 3
|
| 77 |
|
| 78 | static int inline mmtimer_int_pending(int comparator)
|
| 79 | {
|
| 80 | if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &
|
| 81 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)
|
| 82 | return 1;
|
| 83 | else
|
| 84 | return 0;
|
| 85 | }
|
| 86 |
|
| 87 | static void inline mmtimer_clr_int_pending(int comparator)
|
| 88 | {
|
| 89 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
|
| 90 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);
|
| 91 | }
|
| 92 |
|
| 93 |
|
| 94 | static void inline mmtimer_setup_int_0(u64 expires)
|
| 95 | {
|
| 96 | u64 val;
|
| 97 |
|
| 98 |
|
| 99 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL);
|
| 100 |
|
| 101 |
|
| 102 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L);
|
| 103 |
|
| 104 |
|
| 105 | mmtimer_clr_int_pending(0);
|
| 106 |
|
| 107 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) |
|
| 108 | ((u64)cpu_physical_id(smp_processor_id()) <<
|
| 109 | SH_RTC1_INT_CONFIG_PID_SHFT);
|
| 110 |
|
| 111 |
|
| 112 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val);
|
| 113 |
|
| 114 |
|
| 115 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL);
|
| 116 |
|
| 117 |
|
| 118 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);
|
| 119 |
|
| 120 |
|
| 121 | }
|
| 122 |
|
| 123 |
|
| 124 | static void inline mmtimer_setup_int_1(u64 expires)
|
| 125 | {
|
| 126 | u64 val;
|
| 127 |
|
| 128 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL);
|
| 129 |
|
| 130 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L);
|
| 131 |
|
| 132 | mmtimer_clr_int_pending(1);
|
| 133 |
|
| 134 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) |
|
| 135 | ((u64)cpu_physical_id(smp_processor_id()) <<
|
| 136 | SH_RTC2_INT_CONFIG_PID_SHFT);
|
| 137 |
|
| 138 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val);
|
| 139 |
|
| 140 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL);
|
| 141 |
|
| 142 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);
|
| 143 | }
|
| 144 |
|
| 145 |
|
| 146 | static void inline mmtimer_setup_int_2(u64 expires)
|
| 147 | {
|
| 148 | u64 val;
|
| 149 |
|
| 150 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL);
|
| 151 |
|
| 152 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L);
|
| 153 |
|
| 154 | mmtimer_clr_int_pending(2);
|
| 155 |
|
| 156 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) |
|
| 157 | ((u64)cpu_physical_id(smp_processor_id()) <<
|
| 158 | SH_RTC3_INT_CONFIG_PID_SHFT);
|
| 159 |
|
| 160 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val);
|
| 161 |
|
| 162 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL);
|
| 163 |
|
| 164 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);
|
| 165 | }
|
| 166 |
|
| 167 | |
| 168 | * This function must be called with interrupts disabled and preemption off
|
| 169 | * in order to insure that the setup succeeds in a deterministic time frame.
|
| 170 | * It will check if the interrupt setup succeeded.
|
| 171 |
|
| 172 | static int inline mmtimer_setup(int comparator, unsigned long expires)
|
| 173 | {
|
| 174 |
|
| 175 | switch (comparator) {
|
| 176 | case 0:
|
| 177 | mmtimer_setup_int_0(expires);
|
| 178 | break;
|
| 179 | case 1:
|
| 180 | mmtimer_setup_int_1(expires);
|
| 181 | break;
|
| 182 | case 2:
|
| 183 | mmtimer_setup_int_2(expires);
|
| 184 | break;
|
| 185 | }
|
| 186 |
|
| 187 | if (rtc_time() < expires)
|
| 188 | return 1;
|
| 189 |
|
| 190 | |
| 191 | * If an interrupt is already pending then its okay
|
| 192 | * if not then we failed
|
| 193 |
|
| 194 | return mmtimer_int_pending(comparator);
|
| 195 | }
|
| 196 |
|
| 197 | static int inline mmtimer_disable_int(long nasid, int comparator)
|
| 198 | {
|
| 199 | switch (comparator) {
|
| 200 | case 0:
|
| 201 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),
|
| 202 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);
|
| 203 | break;
|
| 204 | case 1:
|
| 205 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),
|
| 206 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);
|
| 207 | break;
|
| 208 | case 2:
|
| 209 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),
|
| 210 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);
|
| 211 | break;
|
| 212 | default:
|
| 213 | return -EFAULT;
|
| 214 | }
|
| 215 | return 0;
|
| 216 | }
|
| 217 |
|
| 218 | #define TIMER_OFF 0xbadcabLL
|
| 219 |
|
| 220 |
|
| 221 | typedef struct mmtimer {
|
| 222 | spinlock_t lock ____cacheline_aligned;
|
| 223 | struct k_itimer *timer;
|
| 224 | int i;
|
| 225 | int cpu;
|
| 226 | struct tasklet_struct tasklet;
|
| 227 | } mmtimer_t;
|
| 228 |
|
| 229 | static mmtimer_t ** timers;
|
| 230 |
|
| 231 | |
| 232 | * mmtimer_ioctl - ioctl interface for /dev/mmtimer
|
| 233 | * @inode: inode of the device
|
| 234 | * @file: file structure for the device
|
| 235 | * @cmd: command to execute
|
| 236 | * @arg: optional argument to command
|
| 237 | *
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| 238 | * Executes the command specified by @cmd. Returns 0 for success, < 0 for
|
| 239 | * failure.
|
| 240 | *
|
| 241 | * Valid commands:
|
| 242 | *
|
| 243 | * %MMTIMER_GETOFFSET - Should return the offset (relative to the start
|
| 244 | * of the page where the registers are mapped) for the counter in question.
|
| 245 | *
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| 246 | * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
|
| 247 | * seconds
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| 248 | *
|
| 249 | * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
|
| 250 | * specified by @arg
|
| 251 | *
|
| 252 | * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
|
| 253 | *
|
| 254 | * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace
|
| 255 | *
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| 256 | * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
|
| 257 | * in the address specified by @arg.
|
| 258 |
|
| 259 | static int mmtimer_ioctl(struct inode *inode, struct file *file,
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| 260 | unsigned int cmd, unsigned long arg)
|
| 261 | {
|
| 262 | int ret = 0;
|
| 263 |
|
| 264 | switch (cmd) {
|
| 265 | case MMTIMER_GETOFFSET:
|
| 266 | |
| 267 | * SN RTC registers are on their own 64k page
|
| 268 |
|
| 269 | if(PAGE_SIZE <= (1 << 16))
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| 270 | ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;
|
| 271 | else
|
| 272 | ret = -ENOSYS;
|
| 273 | break;
|
| 274 |
|
| 275 | case MMTIMER_GETRES:
|
| 276 | if(copy_to_user((unsigned long __user *)arg,
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| 277 | &mmtimer_femtoperiod, sizeof(unsigned long)))
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| 278 | return -EFAULT;
|
| 279 | break;
|
| 280 |
|
| 281 | case MMTIMER_GETFREQ:
|
| 282 | if(copy_to_user((unsigned long __user *)arg,
|
| 283 | &sn_rtc_cycles_per_second,
|
| 284 | sizeof(unsigned long)))
|
| 285 | return -EFAULT;
|
| 286 | ret = 0;
|
| 287 | break;
|
| 288 |
|
| 289 | case MMTIMER_GETBITS:
|
| 290 | ret = RTC_BITS;
|
| 291 | break;
|
| 292 |
|
| 293 | case MMTIMER_MMAPAVAIL:
|
| 294 | ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
|
| 295 | break;
|
| 296 |
|
| 297 | case MMTIMER_GETCOUNTER:
|
| 298 | if(copy_to_user((unsigned long __user *)arg,
|
| 299 | RTC_COUNTER_ADDR, sizeof(unsigned long)))
|
| 300 | return -EFAULT;
|
| 301 | break;
|
| 302 | default:
|
| 303 | ret = -ENOSYS;
|
| 304 | break;
|
| 305 | }
|
| 306 |
|
| 307 | return ret;
|
| 308 | }
|
| 309 |
|
| 310 | |
| 311 | * mmtimer_mmap - maps the clock's registers into userspace
|
| 312 | * @file: file structure for the device
|
| 313 | * @vma: VMA to map the registers into
|
| 314 | *
|
| 315 | * Calls remap_pfn_range() to map the clock's registers into
|
| 316 | * the calling process' address space.
|
| 317 |
|
| 318 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma)
|
| 319 | {
|
| 320 | unsigned long mmtimer_addr;
|
| 321 |
|
| 322 | if (vma->vm_end - vma->vm_start != PAGE_SIZE)
|
| 323 | return -EINVAL;
|
| 324 |
|
| 325 | if (vma->vm_flags & VM_WRITE)
|
| 326 | return -EPERM;
|
| 327 |
|
| 328 | if (PAGE_SIZE > (1 << 16))
|
| 329 | return -ENOSYS;
|
| 330 |
|
| 331 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
|
| 332 |
|
| 333 | mmtimer_addr = __pa(RTC_COUNTER_ADDR);
|
| 334 | mmtimer_addr &= ~(PAGE_SIZE - 1);
|
| 335 | mmtimer_addr &= 0xfffffffffffffffUL;
|
| 336 |
|
| 337 | if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,
|
| 338 | PAGE_SIZE, vma->vm_page_prot)) {
|
| 339 | printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");
|
| 340 | return -EAGAIN;
|
| 341 | }
|
| 342 |
|
| 343 | return 0;
|
| 344 | }
|
| 345 |
|
| 346 | static struct miscdevice mmtimer_miscdev = {
|
| 347 | SGI_MMTIMER,
|
| 348 | MMTIMER_NAME,
|
| 349 | &mmtimer_fops
|
| 350 | };
|
| 351 |
|
| 352 | static struct timespec sgi_clock_offset;
|
| 353 | static int sgi_clock_period;
|
| 354 |
|
| 355 | |
| 356 | * Posix Timer Interface
|
| 357 |
|
| 358 |
|
| 359 | static struct timespec sgi_clock_offset;
|
| 360 | static int sgi_clock_period;
|
| 361 |
|
| 362 | static int sgi_clock_get(clockid_t clockid, struct timespec *tp)
|
| 363 | {
|
| 364 | u64 nsec;
|
| 365 |
|
| 366 | nsec = rtc_time() * sgi_clock_period
|
| 367 | + sgi_clock_offset.tv_nsec;
|
| 368 | tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec)
|
| 369 | + sgi_clock_offset.tv_sec;
|
| 370 | return 0;
|
| 371 | };
|
| 372 |
|
| 373 | static int sgi_clock_set(clockid_t clockid, struct timespec *tp)
|
| 374 | {
|
| 375 |
|
| 376 | u64 nsec;
|
| 377 | u64 rem;
|
| 378 |
|
| 379 | nsec = rtc_time() * sgi_clock_period;
|
| 380 |
|
| 381 | sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem);
|
| 382 |
|
| 383 | if (rem <= tp->tv_nsec)
|
| 384 | sgi_clock_offset.tv_nsec = tp->tv_sec - rem;
|
| 385 | else {
|
| 386 | sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;
|
| 387 | sgi_clock_offset.tv_sec--;
|
| 388 | }
|
| 389 | return 0;
|
| 390 | }
|
| 391 |
|
| 392 | |
| 393 | * Schedule the next periodic interrupt. This function will attempt
|
| 394 | * to schedule a periodic interrupt later if necessary. If the scheduling
|
| 395 | * of an interrupt fails then the time to skip is lengthened
|
| 396 | * exponentially in order to ensure that the next interrupt
|
| 397 | * can be properly scheduled..
|
| 398 |
|
| 399 | static int inline reschedule_periodic_timer(mmtimer_t *x)
|
| 400 | {
|
| 401 | int n;
|
| 402 | struct k_itimer *t = x->timer;
|
| 403 |
|
| 404 | t->it.mmtimer.clock = x->i;
|
| 405 | t->it_overrun--;
|
| 406 |
|
| 407 | n = 0;
|
| 408 | do {
|
| 409 |
|
| 410 | t->it.mmtimer.expires += t->it.mmtimer.incr << n;
|
| 411 | t->it_overrun += 1 << n;
|
| 412 | n++;
|
| 413 | if (n > 20)
|
| 414 | return 1;
|
| 415 |
|
| 416 | } while (!mmtimer_setup(x->i, t->it.mmtimer.expires));
|
| 417 |
|
| 418 | return 0;
|
| 419 | }
|
| 420 |
|
| 421 | |
| 422 | * mmtimer_interrupt - timer interrupt handler
|
| 423 | * @irq: irq received
|
| 424 | * @dev_id: device the irq came from
|
| 425 | *
|
| 426 | * Called when one of the comarators matches the counter, This
|
| 427 | * routine will send signals to processes that have requested
|
| 428 | * them.
|
| 429 | *
|
| 430 | * This interrupt is run in an interrupt context
|
| 431 | * by the SHUB. It is therefore safe to locally access SHub
|
| 432 | * registers.
|
| 433 |
|
| 434 | static irqreturn_t
|
| 435 | mmtimer_interrupt(int irq, void *dev_id)
|
| 436 | {
|
| 437 | int i;
|
| 438 | unsigned long expires = 0;
|
| 439 | int result = IRQ_NONE;
|
| 440 | unsigned indx = cpu_to_node(smp_processor_id());
|
| 441 |
|
| 442 | |
| 443 | * Do this once for each comparison register
|
| 444 |
|
| 445 | for (i = 0; i < NUM_COMPARATORS; i++) {
|
| 446 | mmtimer_t *base = timers[indx] + i;
|
| 447 |
|
| 448 | spin_lock(&base->lock);
|
| 449 | if (base->cpu == smp_processor_id()) {
|
| 450 | if (base->timer)
|
| 451 | expires = base->timer->it.mmtimer.expires;
|
| 452 |
|
| 453 | if ((mmtimer_int_pending(i) > 0) ||
|
| 454 | (expires && (expires < rtc_time()))) {
|
| 455 | mmtimer_clr_int_pending(i);
|
| 456 | tasklet_schedule(&base->tasklet);
|
| 457 | result = IRQ_HANDLED;
|
| 458 | }
|
| 459 | }
|
| 460 | spin_unlock(&base->lock);
|
| 461 | expires = 0;
|
| 462 | }
|
| 463 | return result;
|
| 464 | }
|
| 465 |
|
| 466 | void mmtimer_tasklet(unsigned long data) {
|
| 467 | mmtimer_t *x = (mmtimer_t *)data;
|
| 468 | struct k_itimer *t = x->timer;
|
| 469 | unsigned long flags;
|
| 470 |
|
| 471 | if (t == NULL)
|
| 472 | return;
|
| 473 |
|
| 474 |
|
| 475 | spin_lock_irqsave(&t->it_lock, flags);
|
| 476 | spin_lock(&x->lock);
|
| 477 |
|
| 478 | if (t != x->timer)
|
| 479 | goto out;
|
| 480 | t->it_overrun = 0;
|
| 481 |
|
| 482 | if (posix_timer_event(t, 0) != 0) {
|
| 483 |
|
| 484 | |
| 485 |
|
| 486 | t->it_overrun++;
|
| 487 | }
|
| 488 | if(t->it.mmtimer.incr) {
|
| 489 |
|
| 490 | if (reschedule_periodic_timer(x)) {
|
| 491 | printk(KERN_WARNING "mmtimer: unable to reschedule\n");
|
| 492 | x->timer = NULL;
|
| 493 | }
|
| 494 | } else {
|
| 495 |
|
| 496 | t->it.mmtimer.expires = 0;
|
| 497 | }
|
| 498 | t->it_overrun_last = t->it_overrun;
|
| 499 | out:
|
| 500 | spin_unlock(&x->lock);
|
| 501 | spin_unlock_irqrestore(&t->it_lock, flags);
|
| 502 | }
|
| 503 |
|
| 504 | static int sgi_timer_create(struct k_itimer *timer)
|
| 505 | {
|
| 506 |
|
| 507 | timer->it.mmtimer.clock = TIMER_OFF;
|
| 508 | return 0;
|
| 509 | }
|
| 510 |
|
| 511 | |
| 512 | * that the timer is not active
|
| 513 | *
|
| 514 | * Assumption: it_lock is already held with irq's disabled
|
| 515 |
|
| 516 | static int sgi_timer_del(struct k_itimer *timr)
|
| 517 | {
|
| 518 | int i = timr->it.mmtimer.clock;
|
| 519 | cnodeid_t nodeid = timr->it.mmtimer.node;
|
| 520 | mmtimer_t *t = timers[nodeid] + i;
|
| 521 | unsigned long irqflags;
|
| 522 |
|
| 523 | if (i != TIMER_OFF) {
|
| 524 | spin_lock_irqsave(&t->lock, irqflags);
|
| 525 | mmtimer_disable_int(cnodeid_to_nasid(nodeid),i);
|
| 526 | t->timer = NULL;
|
| 527 | timr->it.mmtimer.clock = TIMER_OFF;
|
| 528 | timr->it.mmtimer.expires = 0;
|
| 529 | spin_unlock_irqrestore(&t->lock, irqflags);
|
| 530 | }
|
| 531 | return 0;
|
| 532 | }
|
| 533 |
|
| 534 | #define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC)
|
| 535 | #define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec)
|
| 536 |
|
| 537 |
|
| 538 | static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting)
|
| 539 | {
|
| 540 |
|
| 541 | if (timr->it.mmtimer.clock == TIMER_OFF) {
|
| 542 | cur_setting->it_interval.tv_nsec = 0;
|
| 543 | cur_setting->it_interval.tv_sec = 0;
|
| 544 | cur_setting->it_value.tv_nsec = 0;
|
| 545 | cur_setting->it_value.tv_sec =0;
|
| 546 | return;
|
| 547 | }
|
| 548 |
|
| 549 | ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period);
|
| 550 | ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period);
|
| 551 | return;
|
| 552 | }
|
| 553 |
|
| 554 |
|
| 555 | static int sgi_timer_set(struct k_itimer *timr, int flags,
|
| 556 | struct itimerspec * new_setting,
|
| 557 | struct itimerspec * old_setting)
|
| 558 | {
|
| 559 |
|
| 560 | int i;
|
| 561 | unsigned long when, period, irqflags;
|
| 562 | int err = 0;
|
| 563 | cnodeid_t nodeid;
|
| 564 | mmtimer_t *base;
|
| 565 |
|
| 566 | if (old_setting)
|
| 567 | sgi_timer_get(timr, old_setting);
|
| 568 |
|
| 569 | sgi_timer_del(timr);
|
| 570 | when = timespec_to_ns(new_setting->it_value);
|
| 571 | period = timespec_to_ns(new_setting->it_interval);
|
| 572 |
|
| 573 | if (when == 0)
|
| 574 |
|
| 575 | return 0;
|
| 576 |
|
| 577 | if (flags & TIMER_ABSTIME) {
|
| 578 | struct timespec n;
|
| 579 | unsigned long now;
|
| 580 |
|
| 581 | getnstimeofday(&n);
|
| 582 | now = timespec_to_ns(n);
|
| 583 | if (when > now)
|
| 584 | when -= now;
|
| 585 | else
|
| 586 |
|
| 587 | when = 0;
|
| 588 | }
|
| 589 |
|
| 590 | |
| 591 | * Convert to sgi clock period. Need to keep rtc_time() as near as possible
|
| 592 | * to getnstimeofday() in order to be as faithful as possible to the time
|
| 593 | * specified.
|
| 594 |
|
| 595 | when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time();
|
| 596 | period = (period + sgi_clock_period - 1) / sgi_clock_period;
|
| 597 |
|
| 598 | |
| 599 | * We are allocating a local SHub comparator. If we would be moved to another
|
| 600 | * cpu then another SHub may be local to us. Prohibit that by switching off
|
| 601 | * preemption.
|
| 602 |
|
| 603 | preempt_disable();
|
| 604 |
|
| 605 | nodeid = cpu_to_node(smp_processor_id());
|
| 606 | retry:
|
| 607 |
|
| 608 | for(i = 0; i< NUM_COMPARATORS; i++) {
|
| 609 | base = timers[nodeid] + i;
|
| 610 | if (!base->timer && !base->tasklet.state) {
|
| 611 | break;
|
| 612 | }
|
| 613 | }
|
| 614 |
|
| 615 | if (i == NUM_COMPARATORS) {
|
| 616 | preempt_enable();
|
| 617 | return -EBUSY;
|
| 618 | }
|
| 619 |
|
| 620 | spin_lock_irqsave(&base->lock, irqflags);
|
| 621 |
|
| 622 | if (base->timer || base->tasklet.state != 0) {
|
| 623 | spin_unlock_irqrestore(&base->lock, irqflags);
|
| 624 | goto retry;
|
| 625 | }
|
| 626 | base->timer = timr;
|
| 627 | base->cpu = smp_processor_id();
|
| 628 |
|
| 629 | timr->it.mmtimer.clock = i;
|
| 630 | timr->it.mmtimer.node = nodeid;
|
| 631 | timr->it.mmtimer.incr = period;
|
| 632 | timr->it.mmtimer.expires = when;
|
| 633 |
|
| 634 | if (period == 0) {
|
| 635 | if (!mmtimer_setup(i, when)) {
|
| 636 | mmtimer_disable_int(-1, i);
|
| 637 | posix_timer_event(timr, 0);
|
| 638 | timr->it.mmtimer.expires = 0;
|
| 639 | }
|
| 640 | } else {
|
| 641 | timr->it.mmtimer.expires -= period;
|
| 642 | if (reschedule_periodic_timer(base))
|
| 643 | err = -EINVAL;
|
| 644 | }
|
| 645 |
|
| 646 | spin_unlock_irqrestore(&base->lock, irqflags);
|
| 647 |
|
| 648 | preempt_enable();
|
| 649 |
|
| 650 | return err;
|
| 651 | }
|
| 652 |
|
| 653 | static struct k_clock sgi_clock = {
|
| 654 | .res = 0,
|
| 655 | .clock_set = sgi_clock_set,
|
| 656 | .clock_get = sgi_clock_get,
|
| 657 | .timer_create = sgi_timer_create,
|
| 658 | .nsleep = do_posix_clock_nonanosleep,
|
| 659 | .timer_set = sgi_timer_set,
|
| 660 | .timer_del = sgi_timer_del,
|
| 661 | .timer_get = sgi_timer_get
|
| 662 | };
|
| 663 |
|
| 664 | |
| 665 | * mmtimer_init - device initialization routine
|
| 666 | *
|
| 667 | * Does initial setup for the mmtimer device.
|
| 668 |
|
| 669 | static int __init mmtimer_init(void)
|
| 670 | {
|
| 671 | unsigned i;
|
| 672 | cnodeid_t node, maxn = -1;
|
| 673 |
|
| 674 | if (!ia64_platform_is("sn2"))
|
| 675 | return 0;
|
| 676 |
|
| 677 | |
| 678 | * Sanity check the cycles/sec variable
|
| 679 |
|
| 680 | if (sn_rtc_cycles_per_second < 100000) {
|
| 681 | printk(KERN_ERR "%s: unable to determine clock frequency\n",
|
| 682 | MMTIMER_NAME);
|
| 683 | goto out1;
|
| 684 | }
|
| 685 |
|
| 686 | mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second /
|
| 687 | 2) / sn_rtc_cycles_per_second;
|
| 688 |
|
| 689 | if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, IRQF_PERCPU, MMTIMER_NAME, NULL)) {
|
| 690 | printk(KERN_WARNING "%s: unable to allocate interrupt.",
|
| 691 | MMTIMER_NAME);
|
| 692 | goto out1;
|
| 693 | }
|
| 694 |
|
| 695 | if (misc_register(&mmtimer_miscdev)) {
|
| 696 | printk(KERN_ERR "%s: failed to register device\n",
|
| 697 | MMTIMER_NAME);
|
| 698 | goto out2;
|
| 699 | }
|
| 700 |
|
| 701 |
|
| 702 | for_each_online_node(node) {
|
| 703 | maxn = node;
|
| 704 | }
|
| 705 | maxn++;
|
| 706 |
|
| 707 |
|
| 708 | timers = kmalloc(sizeof(mmtimer_t *)*maxn, GFP_KERNEL);
|
| 709 | if (timers == NULL) {
|
| 710 | printk(KERN_ERR "%s: failed to allocate memory for device\n",
|
| 711 | MMTIMER_NAME);
|
| 712 | goto out3;
|
| 713 | }
|
| 714 |
|
| 715 | memset(timers,0,(sizeof(mmtimer_t *)*maxn));
|
| 716 |
|
| 717 |
|
| 718 | for_each_online_node(node) {
|
| 719 | timers[node] = kmalloc_node(sizeof(mmtimer_t)*NUM_COMPARATORS, GFP_KERNEL, node);
|
| 720 | if (timers[node] == NULL) {
|
| 721 | printk(KERN_ERR "%s: failed to allocate memory for device\n",
|
| 722 | MMTIMER_NAME);
|
| 723 | goto out4;
|
| 724 | }
|
| 725 | for (i=0; i< NUM_COMPARATORS; i++) {
|
| 726 | mmtimer_t * base = timers[node] + i;
|
| 727 |
|
| 728 | spin_lock_init(&base->lock);
|
| 729 | base->timer = NULL;
|
| 730 | base->cpu = 0;
|
| 731 | base->i = i;
|
| 732 | tasklet_init(&base->tasklet, mmtimer_tasklet,
|
| 733 | (unsigned long) (base));
|
| 734 | }
|
| 735 | }
|
| 736 |
|
| 737 | sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second;
|
| 738 | register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock);
|
| 739 |
|
| 740 | printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION,
|
| 741 | sn_rtc_cycles_per_second/(unsigned long)1E6);
|
| 742 |
|
| 743 | return 0;
|
| 744 |
|
| 745 | out4:
|
| 746 | for_each_online_node(node) {
|
| 747 | kfree(timers[node]);
|
| 748 | }
|
| 749 | out3:
|
| 750 | misc_deregister(&mmtimer_miscdev);
|
| 751 | out2:
|
| 752 | free_irq(SGI_MMTIMER_VECTOR, NULL);
|
| 753 | out1:
|
| 754 | return -1;
|
| 755 | }
|
| 756 |
|
| 757 | module_init(mmtimer_init);
|
| 758 |
|