projects/linux·blob v5.13 · refs

257 lines · 7.0 KiB

1// SPDX-License-Identifier: GPL-2.0
2// Copyright 2017 Thomas Gleixner <[email protected]>
3
4#include <linux/irqdomain.h>
5#include <linux/irq.h>
6#include <linux/uaccess.h>
7
8#include "internals.h"
9
10static struct dentry *irq_dir;
11
12struct irq_bit_descr {
13 unsigned int mask;
14 char *name;
15};
16#define BIT_MASK_DESCR(m) { .mask = m, .name = #m }
17
18static void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
19 const struct irq_bit_descr *sd, int size)
20{
21 int i;
22
23 for (i = 0; i < size; i++, sd++) {
24 if (state & sd->mask)
25 seq_printf(m, "%*s%s\n", ind + 12, "", sd->name);
26 }
27}
28
29#ifdef CONFIG_SMP
30static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
31{
32 struct irq_data *data = irq_desc_get_irq_data(desc);
33 struct cpumask *msk;
34
35 msk = irq_data_get_affinity_mask(data);
36 seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk));
37#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
38 msk = irq_data_get_effective_affinity_mask(data);
39 seq_printf(m, "effectiv: %*pbl\n", cpumask_pr_args(msk));
40#endif
41#ifdef CONFIG_GENERIC_PENDING_IRQ
42 msk = desc->pending_mask;
43 seq_printf(m, "pending: %*pbl\n", cpumask_pr_args(msk));
44#endif
45}
46#else
47static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
48#endif
49
50static const struct irq_bit_descr irqchip_flags[] = {
51 BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
52 BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
53 BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
54 BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
55 BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
56 BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
57 BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
58 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
59 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
60 BIT_MASK_DESCR(IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND),
61};
62
63static void
64irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
65{
66 struct irq_chip *chip = data->chip;
67
68 if (!chip) {
69 seq_printf(m, "chip: None\n");
70 return;
71 }
72 seq_printf(m, "%*schip: %s\n", ind, "", chip->name);
73 seq_printf(m, "%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
74 irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
75 ARRAY_SIZE(irqchip_flags));
76}
77
78static void
79irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
80{
81 seq_printf(m, "%*sdomain: %s\n", ind, "",
82 data->domain ? data->domain->name : "");
83 seq_printf(m, "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq);
84 irq_debug_show_chip(m, data, ind + 1);
85 if (data->domain && data->domain->ops && data->domain->ops->debug_show)
86 data->domain->ops->debug_show(m, NULL, data, ind + 1);
87#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
88 if (!data->parent_data)
89 return;
90 seq_printf(m, "%*sparent:\n", ind + 1, "");
91 irq_debug_show_data(m, data->parent_data, ind + 4);
92#endif
93}
94
95static const struct irq_bit_descr irqdata_states[] = {
96 BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
97 BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
98 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
99 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
100 BIT_MASK_DESCR(IRQD_LEVEL),
101
102 BIT_MASK_DESCR(IRQD_ACTIVATED),
103 BIT_MASK_DESCR(IRQD_IRQ_STARTED),
104 BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
105 BIT_MASK_DESCR(IRQD_IRQ_MASKED),
106 BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
107
108 BIT_MASK_DESCR(IRQD_PER_CPU),
109 BIT_MASK_DESCR(IRQD_NO_BALANCING),
110
111 BIT_MASK_DESCR(IRQD_SINGLE_TARGET),
112 BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
113 BIT_MASK_DESCR(IRQD_AFFINITY_SET),
114 BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
115 BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
116 BIT_MASK_DESCR(IRQD_AFFINITY_ON_ACTIVATE),
117 BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
118 BIT_MASK_DESCR(IRQD_CAN_RESERVE),
119 BIT_MASK_DESCR(IRQD_MSI_NOMASK_QUIRK),
120
121 BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
122
123 BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
124 BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
125
126 BIT_MASK_DESCR(IRQD_DEFAULT_TRIGGER_SET),
127
128 BIT_MASK_DESCR(IRQD_HANDLE_ENFORCE_IRQCTX),
129
130 BIT_MASK_DESCR(IRQD_IRQ_ENABLED_ON_SUSPEND),
131};
132
133static const struct irq_bit_descr irqdesc_states[] = {
134 BIT_MASK_DESCR(_IRQ_NOPROBE),
135 BIT_MASK_DESCR(_IRQ_NOREQUEST),
136 BIT_MASK_DESCR(_IRQ_NOTHREAD),
137 BIT_MASK_DESCR(_IRQ_NOAUTOEN),
138 BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
139 BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
140 BIT_MASK_DESCR(_IRQ_IS_POLLED),
141 BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
142 BIT_MASK_DESCR(_IRQ_HIDDEN),
143};
144
145static const struct irq_bit_descr irqdesc_istates[] = {
146 BIT_MASK_DESCR(IRQS_AUTODETECT),
147 BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
148 BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
149 BIT_MASK_DESCR(IRQS_ONESHOT),
150 BIT_MASK_DESCR(IRQS_REPLAY),
151 BIT_MASK_DESCR(IRQS_WAITING),
152 BIT_MASK_DESCR(IRQS_PENDING),
153 BIT_MASK_DESCR(IRQS_SUSPENDED),
154 BIT_MASK_DESCR(IRQS_NMI),
155};
156
157
158static int irq_debug_show(struct seq_file *m, void *p)
159{
160 struct irq_desc *desc = m->private;
161 struct irq_data *data;
162
163 raw_spin_lock_irq(&desc->lock);
164 data = irq_desc_get_irq_data(desc);
165 seq_printf(m, "handler: %ps\n", desc->handle_irq);
166 seq_printf(m, "device: %s\n", desc->dev_name);
167 seq_printf(m, "status: 0x%08x\n", desc->status_use_accessors);
168 irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states,
169 ARRAY_SIZE(irqdesc_states));
170 seq_printf(m, "istate: 0x%08x\n", desc->istate);
171 irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates,
172 ARRAY_SIZE(irqdesc_istates));
173 seq_printf(m, "ddepth: %u\n", desc->depth);
174 seq_printf(m, "wdepth: %u\n", desc->wake_depth);
175 seq_printf(m, "dstate: 0x%08x\n", irqd_get(data));
176 irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states,
177 ARRAY_SIZE(irqdata_states));
178 seq_printf(m, "node: %d\n", irq_data_get_node(data));
179 irq_debug_show_masks(m, desc);
180 irq_debug_show_data(m, data, 0);
181 raw_spin_unlock_irq(&desc->lock);
182 return 0;
183}
184
185static int irq_debug_open(struct inode *inode, struct file *file)
186{
187 return single_open(file, irq_debug_show, inode->i_private);
188}
189
190static ssize_t irq_debug_write(struct file *file, const char __user *user_buf,
191 size_t count, loff_t *ppos)
192{
193 struct irq_desc *desc = file_inode(file)->i_private;
194 char buf[8] = { 0, };
195 size_t size;
196
197 size = min(sizeof(buf) - 1, count);
198 if (copy_from_user(buf, user_buf, size))
199 return -EFAULT;
200
201 if (!strncmp(buf, "trigger", size)) {
202 int err = irq_inject_interrupt(irq_desc_get_irq(desc));
203
204 return err ? err : count;
205 }
206
207 return count;
208}
209
210static const struct file_operations dfs_irq_ops = {
211 .open = irq_debug_open,
212 .write = irq_debug_write,
213 .read = seq_read,
214 .llseek = seq_lseek,
215 .release = single_release,
216};
217
218void irq_debugfs_copy_devname(int irq, struct device *dev)
219{
220 struct irq_desc *desc = irq_to_desc(irq);
221 const char *name = dev_name(dev);
222
223 if (name)
224 desc->dev_name = kstrdup(name, GFP_KERNEL);
225}
226
227void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
228{
229 char name [10];
230
231 if (!irq_dir || !desc || desc->debugfs_file)
232 return;
233
234 sprintf(name, "%d", irq);
235 desc->debugfs_file = debugfs_create_file(name, 0644, irq_dir, desc,
236 &dfs_irq_ops);
237}
238
239static int __init irq_debugfs_init(void)
240{
241 struct dentry *root_dir;
242 int irq;
243
244 root_dir = debugfs_create_dir("irq", NULL);
245
246 irq_domain_debugfs_init(root_dir);
247
248 irq_dir = debugfs_create_dir("irqs", root_dir);
249
250 irq_lock_sparse();
251 for_each_active_irq(irq)
252 irq_add_debugfs_entry(irq, irq_to_desc(irq));
253 irq_unlock_sparse();
254
255 return 0;
256}
257__initcall(irq_debugfs_init);