projects/linux·blob v5.6 · refs

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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * arch-independent dma-mapping routines
4 *
5 * Copyright (c) 2006 SUSE Linux Products GmbH
6 * Copyright (c) 2006 Tejun Heo <[email protected]>
7 */
8#include <linux/memblock.h> /* for max_pfn */
9#include <linux/acpi.h>
10#include <linux/dma-direct.h>
11#include <linux/dma-noncoherent.h>
12#include <linux/export.h>
13#include <linux/gfp.h>
14#include <linux/of_device.h>
15#include <linux/slab.h>
16#include <linux/vmalloc.h>
17
18/*
19 * Managed DMA API
20 */
21struct dma_devres {
22 size_t size;
23 void *vaddr;
24 dma_addr_t dma_handle;
25 unsigned long attrs;
26};
27
28static void dmam_release(struct device *dev, void *res)
29{
30 struct dma_devres *this = res;
31
32 dma_free_attrs(dev, this->size, this->vaddr, this->dma_handle,
33 this->attrs);
34}
35
36static int dmam_match(struct device *dev, void *res, void *match_data)
37{
38 struct dma_devres *this = res, *match = match_data;
39
40 if (this->vaddr == match->vaddr) {
41 WARN_ON(this->size != match->size ||
42 this->dma_handle != match->dma_handle);
43 return 1;
44 }
45 return 0;
46}
47
48/**
49 * dmam_free_coherent - Managed dma_free_coherent()
50 * @dev: Device to free coherent memory for
51 * @size: Size of allocation
52 * @vaddr: Virtual address of the memory to free
53 * @dma_handle: DMA handle of the memory to free
54 *
55 * Managed dma_free_coherent().
56 */
57void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
58 dma_addr_t dma_handle)
59{
60 struct dma_devres match_data = { size, vaddr, dma_handle };
61
62 dma_free_coherent(dev, size, vaddr, dma_handle);
63 WARN_ON(devres_destroy(dev, dmam_release, dmam_match, &match_data));
64}
65EXPORT_SYMBOL(dmam_free_coherent);
66
67/**
68 * dmam_alloc_attrs - Managed dma_alloc_attrs()
69 * @dev: Device to allocate non_coherent memory for
70 * @size: Size of allocation
71 * @dma_handle: Out argument for allocated DMA handle
72 * @gfp: Allocation flags
73 * @attrs: Flags in the DMA_ATTR_* namespace.
74 *
75 * Managed dma_alloc_attrs(). Memory allocated using this function will be
76 * automatically released on driver detach.
77 *
78 * RETURNS:
79 * Pointer to allocated memory on success, NULL on failure.
80 */
81void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
82 gfp_t gfp, unsigned long attrs)
83{
84 struct dma_devres *dr;
85 void *vaddr;
86
87 dr = devres_alloc(dmam_release, sizeof(*dr), gfp);
88 if (!dr)
89 return NULL;
90
91 vaddr = dma_alloc_attrs(dev, size, dma_handle, gfp, attrs);
92 if (!vaddr) {
93 devres_free(dr);
94 return NULL;
95 }
96
97 dr->vaddr = vaddr;
98 dr->dma_handle = *dma_handle;
99 dr->size = size;
100 dr->attrs = attrs;
101
102 devres_add(dev, dr);
103
104 return vaddr;
105}
106EXPORT_SYMBOL(dmam_alloc_attrs);
107
108/*
109 * Create scatter-list for the already allocated DMA buffer.
110 */
111int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
112 void *cpu_addr, dma_addr_t dma_addr, size_t size,
113 unsigned long attrs)
114{
115 struct page *page = virt_to_page(cpu_addr);
116 int ret;
117
118 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
119 if (!ret)
120 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
121 return ret;
122}
123
124/*
125 * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
126 * that the intention is to allow exporting memory allocated via the
127 * coherent DMA APIs through the dma_buf API, which only accepts a
128 * scattertable. This presents a couple of problems:
129 * 1. Not all memory allocated via the coherent DMA APIs is backed by
130 * a struct page
131 * 2. Passing coherent DMA memory into the streaming APIs is not allowed
132 * as we will try to flush the memory through a different alias to that
133 * actually being used (and the flushes are redundant.)
134 */
135int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
136 void *cpu_addr, dma_addr_t dma_addr, size_t size,
137 unsigned long attrs)
138{
139 const struct dma_map_ops *ops = get_dma_ops(dev);
140
141 if (dma_is_direct(ops))
142 return dma_direct_get_sgtable(dev, sgt, cpu_addr, dma_addr,
143 size, attrs);
144 if (!ops->get_sgtable)
145 return -ENXIO;
146 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, attrs);
147}
148EXPORT_SYMBOL(dma_get_sgtable_attrs);
149
150#ifdef CONFIG_MMU
151/*
152 * Return the page attributes used for mapping dma_alloc_* memory, either in
153 * kernel space if remapping is needed, or to userspace through dma_mmap_*.
154 */
155pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs)
156{
157 if (dev_is_dma_coherent(dev) ||
158 (IS_ENABLED(CONFIG_DMA_NONCOHERENT_CACHE_SYNC) &&
159 (attrs & DMA_ATTR_NON_CONSISTENT)))
160 return prot;
161#ifdef CONFIG_ARCH_HAS_DMA_WRITE_COMBINE
162 if (attrs & DMA_ATTR_WRITE_COMBINE)
163 return pgprot_writecombine(prot);
164#endif
165 return pgprot_dmacoherent(prot);
166}
167#endif /* CONFIG_MMU */
168
169/*
170 * Create userspace mapping for the DMA-coherent memory.
171 */
172int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
173 void *cpu_addr, dma_addr_t dma_addr, size_t size,
174 unsigned long attrs)
175{
176#ifdef CONFIG_MMU
177 unsigned long user_count = vma_pages(vma);
178 unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
179 unsigned long off = vma->vm_pgoff;
180 int ret = -ENXIO;
181
182 vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs);
183
184 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
185 return ret;
186
187 if (off >= count || user_count > count - off)
188 return -ENXIO;
189
190 return remap_pfn_range(vma, vma->vm_start,
191 page_to_pfn(virt_to_page(cpu_addr)) + vma->vm_pgoff,
192 user_count << PAGE_SHIFT, vma->vm_page_prot);
193#else
194 return -ENXIO;
195#endif /* CONFIG_MMU */
196}
197
198/**
199 * dma_can_mmap - check if a given device supports dma_mmap_*
200 * @dev: device to check
201 *
202 * Returns %true if @dev supports dma_mmap_coherent() and dma_mmap_attrs() to
203 * map DMA allocations to userspace.
204 */
205bool dma_can_mmap(struct device *dev)
206{
207 const struct dma_map_ops *ops = get_dma_ops(dev);
208
209 if (dma_is_direct(ops))
210 return dma_direct_can_mmap(dev);
211 return ops->mmap != NULL;
212}
213EXPORT_SYMBOL_GPL(dma_can_mmap);
214
215/**
216 * dma_mmap_attrs - map a coherent DMA allocation into user space
217 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
218 * @vma: vm_area_struct describing requested user mapping
219 * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
220 * @dma_addr: device-view address returned from dma_alloc_attrs
221 * @size: size of memory originally requested in dma_alloc_attrs
222 * @attrs: attributes of mapping properties requested in dma_alloc_attrs
223 *
224 * Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user
225 * space. The coherent DMA buffer must not be freed by the driver until the
226 * user space mapping has been released.
227 */
228int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
229 void *cpu_addr, dma_addr_t dma_addr, size_t size,
230 unsigned long attrs)
231{
232 const struct dma_map_ops *ops = get_dma_ops(dev);
233
234 if (dma_is_direct(ops))
235 return dma_direct_mmap(dev, vma, cpu_addr, dma_addr, size,
236 attrs);
237 if (!ops->mmap)
238 return -ENXIO;
239 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
240}
241EXPORT_SYMBOL(dma_mmap_attrs);
242
243u64 dma_get_required_mask(struct device *dev)
244{
245 const struct dma_map_ops *ops = get_dma_ops(dev);
246
247 if (dma_is_direct(ops))
248 return dma_direct_get_required_mask(dev);
249 if (ops->get_required_mask)
250 return ops->get_required_mask(dev);
251
252 /*
253 * We require every DMA ops implementation to at least support a 32-bit
254 * DMA mask (and use bounce buffering if that isn't supported in
255 * hardware). As the direct mapping code has its own routine to
256 * actually report an optimal mask we default to 32-bit here as that
257 * is the right thing for most IOMMUs, and at least not actively
258 * harmful in general.
259 */
260 return DMA_BIT_MASK(32);
261}
262EXPORT_SYMBOL_GPL(dma_get_required_mask);
263
264void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
265 gfp_t flag, unsigned long attrs)
266{
267 const struct dma_map_ops *ops = get_dma_ops(dev);
268 void *cpu_addr;
269
270 WARN_ON_ONCE(!dev->coherent_dma_mask);
271
272 if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
273 return cpu_addr;
274
275 /* let the implementation decide on the zone to allocate from: */
276 flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
277
278 if (dma_is_direct(ops))
279 cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs);
280 else if (ops->alloc)
281 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
282 else
283 return NULL;
284
285 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
286 return cpu_addr;
287}
288EXPORT_SYMBOL(dma_alloc_attrs);
289
290void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
291 dma_addr_t dma_handle, unsigned long attrs)
292{
293 const struct dma_map_ops *ops = get_dma_ops(dev);
294
295 if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
296 return;
297 /*
298 * On non-coherent platforms which implement DMA-coherent buffers via
299 * non-cacheable remaps, ops->free() may call vunmap(). Thus getting
300 * this far in IRQ context is a) at risk of a BUG_ON() or trying to
301 * sleep on some machines, and b) an indication that the driver is
302 * probably misusing the coherent API anyway.
303 */
304 WARN_ON(irqs_disabled());
305
306 if (!cpu_addr)
307 return;
308
309 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
310 if (dma_is_direct(ops))
311 dma_direct_free(dev, size, cpu_addr, dma_handle, attrs);
312 else if (ops->free)
313 ops->free(dev, size, cpu_addr, dma_handle, attrs);
314}
315EXPORT_SYMBOL(dma_free_attrs);
316
317int dma_supported(struct device *dev, u64 mask)
318{
319 const struct dma_map_ops *ops = get_dma_ops(dev);
320
321 if (dma_is_direct(ops))
322 return dma_direct_supported(dev, mask);
323 if (!ops->dma_supported)
324 return 1;
325 return ops->dma_supported(dev, mask);
326}
327EXPORT_SYMBOL(dma_supported);
328
329#ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
330void arch_dma_set_mask(struct device *dev, u64 mask);
331#else
332#define arch_dma_set_mask(dev, mask) do { } while (0)
333#endif
334
335int dma_set_mask(struct device *dev, u64 mask)
336{
337 /*
338 * Truncate the mask to the actually supported dma_addr_t width to
339 * avoid generating unsupportable addresses.
340 */
341 mask = (dma_addr_t)mask;
342
343 if (!dev->dma_mask || !dma_supported(dev, mask))
344 return -EIO;
345
346 arch_dma_set_mask(dev, mask);
347 *dev->dma_mask = mask;
348 return 0;
349}
350EXPORT_SYMBOL(dma_set_mask);
351
352#ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
353int dma_set_coherent_mask(struct device *dev, u64 mask)
354{
355 /*
356 * Truncate the mask to the actually supported dma_addr_t width to
357 * avoid generating unsupportable addresses.
358 */
359 mask = (dma_addr_t)mask;
360
361 if (!dma_supported(dev, mask))
362 return -EIO;
363
364 dev->coherent_dma_mask = mask;
365 return 0;
366}
367EXPORT_SYMBOL(dma_set_coherent_mask);
368#endif
369
370void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
371 enum dma_data_direction dir)
372{
373 const struct dma_map_ops *ops = get_dma_ops(dev);
374
375 BUG_ON(!valid_dma_direction(dir));
376
377 if (dma_is_direct(ops))
378 arch_dma_cache_sync(dev, vaddr, size, dir);
379 else if (ops->cache_sync)
380 ops->cache_sync(dev, vaddr, size, dir);
381}
382EXPORT_SYMBOL(dma_cache_sync);
383
384size_t dma_max_mapping_size(struct device *dev)
385{
386 const struct dma_map_ops *ops = get_dma_ops(dev);
387 size_t size = SIZE_MAX;
388
389 if (dma_is_direct(ops))
390 size = dma_direct_max_mapping_size(dev);
391 else if (ops && ops->max_mapping_size)
392 size = ops->max_mapping_size(dev);
393
394 return size;
395}
396EXPORT_SYMBOL_GPL(dma_max_mapping_size);
397
398unsigned long dma_get_merge_boundary(struct device *dev)
399{
400 const struct dma_map_ops *ops = get_dma_ops(dev);
401
402 if (!ops || !ops->get_merge_boundary)
403 return 0; /* can't merge */
404
405 return ops->get_merge_boundary(dev);
406}
407EXPORT_SYMBOL_GPL(dma_get_merge_boundary);