projects/linux·blob v6.7 · refs

267 lines · 8.7 KiB

1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _RESCTRL_H
3#define _RESCTRL_H
4
5#include <linux/kernel.h>
6#include <linux/list.h>
7#include <linux/pid.h>
8
9#ifdef CONFIG_PROC_CPU_RESCTRL
10
11int proc_resctrl_show(struct seq_file *m,
12 struct pid_namespace *ns,
13 struct pid *pid,
14 struct task_struct *tsk);
15
16#endif
17
18/* max value for struct rdt_domain's mbps_val */
19#define MBA_MAX_MBPS U32_MAX
20
21/**
22 * enum resctrl_conf_type - The type of configuration.
23 * @CDP_NONE: No prioritisation, both code and data are controlled or monitored.
24 * @CDP_CODE: Configuration applies to instruction fetches.
25 * @CDP_DATA: Configuration applies to reads and writes.
26 */
27enum resctrl_conf_type {
28 CDP_NONE,
29 CDP_CODE,
30 CDP_DATA,
31};
32
33#define CDP_NUM_TYPES (CDP_DATA + 1)
34
35/*
36 * Event IDs, the values match those used to program IA32_QM_EVTSEL before
37 * reading IA32_QM_CTR on RDT systems.
38 */
39enum resctrl_event_id {
40 QOS_L3_OCCUP_EVENT_ID = 0x01,
41 QOS_L3_MBM_TOTAL_EVENT_ID = 0x02,
42 QOS_L3_MBM_LOCAL_EVENT_ID = 0x03,
43};
44
45/**
46 * struct resctrl_staged_config - parsed configuration to be applied
47 * @new_ctrl: new ctrl value to be loaded
48 * @have_new_ctrl: whether the user provided new_ctrl is valid
49 */
50struct resctrl_staged_config {
51 u32 new_ctrl;
52 bool have_new_ctrl;
53};
54
55/**
56 * struct rdt_domain - group of CPUs sharing a resctrl resource
57 * @list: all instances of this resource
58 * @id: unique id for this instance
59 * @cpu_mask: which CPUs share this resource
60 * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold
61 * @mbm_total: saved state for MBM total bandwidth
62 * @mbm_local: saved state for MBM local bandwidth
63 * @mbm_over: worker to periodically read MBM h/w counters
64 * @cqm_limbo: worker to periodically read CQM h/w counters
65 * @mbm_work_cpu: worker CPU for MBM h/w counters
66 * @cqm_work_cpu: worker CPU for CQM h/w counters
67 * @plr: pseudo-locked region (if any) associated with domain
68 * @staged_config: parsed configuration to be applied
69 * @mbps_val: When mba_sc is enabled, this holds the array of user
70 * specified control values for mba_sc in MBps, indexed
71 * by closid
72 */
73struct rdt_domain {
74 struct list_head list;
75 int id;
76 struct cpumask cpu_mask;
77 unsigned long *rmid_busy_llc;
78 struct mbm_state *mbm_total;
79 struct mbm_state *mbm_local;
80 struct delayed_work mbm_over;
81 struct delayed_work cqm_limbo;
82 int mbm_work_cpu;
83 int cqm_work_cpu;
84 struct pseudo_lock_region *plr;
85 struct resctrl_staged_config staged_config[CDP_NUM_TYPES];
86 u32 *mbps_val;
87};
88
89/**
90 * struct resctrl_cache - Cache allocation related data
91 * @cbm_len: Length of the cache bit mask
92 * @min_cbm_bits: Minimum number of consecutive bits to be set.
93 * The value 0 means the architecture can support
94 * zero CBM.
95 * @shareable_bits: Bitmask of shareable resource with other
96 * executing entities
97 * @arch_has_sparse_bitmasks: True if a bitmask like f00f is valid.
98 * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
99 * level has CPU scope.
100 */
101struct resctrl_cache {
102 unsigned int cbm_len;
103 unsigned int min_cbm_bits;
104 unsigned int shareable_bits;
105 bool arch_has_sparse_bitmasks;
106 bool arch_has_per_cpu_cfg;
107};
108
109/**
110 * enum membw_throttle_mode - System's memory bandwidth throttling mode
111 * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system
112 * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core
113 * always using smallest bandwidth percentage
114 * assigned to threads, aka "max throttling"
115 * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread
116 */
117enum membw_throttle_mode {
118 THREAD_THROTTLE_UNDEFINED = 0,
119 THREAD_THROTTLE_MAX,
120 THREAD_THROTTLE_PER_THREAD,
121};
122
123/**
124 * struct resctrl_membw - Memory bandwidth allocation related data
125 * @min_bw: Minimum memory bandwidth percentage user can request
126 * @bw_gran: Granularity at which the memory bandwidth is allocated
127 * @delay_linear: True if memory B/W delay is in linear scale
128 * @arch_needs_linear: True if we can't configure non-linear resources
129 * @throttle_mode: Bandwidth throttling mode when threads request
130 * different memory bandwidths
131 * @mba_sc: True if MBA software controller(mba_sc) is enabled
132 * @mb_map: Mapping of memory B/W percentage to memory B/W delay
133 */
134struct resctrl_membw {
135 u32 min_bw;
136 u32 bw_gran;
137 u32 delay_linear;
138 bool arch_needs_linear;
139 enum membw_throttle_mode throttle_mode;
140 bool mba_sc;
141 u32 *mb_map;
142};
143
144struct rdt_parse_data;
145struct resctrl_schema;
146
147/**
148 * struct rdt_resource - attributes of a resctrl resource
149 * @rid: The index of the resource
150 * @alloc_capable: Is allocation available on this machine
151 * @mon_capable: Is monitor feature available on this machine
152 * @num_rmid: Number of RMIDs available
153 * @cache_level: Which cache level defines scope of this resource
154 * @cache: Cache allocation related data
155 * @membw: If the component has bandwidth controls, their properties.
156 * @domains: All domains for this resource
157 * @name: Name to use in "schemata" file.
158 * @data_width: Character width of data when displaying
159 * @default_ctrl: Specifies default cache cbm or memory B/W percent.
160 * @format_str: Per resource format string to show domain value
161 * @parse_ctrlval: Per resource function pointer to parse control values
162 * @evt_list: List of monitoring events
163 * @fflags: flags to choose base and info files
164 * @cdp_capable: Is the CDP feature available on this resource
165 */
166struct rdt_resource {
167 int rid;
168 bool alloc_capable;
169 bool mon_capable;
170 int num_rmid;
171 int cache_level;
172 struct resctrl_cache cache;
173 struct resctrl_membw membw;
174 struct list_head domains;
175 char *name;
176 int data_width;
177 u32 default_ctrl;
178 const char *format_str;
179 int (*parse_ctrlval)(struct rdt_parse_data *data,
180 struct resctrl_schema *s,
181 struct rdt_domain *d);
182 struct list_head evt_list;
183 unsigned long fflags;
184 bool cdp_capable;
185};
186
187/**
188 * struct resctrl_schema - configuration abilities of a resource presented to
189 * user-space
190 * @list: Member of resctrl_schema_all.
191 * @name: The name to use in the "schemata" file.
192 * @conf_type: Whether this schema is specific to code/data.
193 * @res: The resource structure exported by the architecture to describe
194 * the hardware that is configured by this schema.
195 * @num_closid: The number of closid that can be used with this schema. When
196 * features like CDP are enabled, this will be lower than the
197 * hardware supports for the resource.
198 */
199struct resctrl_schema {
200 struct list_head list;
201 char name[8];
202 enum resctrl_conf_type conf_type;
203 struct rdt_resource *res;
204 u32 num_closid;
205};
206
207/* The number of closid supported by this resource regardless of CDP */
208u32 resctrl_arch_get_num_closid(struct rdt_resource *r);
209int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid);
210
211/*
212 * Update the ctrl_val and apply this config right now.
213 * Must be called on one of the domain's CPUs.
214 */
215int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d,
216 u32 closid, enum resctrl_conf_type t, u32 cfg_val);
217
218u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d,
219 u32 closid, enum resctrl_conf_type type);
220int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d);
221void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d);
222
223/**
224 * resctrl_arch_rmid_read() - Read the eventid counter corresponding to rmid
225 * for this resource and domain.
226 * @r: resource that the counter should be read from.
227 * @d: domain that the counter should be read from.
228 * @rmid: rmid of the counter to read.
229 * @eventid: eventid to read, e.g. L3 occupancy.
230 * @val: result of the counter read in bytes.
231 *
232 * Call from process context on a CPU that belongs to domain @d.
233 *
234 * Return:
235 * 0 on success, or -EIO, -EINVAL etc on error.
236 */
237int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d,
238 u32 rmid, enum resctrl_event_id eventid, u64 *val);
239
240/**
241 * resctrl_arch_reset_rmid() - Reset any private state associated with rmid
242 * and eventid.
243 * @r: The domain's resource.
244 * @d: The rmid's domain.
245 * @rmid: The rmid whose counter values should be reset.
246 * @eventid: The eventid whose counter values should be reset.
247 *
248 * This can be called from any CPU.
249 */
250void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d,
251 u32 rmid, enum resctrl_event_id eventid);
252
253/**
254 * resctrl_arch_reset_rmid_all() - Reset all private state associated with
255 * all rmids and eventids.
256 * @r: The resctrl resource.
257 * @d: The domain for which all architectural counter state will
258 * be cleared.
259 *
260 * This can be called from any CPU.
261 */
262void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain *d);
263
264extern unsigned int resctrl_rmid_realloc_threshold;
265extern unsigned int resctrl_rmid_realloc_limit;
266
267#endif /* _RESCTRL_H */