| 1 | |
| 2 | * This file is subject to the terms and conditions of the GNU General Public
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| 3 | * License. See the file "COPYING" in the main directory of this archive
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| 4 | * for more details.
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| 5 | *
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| 6 | * Copyright (C) 1995, 1996, 1997, 2000, 2001, 05 by Ralf Baechle
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| 7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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| 8 | * Copyright (C) 2001 MIPS Technologies, Inc.
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| 9 |
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| 10 | #include <linux/capability.h>
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| 11 | #include <linux/errno.h>
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| 12 | #include <linux/linkage.h>
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| 13 | #include <linux/fs.h>
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| 14 | #include <linux/smp.h>
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| 15 | #include <linux/ptrace.h>
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| 16 | #include <linux/string.h>
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| 17 | #include <linux/syscalls.h>
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| 18 | #include <linux/file.h>
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| 19 | #include <linux/utsname.h>
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| 20 | #include <linux/unistd.h>
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| 21 | #include <linux/sem.h>
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| 22 | #include <linux/msg.h>
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| 23 | #include <linux/shm.h>
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| 24 | #include <linux/compiler.h>
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| 25 | #include <linux/ipc.h>
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| 26 | #include <linux/uaccess.h>
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| 27 | #include <linux/slab.h>
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| 28 | #include <linux/elf.h>
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| 29 | #include <linux/sched/task_stack.h>
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| 30 |
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| 31 | #include <asm/asm.h>
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| 32 | #include <asm/asm-eva.h>
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| 33 | #include <asm/branch.h>
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| 34 | #include <asm/cachectl.h>
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| 35 | #include <asm/cacheflush.h>
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| 36 | #include <asm/asm-offsets.h>
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| 37 | #include <asm/signal.h>
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| 38 | #include <asm/sim.h>
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| 39 | #include <asm/shmparam.h>
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| 40 | #include <asm/sync.h>
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| 41 | #include <asm/sysmips.h>
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| 42 | #include <asm/syscalls.h>
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| 43 | #include <asm/switch_to.h>
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| 44 |
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| 45 | |
| 46 | * For historic reasons the pipe(2) syscall on MIPS has an unusual calling
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| 47 | * convention. It returns results in registers $v0 / $v1 which means there
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| 48 | * is no need for it to do verify the validity of a userspace pointer
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| 49 | * argument. Historically that used to be expensive in Linux. These days
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| 50 | * the performance advantage is negligible.
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| 51 |
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| 52 | asmlinkage int sysm_pipe(void)
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| 53 | {
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| 54 | int fd[2];
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| 55 | int error = do_pipe_flags(fd, 0);
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| 56 | if (error)
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| 57 | return error;
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| 58 | current_pt_regs()->regs[3] = fd[1];
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| 59 | return fd[0];
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| 60 | }
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| 61 |
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| 62 | SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
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| 63 | unsigned long, prot, unsigned long, flags, unsigned long,
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| 64 | fd, off_t, offset)
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| 65 | {
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| 66 | if (offset & ~PAGE_MASK)
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| 67 | return -EINVAL;
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| 68 | return ksys_mmap_pgoff(addr, len, prot, flags, fd,
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| 69 | offset >> PAGE_SHIFT);
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| 70 | }
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| 71 |
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| 72 | SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len,
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| 73 | unsigned long, prot, unsigned long, flags, unsigned long, fd,
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| 74 | unsigned long, pgoff)
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| 75 | {
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| 76 | if (pgoff & (~PAGE_MASK >> 12))
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| 77 | return -EINVAL;
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| 78 |
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| 79 | return ksys_mmap_pgoff(addr, len, prot, flags, fd,
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| 80 | pgoff >> (PAGE_SHIFT - 12));
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| 81 | }
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| 82 |
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| 83 | save_static_function(sys_fork);
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| 84 | save_static_function(sys_clone);
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| 85 | save_static_function(sys_clone3);
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| 86 |
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| 87 | SYSCALL_DEFINE1(set_thread_area, unsigned long, addr)
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| 88 | {
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| 89 | struct thread_info *ti = task_thread_info(current);
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| 90 |
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| 91 | ti->tp_value = addr;
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| 92 | if (cpu_has_userlocal)
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| 93 | write_c0_userlocal(addr);
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| 94 |
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| 95 | return 0;
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| 96 | }
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| 97 |
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| 98 | static inline int mips_atomic_set(unsigned long addr, unsigned long new)
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| 99 | {
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| 100 | unsigned long old, tmp;
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| 101 | struct pt_regs *regs;
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| 102 | unsigned int err;
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| 103 |
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| 104 | if (unlikely(addr & 3))
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| 105 | return -EINVAL;
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| 106 |
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| 107 | if (unlikely(!access_ok((const void __user *)addr, 4)))
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| 108 | return -EINVAL;
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| 109 |
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| 110 | if (cpu_has_llsc && IS_ENABLED(CONFIG_WAR_R10000_LLSC)) {
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| 111 | __asm__ __volatile__ (
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| 112 | " .set push \n"
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| 113 | " .set arch=r4000 \n"
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| 114 | " li %[err], 0 \n"
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| 115 | "1: ll %[old], (%[addr]) \n"
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| 116 | " move %[tmp], %[new] \n"
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| 117 | "2: sc %[tmp], (%[addr]) \n"
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| 118 | " beqzl %[tmp], 1b \n"
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| 119 | "3: \n"
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| 120 | " .insn \n"
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| 121 | " .section .fixup,\"ax\" \n"
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| 122 | "4: li %[err], %[efault] \n"
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| 123 | " j 3b \n"
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| 124 | " .previous \n"
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| 125 | " .section __ex_table,\"a\" \n"
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| 126 | " "STR(PTR_WD)" 1b, 4b \n"
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| 127 | " "STR(PTR_WD)" 2b, 4b \n"
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| 128 | " .previous \n"
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| 129 | " .set pop \n"
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| 130 | : [old] "=&r" (old),
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| 131 | [err] "=&r" (err),
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| 132 | [tmp] "=&r" (tmp)
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| 133 | : [addr] "r" (addr),
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| 134 | [new] "r" (new),
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| 135 | [efault] "i" (-EFAULT)
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| 136 | : "memory");
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| 137 | } else if (cpu_has_llsc) {
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| 138 | __asm__ __volatile__ (
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| 139 | " .set push \n"
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| 140 | " .set "MIPS_ISA_ARCH_LEVEL" \n"
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| 141 | " li %[err], 0 \n"
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| 142 | "1: \n"
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| 143 | " " __SYNC(full, loongson3_war) " \n"
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| 144 | user_ll("%[old]", "(%[addr])")
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| 145 | " move %[tmp], %[new] \n"
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| 146 | "2: \n"
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| 147 | user_sc("%[tmp]", "(%[addr])")
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| 148 | " beqz %[tmp], 1b \n"
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| 149 | "3: \n"
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| 150 | " .insn \n"
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| 151 | " .section .fixup,\"ax\" \n"
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| 152 | "5: li %[err], %[efault] \n"
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| 153 | " j 3b \n"
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| 154 | " .previous \n"
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| 155 | " .section __ex_table,\"a\" \n"
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| 156 | " "STR(PTR_WD)" 1b, 5b \n"
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| 157 | " "STR(PTR_WD)" 2b, 5b \n"
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| 158 | " .previous \n"
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| 159 | " .set pop \n"
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| 160 | : [old] "=&r" (old),
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| 161 | [err] "=&r" (err),
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| 162 | [tmp] "=&r" (tmp)
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| 163 | : [addr] "r" (addr),
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| 164 | [new] "r" (new),
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| 165 | [efault] "i" (-EFAULT)
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| 166 | : "memory");
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| 167 | } else {
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| 168 | do {
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| 169 | preempt_disable();
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| 170 | ll_bit = 1;
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| 171 | ll_task = current;
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| 172 | preempt_enable();
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| 173 |
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| 174 | err = __get_user(old, (unsigned int *) addr);
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| 175 | err |= __put_user(new, (unsigned int *) addr);
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| 176 | if (err)
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| 177 | break;
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| 178 | rmb();
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| 179 | } while (!ll_bit);
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| 180 | }
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| 181 |
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| 182 | if (unlikely(err))
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| 183 | return err;
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| 184 |
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| 185 | regs = current_pt_regs();
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| 186 | regs->regs[2] = old;
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| 187 | regs->regs[7] = 0;
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| 188 |
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| 189 | |
| 190 | * Don't let your children do this ...
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| 191 |
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| 192 | __asm__ __volatile__(
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| 193 | " move $29, %0 \n"
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| 194 | " j syscall_exit \n"
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| 195 | :
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| 196 | : "r" (regs));
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| 197 |
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| 198 |
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| 199 | unreachable();
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| 200 | }
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| 201 |
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| 202 | |
| 203 | * mips_atomic_set() normally returns directly via syscall_exit potentially
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| 204 | * clobbering static registers, so be sure to preserve them.
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| 205 |
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| 206 | save_static_function(sys_sysmips);
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| 207 |
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| 208 | SYSCALL_DEFINE3(sysmips, long, cmd, long, arg1, long, arg2)
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| 209 | {
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| 210 | switch (cmd) {
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| 211 | case MIPS_ATOMIC_SET:
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| 212 | return mips_atomic_set(arg1, arg2);
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| 213 |
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| 214 | case MIPS_FIXADE:
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| 215 | if (arg1 & ~3)
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| 216 | return -EINVAL;
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| 217 |
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| 218 | if (arg1 & 1)
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| 219 | set_thread_flag(TIF_FIXADE);
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| 220 | else
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| 221 | clear_thread_flag(TIF_FIXADE);
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| 222 | if (arg1 & 2)
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| 223 | set_thread_flag(TIF_LOGADE);
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| 224 | else
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| 225 | clear_thread_flag(TIF_LOGADE);
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| 226 |
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| 227 | return 0;
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| 228 |
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| 229 | case FLUSH_CACHE:
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| 230 | __flush_cache_all();
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| 231 | return 0;
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| 232 | }
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| 233 |
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| 234 | return -EINVAL;
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| 235 | }
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| 236 |
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| 237 | |
| 238 | * No implemented yet ...
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| 239 |
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| 240 | SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op)
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| 241 | {
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| 242 | return -ENOSYS;
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| 243 | }
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