| 1 | |
| 2 | *
|
| 3 | * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
|
| 4 | * All Rights Reserved.
|
| 5 | *
|
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a
|
| 7 | * copy of this software and associated documentation files (the
|
| 8 | * "Software"), to deal in the Software without restriction, including
|
| 9 | * without limitation the rights to use, copy, modify, merge, publish,
|
| 10 | * distribute, sub license, and/or sell copies of the Software, and to
|
| 11 | * permit persons to whom the Software is furnished to do so, subject to
|
| 12 | * the following conditions:
|
| 13 | *
|
| 14 | * The above copyright notice and this permission notice (including the
|
| 15 | * next paragraph) shall be included in all copies or substantial portions
|
| 16 | * of the Software.
|
| 17 | *
|
| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
| 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
| 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
| 21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
| 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
| 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
| 24 | * USE OR OTHER DEALINGS IN THE SOFTWARE.
|
| 25 | *
|
| 26 | *************************************************************************
|
| 27 | |
| 28 | * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
|
| 29 |
|
| 30 | #include <linux/cc_platform.h>
|
| 31 | #include <linux/export.h>
|
| 32 | #include <linux/highmem.h>
|
| 33 | #include <linux/ioport.h>
|
| 34 | #include <linux/iosys-map.h>
|
| 35 | #include <xen/xen.h>
|
| 36 |
|
| 37 | #include <drm/drm_cache.h>
|
| 38 |
|
| 39 |
|
| 40 | #define MEMCPY_BOUNCE_SIZE 128
|
| 41 |
|
| 42 | #if defined(CONFIG_X86)
|
| 43 | #include <asm/smp.h>
|
| 44 |
|
| 45 | |
| 46 | * clflushopt is an unordered instruction which needs fencing with mfence or
|
| 47 | * sfence to avoid ordering issues. For drm_clflush_page this fencing happens
|
| 48 | * in the caller.
|
| 49 |
|
| 50 | static void
|
| 51 | drm_clflush_page(struct page *page)
|
| 52 | {
|
| 53 | uint8_t *page_virtual;
|
| 54 | unsigned int i;
|
| 55 | const int size = boot_cpu_data.x86_clflush_size;
|
| 56 |
|
| 57 | if (unlikely(page == NULL))
|
| 58 | return;
|
| 59 |
|
| 60 | page_virtual = kmap_atomic(page);
|
| 61 | for (i = 0; i < PAGE_SIZE; i += size)
|
| 62 | clflushopt(page_virtual + i);
|
| 63 | kunmap_atomic(page_virtual);
|
| 64 | }
|
| 65 |
|
| 66 | static void drm_cache_flush_clflush(struct page *pages[],
|
| 67 | unsigned long num_pages)
|
| 68 | {
|
| 69 | unsigned long i;
|
| 70 |
|
| 71 | mb();
|
| 72 | for (i = 0; i < num_pages; i++)
|
| 73 | drm_clflush_page(*pages++);
|
| 74 | mb();
|
| 75 | }
|
| 76 | #endif
|
| 77 |
|
| 78 | |
| 79 | * drm_clflush_pages - Flush dcache lines of a set of pages.
|
| 80 | * @pages: List of pages to be flushed.
|
| 81 | * @num_pages: Number of pages in the array.
|
| 82 | *
|
| 83 | * Flush every data cache line entry that points to an address belonging
|
| 84 | * to a page in the array.
|
| 85 |
|
| 86 | void
|
| 87 | drm_clflush_pages(struct page *pages[], unsigned long num_pages)
|
| 88 | {
|
| 89 |
|
| 90 | #if defined(CONFIG_X86)
|
| 91 | if (cpu_feature_enabled(X86_FEATURE_CLFLUSH)) {
|
| 92 | drm_cache_flush_clflush(pages, num_pages);
|
| 93 | return;
|
| 94 | }
|
| 95 |
|
| 96 | wbinvd_on_all_cpus();
|
| 97 |
|
| 98 | #elif defined(__powerpc__)
|
| 99 | unsigned long i;
|
| 100 |
|
| 101 | for (i = 0; i < num_pages; i++) {
|
| 102 | struct page *page = pages[i];
|
| 103 | void *page_virtual;
|
| 104 |
|
| 105 | if (unlikely(page == NULL))
|
| 106 | continue;
|
| 107 |
|
| 108 | page_virtual = kmap_atomic(page);
|
| 109 | flush_dcache_range((unsigned long)page_virtual,
|
| 110 | (unsigned long)page_virtual + PAGE_SIZE);
|
| 111 | kunmap_atomic(page_virtual);
|
| 112 | }
|
| 113 | #else
|
| 114 | WARN_ONCE(1, "Architecture has no drm_cache.c support\n");
|
| 115 | #endif
|
| 116 | }
|
| 117 | EXPORT_SYMBOL(drm_clflush_pages);
|
| 118 |
|
| 119 | |
| 120 | * drm_clflush_sg - Flush dcache lines pointing to a scather-gather.
|
| 121 | * @st: struct sg_table.
|
| 122 | *
|
| 123 | * Flush every data cache line entry that points to an address in the
|
| 124 | * sg.
|
| 125 |
|
| 126 | void
|
| 127 | drm_clflush_sg(struct sg_table *st)
|
| 128 | {
|
| 129 | #if defined(CONFIG_X86)
|
| 130 | if (cpu_feature_enabled(X86_FEATURE_CLFLUSH)) {
|
| 131 | struct sg_page_iter sg_iter;
|
| 132 |
|
| 133 | mb();
|
| 134 | for_each_sgtable_page(st, &sg_iter, 0)
|
| 135 | drm_clflush_page(sg_page_iter_page(&sg_iter));
|
| 136 | mb();
|
| 137 |
|
| 138 | return;
|
| 139 | }
|
| 140 |
|
| 141 | wbinvd_on_all_cpus();
|
| 142 | #else
|
| 143 | WARN_ONCE(1, "Architecture has no drm_cache.c support\n");
|
| 144 | #endif
|
| 145 | }
|
| 146 | EXPORT_SYMBOL(drm_clflush_sg);
|
| 147 |
|
| 148 | |
| 149 | * drm_clflush_virt_range - Flush dcache lines of a region
|
| 150 | * @addr: Initial kernel memory address.
|
| 151 | * @length: Region size.
|
| 152 | *
|
| 153 | * Flush every data cache line entry that points to an address in the
|
| 154 | * region requested.
|
| 155 |
|
| 156 | void
|
| 157 | drm_clflush_virt_range(void *addr, unsigned long length)
|
| 158 | {
|
| 159 | #if defined(CONFIG_X86)
|
| 160 | if (cpu_feature_enabled(X86_FEATURE_CLFLUSH)) {
|
| 161 | const int size = boot_cpu_data.x86_clflush_size;
|
| 162 | void *end = addr + length;
|
| 163 |
|
| 164 | addr = (void *)(((unsigned long)addr) & -size);
|
| 165 | mb();
|
| 166 | for (; addr < end; addr += size)
|
| 167 | clflushopt(addr);
|
| 168 | clflushopt(end - 1);
|
| 169 | mb();
|
| 170 | return;
|
| 171 | }
|
| 172 |
|
| 173 | wbinvd_on_all_cpus();
|
| 174 | #else
|
| 175 | WARN_ONCE(1, "Architecture has no drm_cache.c support\n");
|
| 176 | #endif
|
| 177 | }
|
| 178 | EXPORT_SYMBOL(drm_clflush_virt_range);
|
| 179 |
|
| 180 | bool drm_need_swiotlb(int dma_bits)
|
| 181 | {
|
| 182 | struct resource *tmp;
|
| 183 | resource_size_t max_iomem = 0;
|
| 184 |
|
| 185 | |
| 186 | * Xen paravirtual hosts require swiotlb regardless of requested dma
|
| 187 | * transfer size.
|
| 188 | *
|
| 189 | * NOTE: Really, what it requires is use of the dma_alloc_coherent
|
| 190 | * allocator used in ttm_dma_populate() instead of
|
| 191 | * ttm_populate_and_map_pages(), which bounce buffers so much in
|
| 192 | * Xen it leads to swiotlb buffer exhaustion.
|
| 193 |
|
| 194 | if (xen_pv_domain())
|
| 195 | return true;
|
| 196 |
|
| 197 | |
| 198 | * Enforce dma_alloc_coherent when memory encryption is active as well
|
| 199 | * for the same reasons as for Xen paravirtual hosts.
|
| 200 |
|
| 201 | if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
|
| 202 | return true;
|
| 203 |
|
| 204 | for (tmp = iomem_resource.child; tmp; tmp = tmp->sibling)
|
| 205 | max_iomem = max(max_iomem, tmp->end);
|
| 206 |
|
| 207 | return max_iomem > ((u64)1 << dma_bits);
|
| 208 | }
|
| 209 | EXPORT_SYMBOL(drm_need_swiotlb);
|
| 210 |
|
| 211 | static void memcpy_fallback(struct iosys_map *dst,
|
| 212 | const struct iosys_map *src,
|
| 213 | unsigned long len)
|
| 214 | {
|
| 215 | if (!dst->is_iomem && !src->is_iomem) {
|
| 216 | memcpy(dst->vaddr, src->vaddr, len);
|
| 217 | } else if (!src->is_iomem) {
|
| 218 | iosys_map_memcpy_to(dst, 0, src->vaddr, len);
|
| 219 | } else if (!dst->is_iomem) {
|
| 220 | memcpy_fromio(dst->vaddr, src->vaddr_iomem, len);
|
| 221 | } else {
|
| 222 | |
| 223 | * Bounce size is not performance tuned, but using a
|
| 224 | * bounce buffer like this is significantly faster than
|
| 225 | * resorting to ioreadxx() + iowritexx().
|
| 226 |
|
| 227 | char bounce[MEMCPY_BOUNCE_SIZE];
|
| 228 | void __iomem *_src = src->vaddr_iomem;
|
| 229 | void __iomem *_dst = dst->vaddr_iomem;
|
| 230 |
|
| 231 | while (len >= MEMCPY_BOUNCE_SIZE) {
|
| 232 | memcpy_fromio(bounce, _src, MEMCPY_BOUNCE_SIZE);
|
| 233 | memcpy_toio(_dst, bounce, MEMCPY_BOUNCE_SIZE);
|
| 234 | _src += MEMCPY_BOUNCE_SIZE;
|
| 235 | _dst += MEMCPY_BOUNCE_SIZE;
|
| 236 | len -= MEMCPY_BOUNCE_SIZE;
|
| 237 | }
|
| 238 | if (len) {
|
| 239 | memcpy_fromio(bounce, _src, MEMCPY_BOUNCE_SIZE);
|
| 240 | memcpy_toio(_dst, bounce, MEMCPY_BOUNCE_SIZE);
|
| 241 | }
|
| 242 | }
|
| 243 | }
|
| 244 |
|
| 245 | #ifdef CONFIG_X86
|
| 246 |
|
| 247 | static DEFINE_STATIC_KEY_FALSE(has_movntdqa);
|
| 248 |
|
| 249 | static void __memcpy_ntdqa(void *dst, const void *src, unsigned long len)
|
| 250 | {
|
| 251 | kernel_fpu_begin();
|
| 252 |
|
| 253 | while (len >= 4) {
|
| 254 | asm("movntdqa (%0), %%xmm0\n"
|
| 255 | "movntdqa 16(%0), %%xmm1\n"
|
| 256 | "movntdqa 32(%0), %%xmm2\n"
|
| 257 | "movntdqa 48(%0), %%xmm3\n"
|
| 258 | "movaps %%xmm0, (%1)\n"
|
| 259 | "movaps %%xmm1, 16(%1)\n"
|
| 260 | "movaps %%xmm2, 32(%1)\n"
|
| 261 | "movaps %%xmm3, 48(%1)\n"
|
| 262 | :: "r" (src), "r" (dst) : "memory");
|
| 263 | src += 64;
|
| 264 | dst += 64;
|
| 265 | len -= 4;
|
| 266 | }
|
| 267 | while (len--) {
|
| 268 | asm("movntdqa (%0), %%xmm0\n"
|
| 269 | "movaps %%xmm0, (%1)\n"
|
| 270 | :: "r" (src), "r" (dst) : "memory");
|
| 271 | src += 16;
|
| 272 | dst += 16;
|
| 273 | }
|
| 274 |
|
| 275 | kernel_fpu_end();
|
| 276 | }
|
| 277 |
|
| 278 | |
| 279 | * __drm_memcpy_from_wc copies @len bytes from @src to @dst using
|
| 280 | * non-temporal instructions where available. Note that all arguments
|
| 281 | * (@src, @dst) must be aligned to 16 bytes and @len must be a multiple
|
| 282 | * of 16.
|
| 283 |
|
| 284 | static void __drm_memcpy_from_wc(void *dst, const void *src, unsigned long len)
|
| 285 | {
|
| 286 | if (unlikely(((unsigned long)dst | (unsigned long)src | len) & 15))
|
| 287 | memcpy(dst, src, len);
|
| 288 | else if (likely(len))
|
| 289 | __memcpy_ntdqa(dst, src, len >> 4);
|
| 290 | }
|
| 291 |
|
| 292 | |
| 293 | * drm_memcpy_from_wc - Perform the fastest available memcpy from a source
|
| 294 | * that may be WC.
|
| 295 | * @dst: The destination pointer
|
| 296 | * @src: The source pointer
|
| 297 | * @len: The size of the area o transfer in bytes
|
| 298 | *
|
| 299 | * Tries an arch optimized memcpy for prefetching reading out of a WC region,
|
| 300 | * and if no such beast is available, falls back to a normal memcpy.
|
| 301 |
|
| 302 | void drm_memcpy_from_wc(struct iosys_map *dst,
|
| 303 | const struct iosys_map *src,
|
| 304 | unsigned long len)
|
| 305 | {
|
| 306 | if (WARN_ON(in_interrupt())) {
|
| 307 | memcpy_fallback(dst, src, len);
|
| 308 | return;
|
| 309 | }
|
| 310 |
|
| 311 | if (static_branch_likely(&has_movntdqa)) {
|
| 312 | __drm_memcpy_from_wc(dst->is_iomem ?
|
| 313 | (void __force *)dst->vaddr_iomem :
|
| 314 | dst->vaddr,
|
| 315 | src->is_iomem ?
|
| 316 | (void const __force *)src->vaddr_iomem :
|
| 317 | src->vaddr,
|
| 318 | len);
|
| 319 | return;
|
| 320 | }
|
| 321 |
|
| 322 | memcpy_fallback(dst, src, len);
|
| 323 | }
|
| 324 | EXPORT_SYMBOL(drm_memcpy_from_wc);
|
| 325 |
|
| 326 | |
| 327 | * drm_memcpy_init_early - One time initialization of the WC memcpy code
|
| 328 |
|
| 329 | void drm_memcpy_init_early(void)
|
| 330 | {
|
| 331 | |
| 332 | * Some hypervisors (e.g. KVM) don't support VEX-prefix instructions
|
| 333 | * emulation. So don't enable movntdqa in hypervisor guest.
|
| 334 |
|
| 335 | if (cpu_feature_enabled(X86_FEATURE_XMM4_1) &&
|
| 336 | !boot_cpu_has(X86_FEATURE_HYPERVISOR))
|
| 337 | static_branch_enable(&has_movntdqa);
|
| 338 | }
|
| 339 | #else
|
| 340 | void drm_memcpy_from_wc(struct iosys_map *dst,
|
| 341 | const struct iosys_map *src,
|
| 342 | unsigned long len)
|
| 343 | {
|
| 344 | WARN_ON(in_interrupt());
|
| 345 |
|
| 346 | memcpy_fallback(dst, src, len);
|
| 347 | }
|
| 348 | EXPORT_SYMBOL(drm_memcpy_from_wc);
|
| 349 |
|
| 350 | void drm_memcpy_init_early(void)
|
| 351 | {
|
| 352 | }
|
| 353 | #endif
|