riscv: mm: Fix code comment
Changes
1 files changed · +0 −3
| File | Status | Add | Del | Content |
|---|---|---|---|---|
| arch/riscv/mm/fault.c | modified | +0 | −3 | View file |
arch/riscv/mm/fault.c
View filediff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c
index 3e2708c..f960c3f 100644
--- a/arch/riscv/mm/fault.c
+++ b/arch/riscv/mm/fault.c
@@ -272,9 +272,6 @@ vmalloc_fault:
* entries, but in RISC-V, SFENCE.VMA specifies an
* ordering constraint, not a cache flush; it is
* necessary even after writing invalid entries.
- * Relying on flush_tlb_fix_spurious_fault would
- * suffice, but the extra traps reduce
- * performance. So, eagerly SFENCE.VMA.
*/
local_flush_tlb_page(addr);