Merge tag 'spi-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

307b9ddb · Linus Torvalds <[email protected]> · 2026-08-19 09:47:41 -07:00

Pull spi updates from Mark Brown:
 "Along with a lot of driver specific work we've got a couple of core
  features here. The bigger one is that we've now got support for
  instantiating devices from sysfs similarly to how it's already done
  for I2C, this is used with development boards with non-enumerable
  expansion headers since SPI devices need to be manually specified. We
  also have support for the DQS signal on higher end flash devices.

   - Support for instantiating devices from sysfs, useful for
     development boards with non-enumerable plugin modules, from
     Vishwaroop A.

   - Support for DQS in spi-mem, an additional signal used by flash
     devices to avoid clock skew from Miquel Raynal.

   - Support for more advanced SPI modes on DesignWare controllers from
     Sudip Mukherjee.

   - Changes from Jisheng Zhang to update to modern methods of
     specifying the PM callbacks.

   - Fixes for DMA mapping error handling, plus KUnit tests for this,
     from Honghui Jiang.

   - Substantial cleanup and performance work in the nxp-spi driver.

   - Support for Microchip LAN969x, Nuvoton MA35D1 QSPI, Qualcomm
     SA8255p and SA8797P, and StarFive JHB100 SFC"

* tag 'spi-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (132 commits)
  spi: Add KUnit coverage for DMA mapping error paths
  spi: Clear current DMA devices when unmapping a message
  spi: Move __spi_unmap_msg() before __spi_map_msg()
  spi: Fix DMA mapping ownership on partial map failure
  spi: dt-bindings: sun6i: Add compatibles for A733's SPI controllers
  spi: ma35d1-qspi: Use the existing update helper
  spi: ma35d1-qspi: Add DTR support
  spi: ma35d1-qspi: Allow several command bytes
  spi: ma35d1-qspi: Move speed setting to bus configuration
  spi: ma35d1-qspi: Remove redundant reset operation
  spi: dw: Remove shadowed dws in dw_spi_setup()
  spi: img-spfi: don't disable runtime PM on DMA deferred probe
  spi: mtk-nor: Propagate errors from IRQ request
  spi: mtk-nor: Propagate errors from optional IRQ lookup
  spi: spi-qpic-snand: Handle Macronix quad read opcode 0x6b
  spi: spi-qpic-snand: add quad mode support
  spi: spi-qpic-snand: move command mapping helper
  spi: hisi-sfc-v3xx: Propagate errors from optional IRQ lookup
  spi: meson-spifc: use devm_pm_runtime_set_active_enabled
  spi: sprd-adi: Fix probe succeeding without registering the controller
  ...

Commit: 307b9ddbbcf987db77d52da6f9ff5b4096ac9599
Parents: b3438e5c · 23688feb

Merge commit. Changes below are compared with the first parent: b3438e5c.

Changes

98 files changed · +3486 −980

File	Status	Add	Del	Content
Documentation/ABI/testing/sysfs-class-spi-master	added	+34	−0	View file
Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml	modified	+6	−0	View file
Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml	modified	+0	−4	View file
Documentation/devicetree/bindings/spi/atmel,quadspi.yaml	modified	+1	−0	View file
Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml	modified	+0	−1	View file
Documentation/devicetree/bindings/spi/cavium,octeon-3010-spi.yaml	added	+61	−0	View file
Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml	modified	+0	−3	View file
Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml	added	+65	−0	View file
Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml	modified	+10	−0	View file
Documentation/devicetree/bindings/spi/qcom,sa8255p-geni-spi.yaml	added	+68	−0	View file
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml	modified	+22	−0	View file
Documentation/devicetree/bindings/spi/spi-cadence.yaml	modified	+0	−1	View file
Documentation/devicetree/bindings/spi/spi-octeon.txt	deleted	+0	−33	View before deletion
Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml	modified	+3	−0	View file
Documentation/spi/index.rst	modified	+1	−0	View file
Documentation/spi/instantiating-devices.rst	added	+88	−0	View file
drivers/soc/qcom/qcom-geni-se.c	modified	+5	−0	View file
drivers/spi/.kunitconfig	added	+4	−0	View file
drivers/spi/Kconfig	modified	+25	−2	View file
drivers/spi/Makefile	modified	+2	−0	View file
drivers/spi/atmel-quadspi.c	modified	+108	−40	View file
drivers/spi/internals.h	modified	+7	−2	View file
drivers/spi/spi-altera-platform.c	modified	+5	−8	View file
drivers/spi/spi-amlogic-spifc-a1.c	modified	+5	−10	View file
drivers/spi/spi-at91-usart.c	modified	+4	−4	View file
drivers/spi/spi-atcspi200.c	modified	+4	−2	View file
drivers/spi/spi-ath79.c	modified	+7	−17	View file
drivers/spi/spi-axiado.c	modified	+17	−18	View file
drivers/spi/spi-axiado.h	modified	+3	−2	View file
drivers/spi/spi-bcm-qspi.c	modified	+8	−4	View file
drivers/spi/spi-bcm2835.c	modified	+1	−1	View file
drivers/spi/spi-bcm63xx-hsspi.c	modified	+15	−7	View file
drivers/spi/spi-bcm63xx.c	modified	+9	−2	View file
drivers/spi/spi-bcmbca-hsspi.c	modified	+15	−7	View file
drivers/spi/spi-brcmstb-qspi.c	modified	+1	−1	View file
drivers/spi/spi-cadence-xspi.c	modified	+245	−230	View file
drivers/spi/spi-cadence.c	modified	+7	−8	View file
drivers/spi/spi-coldfire-qspi.c	modified	+4	−8	View file
drivers/spi/spi-davinci.c	modified	+3	−4	View file
drivers/spi/spi-dln2.c	modified	+3	−8	View file
drivers/spi/spi-dw-core.c	modified	+376	−11	View file
drivers/spi/spi-dw-mmio.c	modified	+72	−0	View file
drivers/spi/spi-dw-pci.c	modified	+2	−4	View file
drivers/spi/spi-dw.h	modified	+51	−1	View file
drivers/spi/spi-fsl-dspi.c	modified	+20	−7	View file
drivers/spi/spi-fsl-espi.c	modified	+3	−8	View file
drivers/spi/spi-fsl-lpspi.c	modified	+2	−4	View file
drivers/spi/spi-geni-qcom.c	modified	+78	−65	View file
drivers/spi/spi-hisi-sfc-v3xx.c	modified	+2	−2	View file
drivers/spi/spi-img-spfi.c	modified	+6	−10	View file
drivers/spi/spi-iproc-qspi.c	modified	+1	−1	View file
drivers/spi/spi-loongson-core.c	modified	+2	−2	View file
drivers/spi/spi-loongson-pci.c	modified	+1	−1	View file
drivers/spi/spi-loongson-plat.c	modified	+1	−1	View file
drivers/spi/spi-ma35d1-qspi.c	added	+685	−0	View file
drivers/spi/spi-mem.c	modified	+32	−0	View file
drivers/spi/spi-meson-spifc.c	modified	+10	−20	View file
drivers/spi/spi-mpc52xx.c	modified	+14	−2	View file
drivers/spi/spi-mt65xx.c	modified	+3	−8	View file
drivers/spi/spi-mtk-nor.c	modified	+13	−8	View file
drivers/spi/spi-mxic.c	modified	+4	−5	View file
drivers/spi/spi-npcm-fiu.c	modified	+8	−7	View file
drivers/spi/spi-nxp-fspi.c	modified	+22	−9	View file
drivers/spi/spi-nxp-xspi.c	modified	+140	−3	View file
drivers/spi/spi-oc-tiny.c	modified	+8	−16	View file
drivers/spi/spi-omap2-mcspi.c	modified	+4	−5	View file
drivers/spi/spi-orion.c	modified	+11	−26	View file
drivers/spi/spi-pl022.c	modified	+3	−7	View file
drivers/spi/spi-ppc4xx.c	modified	+25	−80	View file
drivers/spi/spi-qcom-qspi.c	modified	+8	−8	View file
drivers/spi/spi-qpic-snand.c	modified	+121	−53	View file
drivers/spi/spi-qup.c	modified	+5	−9	View file
drivers/spi/spi-realtek-rtl.c	modified	+13	−13	View file
drivers/spi/spi-rockchip-sfc.c	modified	+4	−8	View file
drivers/spi/spi-rockchip.c	modified	+4	−8	View file
drivers/spi/spi-rpc-if.c	modified	+4	−0	View file
drivers/spi/spi-s3c64xx.c	modified	+4	−8	View file
drivers/spi/spi-slave-mt27xx.c	modified	+4	−8	View file
drivers/spi/spi-spacemit-k1.c	modified	+6	−4	View file
drivers/spi/spi-sprd-adi.c	modified	+6	−0	View file
drivers/spi/spi-sprd.c	modified	+4	−5	View file
drivers/spi/spi-sunplus-sp7021.c	modified	+7	−9	View file
drivers/spi/spi-synquacer.c	modified	+5	−5	View file
drivers/spi/spi-tegra114.c	modified	+4	−6	View file
drivers/spi/spi-tegra20-sflash.c	modified	+4	−6	View file
drivers/spi/spi-tegra20-slink.c	modified	+6	−8	View file
drivers/spi/spi-tegra210-quad.c	modified	+7	−7	View file
drivers/spi/spi-topcliff-pch.c	modified	+20	−27	View file
drivers/spi/spi-zynqmp-gqspi.c	modified	+7	−8	View file
drivers/spi/spi.c	modified	+297	−40	View file
drivers/spi/tests/Makefile	added	+3	−0	View file
drivers/spi/tests/spi-dma-kunit.c	added	+259	−0	View file
include/linux/soc/qcom/geni-se.h	modified	+38	−0	View file
include/linux/spi/spi-mem.h	modified	+4	−0	View file
include/linux/spi/spi.h	modified	+18	−0	View file
include/trace/events/qcom_geni_se.h	added	+157	−0	View file
tools/testing/kunit/configs/all_tests.config	modified	+1	−0	View file
tools/testing/kunit/configs/default.config	modified	+1	−0	View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/ABI/testing/sysfs-class-spi-master

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diff --git a/Documentation/ABI/testing/sysfs-class-spi-master b/Documentation/ABI/testing/sysfs-class-spi-master
new file mode 100644
index 0000000..0a524fc
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-spi-master
@@ -0,0 +1,34 @@
+What:		/sys/class/spi_master/spiB/new_device
+Date:		July 2026
+KernelVersion:	7.3
+Contact:	[email protected]
+Description:	(WO) Instantiate a new SPI device on bus B, where B
+		is the bus number (0, 1, 2, ...). Takes parameters
+		in the format:
+
+		<modalias> <chip_select> [<max_speed_hz> [<mode>]]
+
+		where modalias is the driver name, chip_select is the
+		CS line number, and max_speed_hz and mode are optional.
+
+		The device can later be removed with delete_device.
+
+		Only devices created via this interface can be removed
+		with delete_device; platform and DT devices are not
+		affected.
+
+		Example:
+		# echo spidev 0 > /sys/class/spi_master/spi0/new_device
+		# echo spidev 0 10000000 > /sys/class/spi_master/spi0/new_device
+		# echo spidev 0 10000000 3 > /sys/class/spi_master/spi0/new_device
+
+What:		/sys/class/spi_master/spiB/delete_device
+Date:		July 2026
+KernelVersion:	7.3
+Contact:	[email protected]
+Description:	(WO) Remove a SPI device previously created via
+		new_device. Takes a single parameter: the chip select
+		number of the device to remove.
+
+		Example:
+		# echo 0 > /sys/class/spi_master/spi0/delete_device

Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
index 6af4ff2..14c2f31 100644
--- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
@@ -34,6 +34,12 @@ properties:
           - const: allwinner,sun50i-r329-spi-dbi
           - const: allwinner,sun50i-r329-spi
       - items:
+          - enum:
+              - allwinner,sun55i-a523-spi-dbi
+              - allwinner,sun60i-a733-spi
+          - const: allwinner,sun55i-a523-spi
+      - items:
+          - const: allwinner,sun60i-a733-spi-dbi
           - const: allwinner,sun55i-a523-spi-dbi
           - const: allwinner,sun55i-a523-spi
 

Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml b/Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml
index 8e44174..381042e 100644
--- a/Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml
@@ -24,10 +24,6 @@ properties:
   clocks:
     maxItems: 1
 
-  num-cs:
-    description: Number of chip selects supported
-    maxItems: 1
-
   dmas:
     items:
       - description: Transmit FIFO DMA channel

Documentation/devicetree/bindings/spi/atmel,quadspi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
index 30ab42c..36c698c 100644
--- a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
+++ b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
@@ -22,6 +22,7 @@ properties:
       - microchip,sama7d65-ospi
       - microchip,sama7g5-qspi
       - microchip,sama7g5-ospi
+      - microchip,lan9691-qspi
 
   reg:
     items:

Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml b/Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml
index cd2aac6..be258c1 100644
--- a/Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/axiado,ax3000-spi.yaml
@@ -37,7 +37,6 @@ properties:
   num-cs:
     description: |
       Number of chip selects used.
-    $ref: /schemas/types.yaml#/definitions/uint32
     minimum: 1
     maximum: 4
     default: 4

Documentation/devicetree/bindings/spi/cavium,octeon-3010-spi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/cavium,octeon-3010-spi.yaml b/Documentation/devicetree/bindings/spi/cavium,octeon-3010-spi.yaml
new file mode 100644
index 0000000..f0b708e
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/cavium,octeon-3010-spi.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/cavium,octeon-3010-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cavium, Inc. OCTEON SoC SPI master controller
+
+description:
+  The Cavium OCTEON SPI controller is an SPI master controller found in
+  OCTEON SoCs.
+
+maintainers:
+  - Rob Herring <[email protected]>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+properties:
+  compatible:
+    const: cavium,octeon-3010-spi
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        spi@1070000001000 {
+            compatible = "cavium,octeon-3010-spi";
+            reg = <0x10700 0x00001000 0x0 0x100>;
+            interrupts = <0 58>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            eeprom@0 {
+                compatible = "st,m95256", "atmel,at25";
+                reg = <0>;
+                spi-max-frequency = <5000000>;
+                spi-cpha;
+                spi-cpol;
+                pagesize = <64>;
+                size = <32768>;
+                address-width = <16>;
+            };
+        };
+    };
+...

Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml b/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml
index 61caa1d..75437c4 100644
--- a/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml
@@ -28,9 +28,6 @@ properties:
   clocks:
     maxItems: 1
 
-  num-cs:
-    maxItems: 1
-
 required:
   - compatible
   - reg

Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
new file mode 100644
index 0000000..40965ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/nuvoton,ma35d1-qspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35D1 Quad SPI Controller
+
+maintainers:
+  - Chi-Wen Weng <[email protected]>
+
+allOf:
+  - $ref: /schemas/spi/spi-controller.yaml#
+
+properties:
+  compatible:
+    const: nuvoton,ma35d1-qspi
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  num-cs:
+    minimum: 1
+    maximum: 2
+    default: 2
+
+  cs-gpios: false
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+    #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
+
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        spi@40680000 {
+            compatible = "nuvoton,ma35d1-qspi";
+            reg = <0 0x40680000 0 0x100>;
+            interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&clk QSPI0_GATE>;
+            resets = <&sys MA35D1_RESET_QSPI0>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+        };
+    };

Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml b/Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml
index 16a0598..ccf841f 100644
--- a/Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml
+++ b/Documentation/devicetree/bindings/spi/nxp,imx94-xspi.yaml
@@ -30,6 +30,16 @@ properties:
       - const: base
       - const: mmap
 
+  dmas:
+    items:
+      - description: Transmit DMA
+      - description: Receive DMA
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
   interrupts:
     items:
       - description: interrupt for EENV0

Documentation/devicetree/bindings/spi/qcom,sa8255p-geni-spi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/qcom,sa8255p-geni-spi.yaml b/Documentation/devicetree/bindings/spi/qcom,sa8255p-geni-spi.yaml
new file mode 100644
index 0000000..6552303
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/qcom,sa8255p-geni-spi.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/qcom,sa8255p-geni-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
+
+maintainers:
+  - Praveen Talari <[email protected]>
+
+properties:
+  compatible:
+    oneOf:
+      - const: qcom,sa8255p-geni-spi
+      - items:
+          - const: qcom,sa8797p-geni-spi
+          - const: qcom,sa8255p-geni-spi
+
+  reg:
+    maxItems: 1
+
+  dmas:
+    maxItems: 2
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
+  interrupts:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 2
+
+  power-domain-names:
+    items:
+      - const: power
+      - const: perf
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - power-domains
+  - power-domain-names
+
+allOf:
+  - $ref: /schemas/spi/spi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/dma/qcom-gpi.h>
+
+    spi@888000 {
+        compatible = "qcom,sa8255p-geni-spi";
+        reg = <0x888000 0x4000>;
+        interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
+        dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
+               <&gpi_dma0 1 0 QCOM_GPI_SPI>;
+        dma-names = "tx", "rx";
+        power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>;
+        power-domain-names = "power", "perf";
+    };

Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index 7f69819..1e70c68 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -33,6 +33,17 @@ allOf:
     else:
       properties:
         amd,pensando-elba-syscon: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: starfive,jhb100-sfc
+    then:
+      required:
+        - starfive,sfc-filter-syscon
+    else:
+      properties:
+        starfive,sfc-filter-syscon: false
 
 properties:
   compatible:
@@ -72,6 +83,8 @@ properties:
         const: amd,pensando-elba-spi
       - description: Canaan Kendryte K210 SoS SPI Controller
         const: canaan,k210-spi
+      - description: StarFive JHB100 SoC SPI Flash Controller
+        const: starfive,jhb100-sfc
       - description: Renesas RZ/N1 SPI Controller
         items:
           - const: renesas,r9a06g032-spi # RZ/N1D
@@ -146,6 +159,15 @@ properties:
       Block address to control SPI chip-selects. The Elba SoC system controller
       provides an interface to override the native DWC SSI CS control.
 
+  starfive,sfc-filter-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description:
+      Phandle to the system controller register that controls the SPI NOR flash
+      address mode filter. This system controller interface provides additional
+      configuration to switch between 3-byte and 4-byte addressing modes, which
+      is required when accessing SPI NOR flash devices with different address
+      width requirements.
+
 patternProperties:
   "@[0-9a-f]$":
     type: object

Documentation/devicetree/bindings/spi/spi-cadence.yaml

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diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
index 347bed0..429cd82 100644
--- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
@@ -43,7 +43,6 @@ properties:
       Number of chip selects used. If a decoder is used,
       this will be the number of chip selects after the
       decoder.
-    $ref: /schemas/types.yaml#/definitions/uint32
     minimum: 1
     maximum: 4
     default: 4

Documentation/devicetree/bindings/spi/spi-octeon.txt

View before deletion

diff --git a/Documentation/devicetree/bindings/spi/spi-octeon.txt b/Documentation/devicetree/bindings/spi/spi-octeon.txt
deleted file mode 100644
index 431add1..0000000
--- a/Documentation/devicetree/bindings/spi/spi-octeon.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-Cavium, Inc. OCTEON SOC SPI master controller.
-
-Required properties:
-- compatible : "cavium,octeon-3010-spi"
-- reg : The register base for the controller.
-- interrupts : One interrupt, used by the controller.
-- #address-cells : <1>, as required by generic SPI binding.
-- #size-cells : <0>, also as required by generic SPI binding.
-
-Child nodes as per the generic SPI binding.
-
-Example:
-
-	spi@1070000001000 {
-		compatible = "cavium,octeon-3010-spi";
-		reg = <0x10700 0x00001000 0x0 0x100>;
-		interrupts = <0 58>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		eeprom@0 {
-			compatible = "st,m95256", "atmel,at25";
-			reg = <0>;
-			spi-max-frequency = <5000000>;
-			spi-cpha;
-			spi-cpol;
-
-			pagesize = <64>;
-			size = <32768>;
-			address-width = <16>;
-		};
-	};
-

Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml

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diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
index 3f1a27e..ee57739 100644
--- a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
+++ b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
@@ -50,6 +50,9 @@ properties:
     minItems: 1
     maxItems: 2
 
+  power-domains:
+    maxItems: 1
+
 required:
   - compatible
   - reg

Documentation/spi/index.rst

View file

diff --git a/Documentation/spi/index.rst b/Documentation/spi/index.rst
index ac0c223..3f723e2 100644
--- a/Documentation/spi/index.rst
+++ b/Documentation/spi/index.rst
@@ -8,6 +8,7 @@ Serial Peripheral Interface (SPI)
    :maxdepth: 1
 
    spi-summary
+   instantiating-devices
    spidev
    multiple-data-lanes
    butterfly

Documentation/spi/instantiating-devices.rst

View file

diff --git a/Documentation/spi/instantiating-devices.rst b/Documentation/spi/instantiating-devices.rst
new file mode 100644
index 0000000..ec07353
--- /dev/null
+++ b/Documentation/spi/instantiating-devices.rst
@@ -0,0 +1,88 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+==============================
+How to instantiate SPI devices
+==============================
+
+SPI devices are normally declared statically via device-tree, ACPI, or
+board files. When the SPI controller is registered, these devices are
+instantiated automatically by the SPI core. This is the preferred method
+for any device with a proper kernel driver.
+
+Instantiate from user-space
+---------------------------
+
+In certain cases a SPI device cannot be declared statically:
+
+* The ``spidev`` driver, which provides raw userspace access to SPI
+  buses, explicitly rejects the bare ``"spidev"`` compatible string in
+  device-tree because spidev is a Linux implementation detail, not a
+  hardware description. Vendor-specific compatible strings for spidev
+  (e.g. ``"vendor,board-spidev"``) are also generally not accepted
+  upstream. Device-tree overlays do not help here either, since the
+  spidev driver performs the same compatible check regardless of how
+  the DT node was loaded.
+
+* You are developing or testing a SPI device on a development board
+  where the SPI bus is exposed on expansion headers, and the connected
+  device may change frequently.
+
+For these cases, a sysfs interface is provided on each SPI host controller
+(similar to the I2C ``new_device``/``delete_device`` interface described
+in Documentation/i2c/instantiating-devices.rst). Two write-only
+attribute files are created in every SPI host controller directory:
+``new_device`` and ``delete_device``.
+
+File ``new_device`` takes 2 to 4 parameters: the name of the SPI
+device (a string), the chip select number, and optionally
+``max_speed_hz`` and ``mode``::
+
+  <modalias> <chip_select> [<max_speed_hz> [<mode>]]
+
+The modalias is set both as the device's ``modalias`` field and as its
+``driver_override``. This ensures that the device binds to the named
+driver directly, bypassing the normal bus matching logic (OF, ACPI,
+and ``id_table``). This is necessary because drivers like ``spidev``
+deliberately exclude generic names from their ``id_table``.
+
+If ``max_speed_hz`` is omitted or 0, ``spi_setup()`` clamps it to
+the controller's maximum speed. If ``mode`` is omitted, SPI mode 0
+(CPOL=0, CPHA=0) is used.
+
+File ``delete_device`` takes a single parameter: the chip select
+number. As no two devices can share a chip select on a given SPI bus,
+the chip select is sufficient to uniquely identify the device.
+
+Examples::
+
+  # Create a spidev device on SPI bus 0, chip select 0
+  echo spidev 0 > /sys/class/spi_master/spi0/new_device
+
+  # Create with explicit clock rate and SPI mode
+  echo spidev 0 10000000 3 > /sys/class/spi_master/spi0/new_device
+
+  # Remove the device
+  echo 0 > /sys/class/spi_master/spi0/delete_device
+
+The attributes are added after the host controller and its firmware-described
+devices have been registered. Their addition emits a ``change`` uevent,
+allowing a udev rule to write to ``new_device`` when the interface is ready.
+
+Limitations
+^^^^^^^^^^^
+
+Devices created through this interface have the following limitations
+compared to devices declared via device-tree:
+
+* No interrupt (IRQ) support.
+* No additional properties such as ``spi-max-frequency`` DT bindings
+  or controller-specific configuration.
+* No platform data or software nodes.
+
+For ``spidev`` usage these limitations are not relevant, since spidev
+provides a raw byte-level interface that does not require any of these
+features.
+
+Only devices created via ``new_device`` can be removed through
+``delete_device``. Devices declared via device-tree, ACPI, or board
+files are not affected by this interface.

drivers/soc/qcom/qcom-geni-se.c

View file

diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
index 107fa20..873bfbd 100644
--- a/drivers/soc/qcom/qcom-geni-se.c
+++ b/drivers/soc/qcom/qcom-geni-se.c
@@ -7,6 +7,11 @@
 /* Disable MMIO tracing to prevent excessive logging of unwanted MMIO traces */
 #define __DISABLE_TRACE_MMIO__
 
+#define CREATE_TRACE_POINTS
+#include <trace/events/qcom_geni_se.h>
+
+EXPORT_TRACEPOINT_SYMBOL_GPL(geni_se_regs);
+
 #include <linux/acpi.h>
 #include <linux/bitfield.h>
 #include <linux/clk.h>

drivers/spi/.kunitconfig

View file

diff --git a/drivers/spi/.kunitconfig b/drivers/spi/.kunitconfig
new file mode 100644
index 0000000..07fa092
--- /dev/null
+++ b/drivers/spi/.kunitconfig
@@ -0,0 +1,4 @@
+CONFIG_KUNIT=y
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_DMA_KUNIT_TEST=y

drivers/spi/Kconfig

View file

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8782514..a0f37e2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -189,7 +189,7 @@ config SPI_AT91_USART
 
 config SPI_ATMEL_QUADSPI
 	tristate "Atmel Quad SPI Controller"
-	depends on ARCH_AT91 || COMPILE_TEST
+	depends on ARCH_MICROCHIP || COMPILE_TEST
 	depends on OF && HAS_IOMEM
 	help
 	  This enables support for the Quad SPI controller in master mode.

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