Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux

3c2e81ef · Linus Torvalds <[email protected]> · 2012-12-17 08:26:17 -08:00

Pull DRM updates from Dave Airlie:
 "This is the one and only next pull for 3.8, we had a regression we
  found last week, so I was waiting for that to resolve itself, and I
  ended up with some Intel fixes on top as well.

  Highlights:
   - new driver: nvidia tegra 20/30/hdmi support
   - radeon: add support for previously unused DMA engines, more HDMI
     regs, eviction speeds ups and fixes
   - i915: HSW support enable, agp removal on GEN6, seqno wrapping
   - exynos: IPP subsystem support (image post proc), HDMI
   - nouveau: display class reworking, nv20->40 z compression
   - ttm: start of locking fixes, rcu usage for lookups,
   - core: documentation updates, docbook integration, monotonic clock
     usage, move from connector to object properties"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (590 commits)
  drm/exynos: add gsc ipp driver
  drm/exynos: add rotator ipp driver
  drm/exynos: add fimc ipp driver
  drm/exynos: add iommu support for ipp
  drm/exynos: add ipp subsystem
  drm/exynos: support device tree for fimd
  radeon: fix regression with eviction since evict caching changes
  drm/radeon: add more pedantic checks in the CP DMA checker
  drm/radeon: bump version for CS ioctl support for async DMA
  drm/radeon: enable the async DMA rings in the CS ioctl
  drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI
  drm/radeon/kms: add evergreen/cayman CS parser for async DMA (v2)
  drm/radeon/kms: add 6xx/7xx CS parser for async DMA (v2)
  drm/radeon: fix htile buffer size computation for command stream checker
  drm/radeon: fix fence locking in the pageflip callback
  drm/radeon: make indirect register access concurrency-safe
  drm/radeon: add W|RREG32_IDX for MM_INDEX|DATA based mmio accesss
  drm/exynos: support extended screen coordinate of fimd
  drm/exynos: fix x, y coordinates for right bottom pixel
  drm/exynos: fix fb offset calculation for plane
  ...

Commit: 3c2e81ef344a90bb0a39d84af6878b4aeff568a2
Parents: 221392c3 · 55bde6b1

Merge commit. Changes below are compared with the first parent: 221392c3.

Changes

364 files changed · +39036 −14981

File	Status	Add	Del	Content
Documentation/DMA-attributes.txt	modified	+9	−0	View file
Documentation/DocBook/drm.tmpl	modified	+22	−17	View file
Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt	added	+191	−0	View file
Documentation/kref.txt	modified	+88	−0	View file
MAINTAINERS	modified	+9	−0	View file
arch/arm/mm/dma-mapping.c	modified	+33	−8	View file
drivers/char/agp/intel-agp.h	modified	+0	−91	View file
drivers/char/agp/intel-gtt.c	modified	+12	−308	View file
drivers/gpu/drm/Kconfig	modified	+2	−0	View file
drivers/gpu/drm/Makefile	modified	+4	−2	View file
drivers/gpu/drm/ast/ast_ttm.c	modified	+6	−6	View file
drivers/gpu/drm/cirrus/cirrus_drv.c	modified	+11	−2	View file
drivers/gpu/drm/cirrus/cirrus_ttm.c	modified	+6	−6	View file
drivers/gpu/drm/drm_crtc.c	modified	+31	−32	View file
drivers/gpu/drm/drm_crtc_helper.c	modified	+116	−45	View file
drivers/gpu/drm/drm_dp_i2c_helper.c → drivers/gpu/drm/drm_dp_helper.c	renamed	+143	−3	View file
drivers/gpu/drm/drm_edid.c	modified	+42	−6	View file
drivers/gpu/drm/drm_fb_helper.c	modified	+49	−27	View file
drivers/gpu/drm/drm_hashtab.c	modified	+26	−12	View file
drivers/gpu/drm/drm_ioctl.c	modified	+3	−0	View file
drivers/gpu/drm/drm_irq.c	modified	+89	−31	View file
drivers/gpu/drm/drm_modes.c	modified	+4	−4	View file
drivers/gpu/drm/drm_pci.c	modified	+1	−1	View file
drivers/gpu/drm/drm_stub.c	modified	+21	−16	View file
drivers/gpu/drm/drm_sysfs.c	modified	+3	−3	View file
drivers/gpu/drm/exynos/Kconfig	modified	+30	−0	View file
drivers/gpu/drm/exynos/Makefile	modified	+5	−0	View file
drivers/gpu/drm/exynos/exynos_ddc.c	modified	+3	−1	View file
drivers/gpu/drm/exynos/exynos_drm_buf.c	modified	+38	−77	View file
drivers/gpu/drm/exynos/exynos_drm_buf.h	modified	+2	−2	View file
drivers/gpu/drm/exynos/exynos_drm_crtc.c	modified	+5	−0	View file
drivers/gpu/drm/exynos/exynos_drm_dmabuf.c	modified	+86	−64	View file
drivers/gpu/drm/exynos/exynos_drm_drv.c	modified	+113	−4	View file
drivers/gpu/drm/exynos/exynos_drm_drv.h	modified	+36	−7	View file
drivers/gpu/drm/exynos/exynos_drm_encoder.c	modified	+26	−10	View file
drivers/gpu/drm/exynos/exynos_drm_encoder.h	modified	+1	−0	View file
drivers/gpu/drm/exynos/exynos_drm_fb.c	modified	+79	−15	View file
drivers/gpu/drm/exynos/exynos_drm_fbdev.c	modified	+65	−9	View file
drivers/gpu/drm/exynos/exynos_drm_fimc.c	added	+2001	−0	View file
drivers/gpu/drm/exynos/exynos_drm_fimc.h	added	+37	−0	View file
drivers/gpu/drm/exynos/exynos_drm_fimd.c	modified	+128	−72	View file
drivers/gpu/drm/exynos/exynos_drm_g2d.c	modified	+419	−76	View file
drivers/gpu/drm/exynos/exynos_drm_gem.c	modified	+219	−216	View file
drivers/gpu/drm/exynos/exynos_drm_gem.h	modified	+51	−7	View file
drivers/gpu/drm/exynos/exynos_drm_gsc.c	added	+1870	−0	View file
drivers/gpu/drm/exynos/exynos_drm_gsc.h	added	+38	−0	View file
drivers/gpu/drm/exynos/exynos_drm_hdmi.c	modified	+48	−11	View file
drivers/gpu/drm/exynos/exynos_drm_hdmi.h	modified	+2	−1	View file
drivers/gpu/drm/exynos/exynos_drm_iommu.c	added	+150	−0	View file
drivers/gpu/drm/exynos/exynos_drm_iommu.h	added	+85	−0	View file
drivers/gpu/drm/exynos/exynos_drm_ipp.c	added	+2060	−0	View file
drivers/gpu/drm/exynos/exynos_drm_ipp.h	added	+266	−0	View file
drivers/gpu/drm/exynos/exynos_drm_plane.c	modified	+3	−9	View file
drivers/gpu/drm/exynos/exynos_drm_rotator.c	added	+855	−0	View file
drivers/gpu/drm/exynos/exynos_drm_rotator.h	added	+33	−0	View file
drivers/gpu/drm/exynos/exynos_drm_vidi.c	modified	+2	−24	View file
drivers/gpu/drm/exynos/exynos_hdmi.c	modified	+248	−76	View file
drivers/gpu/drm/exynos/exynos_hdmiphy.c	modified	+3	−1	View file
drivers/gpu/drm/exynos/exynos_mixer.c	modified	+237	−139	View file
drivers/gpu/drm/exynos/regs-fimc.h	added	+669	−0	View file
drivers/gpu/drm/exynos/regs-gsc.h	added	+284	−0	View file
drivers/gpu/drm/exynos/regs-hdmi.h	modified	+20	−2	View file
drivers/gpu/drm/exynos/regs-rotator.h	added	+73	−0	View file
drivers/gpu/drm/gma500/cdv_device.c	modified	+2	−2	View file
drivers/gpu/drm/gma500/cdv_intel_dp.c	modified	+1	−1	View file
drivers/gpu/drm/gma500/cdv_intel_hdmi.c	modified	+3	−3	View file
drivers/gpu/drm/gma500/cdv_intel_lvds.c	modified	+5	−5	View file
drivers/gpu/drm/gma500/mdfld_dsi_output.c	modified	+6	−6	View file
drivers/gpu/drm/gma500/mdfld_intel_display.c	modified	+1	−1	View file
drivers/gpu/drm/gma500/oaktrail.h	modified	+6	−0	View file
drivers/gpu/drm/gma500/oaktrail_crtc.c	modified	+9	−1	View file
drivers/gpu/drm/gma500/oaktrail_device.c	modified	+1	−1	View file
drivers/gpu/drm/gma500/oaktrail_hdmi.c	modified	+350	−15	View file
drivers/gpu/drm/gma500/oaktrail_lvds.c	modified	+4	−4	View file
drivers/gpu/drm/gma500/psb_intel_lvds.c	modified	+5	−5	View file
drivers/gpu/drm/gma500/psb_intel_sdvo.c	modified	+12	−12	View file
drivers/gpu/drm/i2c/ch7006_drv.c	modified	+10	−10	View file
drivers/gpu/drm/i915/i915_debugfs.c	modified	+36	−30	View file
drivers/gpu/drm/i915/i915_dma.c	modified	+29	−66	View file
drivers/gpu/drm/i915/i915_drv.c	modified	+110	−26	View file
drivers/gpu/drm/i915/i915_drv.h	modified	+270	−202	View file
drivers/gpu/drm/i915/i915_gem.c	modified	+133	−159	View file
drivers/gpu/drm/i915/i915_gem_context.c	modified	+2	−3	View file
drivers/gpu/drm/i915/i915_gem_execbuffer.c	modified	+28	−36	View file
drivers/gpu/drm/i915/i915_gem_gtt.c	modified	+367	−53	View file
drivers/gpu/drm/i915/i915_irq.c	modified	+40	−46	View file
drivers/gpu/drm/i915/i915_reg.h	modified	+203	−105	View file
drivers/gpu/drm/i915/i915_suspend.c	modified	+383	−380	View file
drivers/gpu/drm/i915/i915_sysfs.c	modified	+16	−29	View file
drivers/gpu/drm/i915/i915_trace.h	modified	+6	−4	View file
drivers/gpu/drm/i915/intel_bios.c	modified	+2	−1	View file
drivers/gpu/drm/i915/intel_crt.c	modified	+44	−18	View file
drivers/gpu/drm/i915/intel_ddi.c	modified	+893	−198	View file
drivers/gpu/drm/i915/intel_display.c	modified	+1497	−532	View file
drivers/gpu/drm/i915/intel_dp.c	modified	+587	−374	View file
drivers/gpu/drm/i915/intel_drv.h	modified	+107	−16	View file
drivers/gpu/drm/i915/intel_hdmi.c	modified	+75	−60	View file
drivers/gpu/drm/i915/intel_i2c.c	modified	+6	−3	View file
drivers/gpu/drm/i915/intel_lvds.c	modified	+124	−103	View file
drivers/gpu/drm/i915/intel_modes.c	modified	+7	−4	View file
drivers/gpu/drm/i915/intel_opregion.c	modified	+2	−0	View file
drivers/gpu/drm/i915/intel_panel.c	modified	+49	−41	View file
drivers/gpu/drm/i915/intel_pm.c	modified	+331	−180	View file
drivers/gpu/drm/i915/intel_ringbuffer.c	modified	+171	−79	View file
drivers/gpu/drm/i915/intel_ringbuffer.h	modified	+24	−12	View file
drivers/gpu/drm/i915/intel_sdvo.c	modified	+89	−39	View file
drivers/gpu/drm/i915/intel_sprite.c	modified	+62	−39	View file
drivers/gpu/drm/i915/intel_tv.c	modified	+9	−12	View file
drivers/gpu/drm/mgag200/mgag200_main.c	modified	+3	−1	View file
drivers/gpu/drm/mgag200/mgag200_ttm.c	modified	+6	−6	View file
drivers/gpu/drm/nouveau/Makefile	modified	+34	−4	View file
drivers/gpu/drm/nouveau/core/core/engctx.c	modified	+15	−0	View file
drivers/gpu/drm/nouveau/core/core/falcon.c	added	+247	−0	View file
drivers/gpu/drm/nouveau/core/core/gpuobj.c	modified	+2	−2	View file
drivers/gpu/drm/nouveau/core/core/mm.c	modified	+10	−7	View file
drivers/gpu/drm/nouveau/core/engine/bsp/nv84.c	modified	+13	−95	View file
drivers/gpu/drm/nouveau/core/engine/bsp/nvc0.c	added	+110	−0	View file
drivers/gpu/drm/nouveau/core/engine/bsp/nve0.c	added	+110	−0	View file
drivers/gpu/drm/nouveau/core/engine/copy/nva3.c	modified	+32	−92	View file
drivers/gpu/drm/nouveau/core/engine/copy/nvc0.c	modified	+40	−127	View file
drivers/gpu/drm/nouveau/core/engine/copy/nve0.c	modified	+17	−37	View file
drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c	modified	+12	−34	View file
drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c	modified	+19	−64	View file
drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c	added	+88	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c	added	+48	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c	added	+53	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c	added	+66	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c	added	+66	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c	added	+62	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/nv50.c	modified	+1132	−12	View file
drivers/gpu/drm/nouveau/core/engine/disp/nv50.h	added	+142	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/nv84.c	added	+98	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/nv94.c	added	+109	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/nva0.c	added	+88	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/nva3.c	added	+111	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c	modified	+871	−13	View file
drivers/gpu/drm/nouveau/core/engine/disp/nve0.c	added	+94	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/sornv50.c	added	+112	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/sornv94.c	added	+190	−0	View file
drivers/gpu/drm/nouveau/core/engine/disp/sornvd0.c	added	+126	−0	View file
drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c	modified	+52	−19	View file
drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c	modified	+13	−55	View file
drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c	modified	+57	−69	View file
drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c	modified	+74	−30	View file
drivers/gpu/drm/nouveau/core/engine/dmaobj/nvd0.c	added	+122	−0	View file
drivers/gpu/drm/nouveau/core/engine/fifo/base.c	modified	+9	−10	View file
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c	modified	+8	−9	View file
drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c	modified	+3	−3	View file
drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c	modified	+4	−4	View file
drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c	modified	+4	−4	View file
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c	modified	+19	−17	View file
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c	modified	+30	−30	View file
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c	modified	+17	−9	View file
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c	modified	+13	−8	View file
drivers/gpu/drm/nouveau/core/engine/graph/nv04.c	modified	+92	−92	View file
drivers/gpu/drm/nouveau/core/engine/graph/nv10.c	modified	+5	−5	View file
drivers/gpu/drm/nouveau/core/engine/graph/nv20.c	modified	+3	−3	View file
drivers/gpu/drm/nouveau/core/engine/graph/nv40.c	modified	+33	−5	View file
drivers/gpu/drm/nouveau/core/engine/graph/nv50.c	modified	+75	−8	View file
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c	modified	+1	−1	View file
drivers/gpu/drm/nouveau/core/engine/graph/regs.h	modified	+5	−0	View file
drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c	modified	+3	−3	View file
drivers/gpu/drm/nouveau/core/engine/mpeg/nv50.c	modified	+0	−1	View file
drivers/gpu/drm/nouveau/core/engine/ppp/nv98.c	modified	+15	−92	View file
drivers/gpu/drm/nouveau/core/engine/ppp/nvc0.c	added	+110	−0	View file
drivers/gpu/drm/nouveau/core/engine/software/nv04.c	modified	+2	−2	View file
drivers/gpu/drm/nouveau/core/engine/software/nv10.c	modified	+1	−1	View file
drivers/gpu/drm/nouveau/core/engine/software/nv50.c	modified	+5	−5	View file
drivers/gpu/drm/nouveau/core/engine/software/nvc0.c	modified	+5	−5	View file
drivers/gpu/drm/nouveau/core/engine/vp/nv84.c	modified	+13	−95	View file
drivers/gpu/drm/nouveau/core/engine/vp/nvc0.c	added	+110	−0	View file
drivers/gpu/drm/nouveau/core/engine/vp/nve0.c	added	+110	−0	View file
drivers/gpu/drm/nouveau/core/include/core/class.h	modified	+225	−0	View file
drivers/gpu/drm/nouveau/core/include/core/engctx.h	modified	+3	−0	View file
drivers/gpu/drm/nouveau/core/include/core/falcon.h	added	+81	−0	View file
drivers/gpu/drm/nouveau/core/include/core/gpuobj.h	modified	+2	−2	View file
drivers/gpu/drm/nouveau/core/include/core/mm.h	modified	+6	−0	View file
drivers/gpu/drm/nouveau/core/include/core/object.h	modified	+24	−17	View file
drivers/gpu/drm/nouveau/core/include/core/parent.h	modified	+1	−1	View file
drivers/gpu/drm/nouveau/core/include/engine/bsp.h	modified	+2	−39	View file
drivers/gpu/drm/nouveau/core/include/engine/copy.h	modified	+1	−38	View file
drivers/gpu/drm/nouveau/core/include/engine/crypt.h	modified	+0	−39	View file
drivers/gpu/drm/nouveau/core/include/engine/disp.h	modified	+5	−0	View file
drivers/gpu/drm/nouveau/core/include/engine/dmaobj.h	modified	+10	−19	View file
drivers/gpu/drm/nouveau/core/include/engine/fifo.h	modified	+3	−3	View file
drivers/gpu/drm/nouveau/core/include/engine/ppp.h	modified	+1	−39	View file
drivers/gpu/drm/nouveau/core/include/engine/vp.h	modified	+2	−39	View file
drivers/gpu/drm/nouveau/core/include/subdev/bios/dcb.h	modified	+5	−29	View file
drivers/gpu/drm/nouveau/core/include/subdev/bios/disp.h	added	+48	−0	View file
drivers/gpu/drm/nouveau/core/include/subdev/bios/dp.h	modified	+29	−3	View file
drivers/gpu/drm/nouveau/core/include/subdev/fb.h	modified	+40	−3	View file
drivers/gpu/drm/nouveau/core/subdev/bar/base.c	modified	+2	−2	View file
drivers/gpu/drm/nouveau/core/subdev/bios/base.c	modified	+20	−12	View file
drivers/gpu/drm/nouveau/core/subdev/bios/dcb.c	modified	+63	−0	View file
drivers/gpu/drm/nouveau/core/subdev/bios/disp.c	added	+178	−0	View file
drivers/gpu/drm/nouveau/core/subdev/bios/dp.c	modified	+155	−27	View file
drivers/gpu/drm/nouveau/core/subdev/bios/gpio.c	modified	+2	−2	View file
drivers/gpu/drm/nouveau/core/subdev/bios/init.c	modified	+8	−5	View file
drivers/gpu/drm/nouveau/core/subdev/device/base.c	modified	+16	−12	View file
drivers/gpu/drm/nouveau/core/subdev/device/nv10.c	modified	+2	−2	View file
drivers/gpu/drm/nouveau/core/subdev/device/nv20.c	modified	+3	−3	View file
drivers/gpu/drm/nouveau/core/subdev/device/nv30.c	modified	+3	−3	View file
drivers/gpu/drm/nouveau/core/subdev/device/nv40.c	modified	+14	−14	View file
drivers/gpu/drm/nouveau/core/subdev/device/nv50.c	modified	+13	−13	View file
drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c	modified	+32	−32	View file
drivers/gpu/drm/nouveau/core/subdev/device/nve0.c	modified	+13	−4	View file
drivers/gpu/drm/nouveau/core/subdev/devinit/nv50.c	modified	+33	−1	View file
drivers/gpu/drm/nouveau/core/subdev/fb/base.c	modified	+51	−41	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv04.c	modified	+33	−29	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c	modified	+18	−34	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv1a.c	added	+89	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c	modified	+41	−45	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c	added	+81	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c	modified	+31	−20	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c	added	+82	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv36.c	added	+82	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c	modified	+33	−98	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c	added	+106	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c	added	+114	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c	added	+79	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv47.c	added	+66	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c	added	+84	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv4e.c	added	+72	−0	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c	modified	+197	−196	View file
drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c	modified	+61	−65	View file
drivers/gpu/drm/nouveau/core/subdev/i2c/aux.c	modified	+1	−1	View file
drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c	modified	+4	−4	View file
drivers/gpu/drm/nouveau/core/subdev/instmem/nv40.c	modified	+2	−2	View file
drivers/gpu/drm/nouveau/core/subdev/instmem/nv50.c	modified	+2	−2	View file
drivers/gpu/drm/nouveau/core/subdev/mc/base.c	modified	+4	−4	View file
drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c	modified	+1	−0	View file
drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c	modified	+1	−0	View file
drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c	modified	+1	−0	View file
drivers/gpu/drm/nouveau/nouveau_abi16.c	modified	+17	−10	View file
drivers/gpu/drm/nouveau/nouveau_acpi.c	modified	+18	−12	View file
drivers/gpu/drm/nouveau/nouveau_acpi.h	modified	+4	−0	View file
drivers/gpu/drm/nouveau/nouveau_bios.c	modified	+1	−234	View file
drivers/gpu/drm/nouveau/nouveau_bios.h	modified	+0	−9	View file
drivers/gpu/drm/nouveau/nouveau_bo.c	modified	+31	−34	View file
drivers/gpu/drm/nouveau/nouveau_bo.h	modified	+1	−1	View file
drivers/gpu/drm/nouveau/nouveau_chan.c	modified	+4	−2	View file
drivers/gpu/drm/nouveau/nouveau_connector.c	modified	+11	−14	View file
drivers/gpu/drm/nouveau/nouveau_connector.h	modified	+16	−0	View file
drivers/gpu/drm/nouveau/nouveau_crtc.h	modified	+0	−10	View file
drivers/gpu/drm/nouveau/nouveau_display.c	modified	+10	−15	View file
drivers/gpu/drm/nouveau/nouveau_dp.c	modified	+41	−100	View file
drivers/gpu/drm/nouveau/nouveau_drm.c	modified	+69	−29	View file
drivers/gpu/drm/nouveau/nouveau_drm.h	modified	+2	−2	View file
drivers/gpu/drm/nouveau/nouveau_encoder.h	modified	+1	−6	View file
drivers/gpu/drm/nouveau/nouveau_gem.c	modified	+1	−1	View file
drivers/gpu/drm/nouveau/nouveau_hdmi.c	deleted	+0	−261	View before deletion
drivers/gpu/drm/nouveau/nouveau_irq.c	modified	+0	−12	View file
drivers/gpu/drm/nouveau/nouveau_prime.c	modified	+0	−4	View file
drivers/gpu/drm/nouveau/nouveau_vga.c	modified	+2	−3	View file
drivers/gpu/drm/nouveau/nv04_crtc.c	modified	+5	−1	View file
drivers/gpu/drm/nouveau/nv04_display.c	modified	+0	−5	View file
drivers/gpu/drm/nouveau/nv10_fence.c	modified	+6	−1	View file
drivers/gpu/drm/nouveau/nv17_tv.c	modified	+8	−8	View file
drivers/gpu/drm/nouveau/nv50_crtc.c	deleted	+0	−764	View before deletion
drivers/gpu/drm/nouveau/nv50_cursor.c	deleted	+0	−136	View before deletion
drivers/gpu/drm/nouveau/nv50_dac.c	deleted	+0	−321	View before deletion
drivers/gpu/drm/nouveau/nv50_display.c	modified	+1834	−745	View file
drivers/gpu/drm/nouveau/nv50_display.h	modified	+5	−66	View file
drivers/gpu/drm/nouveau/nv50_evo.c	deleted	+0	−403	View before deletion
drivers/gpu/drm/nouveau/nv50_evo.h	deleted	+0	−120	View before deletion
drivers/gpu/drm/nouveau/nv50_fence.c	modified	+4	−1	View file
drivers/gpu/drm/nouveau/nv50_pm.c	modified	+1	−1	View file
drivers/gpu/drm/nouveau/nv50_sor.c	deleted	+0	−530	View before deletion
drivers/gpu/drm/nouveau/nvc0_fence.c	modified	+10	−18	View file
drivers/gpu/drm/nouveau/nvd0_display.c	deleted	+0	−2141	View before deletion
drivers/gpu/drm/radeon/atombios_crtc.c	modified	+2	−0	View file
drivers/gpu/drm/radeon/atombios_dp.c	modified	+19	−130	View file
drivers/gpu/drm/radeon/atombios_encoders.c	modified	+1	−1	View file
drivers/gpu/drm/radeon/evergreen.c	modified	+211	−7	View file
drivers/gpu/drm/radeon/evergreen_cs.c	modified	+736	−3	View file
drivers/gpu/drm/radeon/evergreend.h	modified	+131	−0	View file
drivers/gpu/drm/radeon/ni.c	modified	+332	−25	View file
drivers/gpu/drm/radeon/nid.h	modified	+86	−0	View file
drivers/gpu/drm/radeon/r100.c	modified	+18	−5	View file
drivers/gpu/drm/radeon/r600.c	modified	+471	−9	View file
drivers/gpu/drm/radeon/r600_cp.c	modified	+1	−6	View file
drivers/gpu/drm/radeon/r600_cs.c	modified	+284	−73	View file
drivers/gpu/drm/radeon/r600_reg.h	modified	+9	−0	View file
drivers/gpu/drm/radeon/r600d.h	modified	+85	−1	View file
drivers/gpu/drm/radeon/radeon.h	modified	+31	−7	View file
drivers/gpu/drm/radeon/radeon_asic.c	modified	+159	−39	View file
drivers/gpu/drm/radeon/radeon_asic.h	modified	+34	−0	View file
drivers/gpu/drm/radeon/radeon_combios.c	modified	+2	−4	View file
drivers/gpu/drm/radeon/radeon_connectors.c	modified	+31	−31	View file
drivers/gpu/drm/radeon/radeon_cp.c	modified	+0	−14	View file
drivers/gpu/drm/radeon/radeon_cs.c	modified	+13	−0	View file
drivers/gpu/drm/radeon/radeon_cursor.c	modified	+9	−8	View file
drivers/gpu/drm/radeon/radeon_device.c	modified	+1	−0	View file
drivers/gpu/drm/radeon/radeon_display.c	modified	+4	−0	View file
drivers/gpu/drm/radeon/radeon_drv.c	modified	+15	−3	View file
drivers/gpu/drm/radeon/radeon_drv.h	modified	+0	−1	View file
drivers/gpu/drm/radeon/radeon_fence.c	modified	+1	−1	View file
drivers/gpu/drm/radeon/radeon_gart.c	modified	+0	−1	View file
drivers/gpu/drm/radeon/radeon_kms.c	modified	+16	−0	View file
drivers/gpu/drm/radeon/radeon_mode.h	modified	+1	−1	View file
drivers/gpu/drm/radeon/radeon_object.c	modified	+30	−22	View file
drivers/gpu/drm/radeon/radeon_object.h	modified	+1	−1	View file
drivers/gpu/drm/radeon/radeon_test.c	modified	+33	−4	View file
drivers/gpu/drm/radeon/radeon_ttm.c	modified	+20	−20	View file
drivers/gpu/drm/radeon/rv515.c	modified	+106	−16	View file
drivers/gpu/drm/radeon/rv770.c	modified	+29	−2	View file
drivers/gpu/drm/radeon/rv770d.h	modified	+71	−0	View file
drivers/gpu/drm/radeon/si.c	modified	+326	−29	View file
drivers/gpu/drm/radeon/sid.h	modified	+119	−0	View file
drivers/gpu/drm/shmobile/shmob_drm_crtc.c	modified	+1	−1	View file
drivers/gpu/drm/tegra/Kconfig	added	+23	−0	View file
drivers/gpu/drm/tegra/Makefile	added	+7	−0	View file
drivers/gpu/drm/tegra/dc.c	added	+834	−0	View file
drivers/gpu/drm/tegra/dc.h	added	+388	−0	View file
drivers/gpu/drm/tegra/drm.c	added	+115	−0	View file
drivers/gpu/drm/tegra/drm.h	added	+234	−0	View file
drivers/gpu/drm/tegra/fb.c	added	+56	−0	View file
drivers/gpu/drm/tegra/hdmi.c	added	+1334	−0	View file
drivers/gpu/drm/tegra/hdmi.h	added	+575	−0	View file
drivers/gpu/drm/tegra/host1x.c	added	+325	−0	View file
drivers/gpu/drm/tegra/output.c	added	+272	−0	View file
drivers/gpu/drm/tegra/rgb.c	added	+228	−0	View file
drivers/gpu/drm/ttm/ttm_bo.c	modified	+142	−179	View file
drivers/gpu/drm/ttm/ttm_bo_util.c	modified	+3	−5	View file
drivers/gpu/drm/ttm/ttm_bo_vm.c	modified	+2	−2	View file
drivers/gpu/drm/ttm/ttm_execbuf_util.c	modified	+3	−7	View file
drivers/gpu/drm/ttm/ttm_memory.c	modified	+0	−1	View file
drivers/gpu/drm/ttm/ttm_object.c	modified	+26	−25	View file
drivers/gpu/drm/udl/udl_connector.c	modified	+8	−6	View file
drivers/gpu/drm/vmwgfx/Makefile	modified	+2	−1	View file
drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h	added	+909	−0	View file
drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c	modified	+9	−14	View file
drivers/gpu/drm/vmwgfx/vmwgfx_context.c	added	+274	−0	View file
drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c	modified	+10	−12	View file
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c	modified	+43	−49	View file
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h	modified	+101	−52	View file
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c	modified	+654	−263	View file
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c	modified	+1	−1	View file
drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c	modified	+5	−2	View file
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c	modified	+1	−1	View file
drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c	modified	+12	−9	View file
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c	modified	+710	−1403	View file
drivers/gpu/drm/vmwgfx/vmwgfx_resource_priv.h	added	+84	−0	View file
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c	modified	+2	−2	View file
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c	added	+893	−0	View file
drivers/gpu/vga/vga_switcheroo.c	modified	+0	−6	View file
include/drm/drmP.h	modified	+3	−0	View file
include/drm/drm_crtc.h	modified	+7	−12	View file
include/drm/drm_crtc_helper.h	modified	+3	−0	View file
include/drm/drm_dp_helper.h	modified	+39	−0	View file
include/drm/drm_hashtab.h	modified	+14	−0	View file
include/drm/exynos_drm.h	modified	+26	−0	View file
include/drm/intel-gtt.h	modified	+2	−5	View file
include/drm/ttm/ttm_bo_api.h	modified	+18	−15	View file
include/drm/ttm/ttm_bo_driver.h	modified	+10	−35	View file
include/drm/ttm/ttm_execbuf_util.h	modified	+0	−3	View file
include/drm/ttm/ttm_memory.h	modified	+0	−2	View file
include/drm/ttm/ttm_object.h	modified	+4	−0	View file
include/linux/dma-attrs.h	modified	+1	−0	View file
include/linux/kref.h	modified	+21	−0	View file
include/uapi/drm/drm.h	modified	+1	−0	View file
include/uapi/drm/exynos_drm.h	modified	+201	−2	View file
include/uapi/drm/i915_drm.h	modified	+6	−0	View file
include/uapi/drm/radeon_drm.h	modified	+6	−0	View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/DMA-attributes.txt

View file

diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
index f503090..e59480d 100644
--- a/Documentation/DMA-attributes.txt
+++ b/Documentation/DMA-attributes.txt
@@ -91,3 +91,12 @@ transferred to 'device' domain. This attribute can be also used for
 dma_unmap_{single,page,sg} functions family to force buffer to stay in
 device domain after releasing a mapping for it. Use this attribute with
 care!
+
+DMA_ATTR_FORCE_CONTIGUOUS
+-------------------------
+
+By default DMA-mapping subsystem is allowed to assemble the buffer
+allocated by dma_alloc_attrs() function from individual pages if it can
+be mapped as contiguous chunk into device dma address space. By
+specifing this attribute the allocated buffer is forced to be contiguous
+also in physical memory.

Documentation/DocBook/drm.tmpl

View file

diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index b030052..4ee2304 100644
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -1141,23 +1141,13 @@ int max_width, max_height;</synopsis>
             the <methodname>page_flip</methodname> operation will be called with a
             non-NULL <parameter>event</parameter> argument pointing to a
             <structname>drm_pending_vblank_event</structname> instance. Upon page
-            flip completion the driver must fill the
-            <parameter>event</parameter>::<structfield>event</structfield>
-            <structfield>sequence</structfield>, <structfield>tv_sec</structfield>
-            and <structfield>tv_usec</structfield> fields with the associated
-            vertical blanking count and timestamp, add the event to the
-            <parameter>drm_file</parameter> list of events to be signaled, and wake
-            up any waiting process. This can be performed with
+            flip completion the driver must call <methodname>drm_send_vblank_event</methodname>
+            to fill in the event and send to wake up any waiting processes.
+            This can be performed with
             <programlisting><![CDATA[
-            struct timeval now;
-
-            event->event.sequence = drm_vblank_count_and_time(..., &now);
-            event->event.tv_sec = now.tv_sec;
-            event->event.tv_usec = now.tv_usec;
-
             spin_lock_irqsave(&dev->event_lock, flags);
-            list_add_tail(&event->base.link, &event->base.file_priv->event_list);
-            wake_up_interruptible(&event->base.file_priv->event_wait);
+            ...
+            drm_send_vblank_event(dev, pipe, event);
             spin_unlock_irqrestore(&dev->event_lock, flags);
             ]]></programlisting>
           </para>
@@ -1621,10 +1611,10 @@ void intel_crt_init(struct drm_device *dev)
     </sect2>
   </sect1>
 
-  <!-- Internals: mid-layer helper functions -->
+  <!-- Internals: kms helper functions -->
 
   <sect1>
-    <title>Mid-layer Helper Functions</title>
+    <title>Mode Setting Helper Functions</title>
     <para>
       The CRTC, encoder and connector functions provided by the drivers
       implement the DRM API. They're called by the DRM core and ioctl handlers
@@ -2106,6 +2096,21 @@ void intel_crt_init(struct drm_device *dev)
         </listitem>
       </itemizedlist>
     </sect2>
+    <sect2>
+      <title>Modeset Helper Functions Reference</title>
+!Edrivers/gpu/drm/drm_crtc_helper.c
+    </sect2>
+    <sect2>
+      <title>fbdev Helper Functions Reference</title>
+!Pdrivers/gpu/drm/drm_fb_helper.c fbdev helpers
+!Edrivers/gpu/drm/drm_fb_helper.c
+    </sect2>
+    <sect2>
+      <title>Display Port Helper Functions Reference</title>
+!Pdrivers/gpu/drm/drm_dp_helper.c dp helpers
+!Iinclude/drm/drm_dp_helper.h
+!Edrivers/gpu/drm/drm_dp_helper.c
+    </sect2>
   </sect1>
 
   <!-- Internals: vertical blanking -->

Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt

View file

diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
new file mode 100644
index 0000000..b4fa934
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -0,0 +1,191 @@
+NVIDIA Tegra host1x
+
+Required properties:
+- compatible: "nvidia,tegra<chip>-host1x"
+- reg: Physical base address and length of the controller's registers.
+- interrupts: The interrupt outputs from the controller.
+- #address-cells: The number of cells used to represent physical base addresses
+  in the host1x address space. Should be 1.
+- #size-cells: The number of cells used to represent the size of an address
+  range in the host1x address space. Should be 1.
+- ranges: The mapping of the host1x address space to the CPU address space.
+
+The host1x top-level node defines a number of children, each representing one
+of the following host1x client modules:
+
+- mpe: video encoder
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-mpe"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+
+- vi: video input
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-vi"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+
+- epp: encoder pre-processor
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-epp"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+
+- isp: image signal processor
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-isp"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+
+- gr2d: 2D graphics engine
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-gr2d"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+
+- gr3d: 3D graphics engine
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-gr3d"
+  - reg: Physical base address and length of the controller's registers.
+
+- dc: display controller
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-dc"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+
+  Each display controller node has a child node, named "rgb", that represents
+  the RGB output associated with the controller. It can take the following
+  optional properties:
+  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
+  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
+  - nvidia,edid: supplies a binary EDID blob
+
+- hdmi: High Definition Multimedia Interface
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-hdmi"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - vdd-supply: regulator for supply voltage
+  - pll-supply: regulator for PLL
+
+  Optional properties:
+  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
+  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
+  - nvidia,edid: supplies a binary EDID blob
+
+- tvo: TV encoder output
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-tvo"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+
+- dsi: display serial interface
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-dsi"
+  - reg: Physical base address and length of the controller's registers.
+
+Example:
+
+/ {
+	...
+
+	host1x {
+		compatible = "nvidia,tegra20-host1x", "simple-bus";
+		reg = <0x50000000 0x00024000>;
+		interrupts = <0 65 0x04   /* mpcore syncpt */
+			      0 67 0x04>; /* mpcore general */
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ranges = <0x54000000 0x54000000 0x04000000>;
+
+		mpe {
+			compatible = "nvidia,tegra20-mpe";
+			reg = <0x54040000 0x00040000>;
+			interrupts = <0 68 0x04>;
+		};
+
+		vi {
+			compatible = "nvidia,tegra20-vi";
+			reg = <0x54080000 0x00040000>;
+			interrupts = <0 69 0x04>;
+		};
+
+		epp {
+			compatible = "nvidia,tegra20-epp";
+			reg = <0x540c0000 0x00040000>;
+			interrupts = <0 70 0x04>;
+		};
+
+		isp {
+			compatible = "nvidia,tegra20-isp";
+			reg = <0x54100000 0x00040000>;
+			interrupts = <0 71 0x04>;
+		};
+
+		gr2d {
+			compatible = "nvidia,tegra20-gr2d";
+			reg = <0x54140000 0x00040000>;
+			interrupts = <0 72 0x04>;
+		};
+
+		gr3d {
+			compatible = "nvidia,tegra20-gr3d";
+			reg = <0x54180000 0x00040000>;
+		};
+
+		dc@54200000 {
+			compatible = "nvidia,tegra20-dc";
+			reg = <0x54200000 0x00040000>;
+			interrupts = <0 73 0x04>;
+
+			rgb {
+				status = "disabled";
+			};
+		};
+
+		dc@54240000 {
+			compatible = "nvidia,tegra20-dc";
+			reg = <0x54240000 0x00040000>;
+			interrupts = <0 74 0x04>;
+
+			rgb {
+				status = "disabled";
+			};
+		};
+
+		hdmi {
+			compatible = "nvidia,tegra20-hdmi";
+			reg = <0x54280000 0x00040000>;
+			interrupts = <0 75 0x04>;
+			status = "disabled";
+		};
+
+		tvo {
+			compatible = "nvidia,tegra20-tvo";
+			reg = <0x542c0000 0x00040000>;
+			interrupts = <0 76 0x04>;
+			status = "disabled";
+		};
+
+		dsi {
+			compatible = "nvidia,tegra20-dsi";
+			reg = <0x54300000 0x00040000>;
+			status = "disabled";
+		};
+	};
+
+	...
+};

Documentation/kref.txt

View file

diff --git a/Documentation/kref.txt b/Documentation/kref.txt
index 48ba715..ddf85a5 100644
--- a/Documentation/kref.txt
+++ b/Documentation/kref.txt
@@ -213,3 +213,91 @@ presentation on krefs, which can be found at:
 and:
   http://www.kroah.com/linux/talks/ols_2004_kref_talk/
 
+
+The above example could also be optimized using kref_get_unless_zero() in
+the following way:
+
+static struct my_data *get_entry()
+{
+	struct my_data *entry = NULL;
+	mutex_lock(&mutex);
+	if (!list_empty(&q)) {
+		entry = container_of(q.next, struct my_data, link);
+		if (!kref_get_unless_zero(&entry->refcount))
+			entry = NULL;
+	}
+	mutex_unlock(&mutex);
+	return entry;
+}
+
+static void release_entry(struct kref *ref)
+{
+	struct my_data *entry = container_of(ref, struct my_data, refcount);
+
+	mutex_lock(&mutex);
+	list_del(&entry->link);
+	mutex_unlock(&mutex);
+	kfree(entry);
+}
+
+static void put_entry(struct my_data *entry)
+{
+	kref_put(&entry->refcount, release_entry);
+}
+
+Which is useful to remove the mutex lock around kref_put() in put_entry(), but
+it's important that kref_get_unless_zero is enclosed in the same critical
+section that finds the entry in the lookup table,
+otherwise kref_get_unless_zero may reference already freed memory.
+Note that it is illegal to use kref_get_unless_zero without checking its
+return value. If you are sure (by already having a valid pointer) that
+kref_get_unless_zero() will return true, then use kref_get() instead.
+
+The function kref_get_unless_zero also makes it possible to use rcu
+locking for lookups in the above example:
+
+struct my_data
+{
+	struct rcu_head rhead;
+	.
+	struct kref refcount;
+	.
+	.
+};
+
+static struct my_data *get_entry_rcu()
+{
+	struct my_data *entry = NULL;
+	rcu_read_lock();
+	if (!list_empty(&q)) {
+		entry = container_of(q.next, struct my_data, link);
+		if (!kref_get_unless_zero(&entry->refcount))
+			entry = NULL;
+	}
+	rcu_read_unlock();
+	return entry;
+}
+
+static void release_entry_rcu(struct kref *ref)
+{
+	struct my_data *entry = container_of(ref, struct my_data, refcount);
+
+	mutex_lock(&mutex);
+	list_del_rcu(&entry->link);
+	mutex_unlock(&mutex);
+	kfree_rcu(entry, rhead);
+}
+
+static void put_entry(struct my_data *entry)
+{
+	kref_put(&entry->refcount, release_entry_rcu);
+}
+
+But note that the struct kref member needs to remain in valid memory for a
+rcu grace period after release_entry_rcu was called. That can be accomplished
+by using kfree_rcu(entry, rhead) as done above, or by calling synchronize_rcu()
+before using kfree, but note that synchronize_rcu() may sleep for a
+substantial amount of time.
+
+
+Thomas Hellstrom <[email protected]>

MAINTAINERS

View file

diff --git a/MAINTAINERS b/MAINTAINERS
index d9c31b9..6892b26 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2549,6 +2549,15 @@ S:	Supported
 F:	drivers/gpu/drm/exynos
 F:	include/drm/exynos*
 
+DRM DRIVERS FOR NVIDIA TEGRA
+M:	Thierry Reding <[email protected]>
+L:	[email protected]
+L:	[email protected]
+T:	git git://gitorious.org/thierryreding/linux.git
+S:	Maintained
+F:	drivers/gpu/drm/tegra/
+F:	Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+
 DSCC4 DRIVER
 M:	Francois Romieu <[email protected]>
 L:	[email protected]

arch/arm/mm/dma-mapping.c

View file

diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 5383bc0..6b2fb87 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1034,7 +1034,8 @@ static inline void __free_iova(struct dma_iommu_mapping *mapping,
 	spin_unlock_irqrestore(&mapping->lock, flags);
 }
 
-static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
+static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
+					  gfp_t gfp, struct dma_attrs *attrs)
 {
 	struct page **pages;
 	int count = size >> PAGE_SHIFT;
@@ -1048,6 +1049,23 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t
 	if (!pages)
 		return NULL;
 
+	if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
+	{
+		unsigned long order = get_order(size);
+		struct page *page;
+
+		page = dma_alloc_from_contiguous(dev, count, order);
+		if (!page)
+			goto error;
+
+		__dma_clear_buffer(page, size);
+
+		for (i = 0; i < count; i++)
+			pages[i] = page + i;
+
+		return pages;
+	}
+
 	while (count) {
 		int j, order = __fls(count);
 
@@ -1081,14 +1099,21 @@ error:
 	return NULL;
 }
 
-static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t size)
+static int __iommu_free_buffer(struct device *dev, struct page **pages,
+			       size_t size, struct dma_attrs *attrs)
 {
 	int count = size >> PAGE_SHIFT;
 	int array_size = count * sizeof(struct page *);
 	int i;
-	for (i = 0; i < count; i++)
-		if (pages[i])
-			__free_pages(pages[i], 0);
+
+	if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
+		dma_release_from_contiguous(dev, pages[0], count);
+	} else {
+		for (i = 0; i < count; i++)
+			if (pages[i])
+				__free_pages(pages[i], 0);
+	}
+
 	if (array_size <= PAGE_SIZE)
 		kfree(pages);
 	else
@@ -1250,7 +1275,7 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
 	if (gfp & GFP_ATOMIC)
 		return __iommu_alloc_atomic(dev, size, handle);
 
-	pages = __iommu_alloc_buffer(dev, size, gfp);
+	pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
 	if (!pages)
 		return NULL;
 
@@ -1271,7 +1296,7 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
 err_mapping:
 	__iommu_remove_mapping(dev, *handle, size);
 err_buffer:
-	__iommu_free_buffer(dev, pages, size);
+	__iommu_free_buffer(dev, pages, size, attrs);
 	return NULL;
 }
 
@@ -1327,7 +1352,7 @@ void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
 	}
 
 	__iommu_remove_mapping(dev, handle, size);
-	__iommu_free_buffer(dev, pages, size);
+	__iommu_free_buffer(dev, pages, size, attrs);
 }
 
 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,

drivers/char/agp/intel-agp.h

View file

diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 6ec0fff..1042c1b 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -62,12 +62,6 @@
 #define I810_PTE_LOCAL		0x00000002
 #define I810_PTE_VALID		0x00000001
 #define I830_PTE_SYSTEM_CACHED  0x00000006
-/* GT PTE cache control fields */
-#define GEN6_PTE_UNCACHED	0x00000002
-#define HSW_PTE_UNCACHED	0x00000000
-#define GEN6_PTE_LLC		0x00000004
-#define GEN6_PTE_LLC_MLC	0x00000006
-#define GEN6_PTE_GFDT		0x00000008
 
 #define I810_SMRAM_MISCC	0x70
 #define I810_GFX_MEM_WIN_SIZE	0x00010000
@@ -97,7 +91,6 @@
 #define G4x_GMCH_SIZE_VT_2M	(G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN)
 
 #define GFX_FLSH_CNTL		0x2170 /* 915+ */
-#define GFX_FLSH_CNTL_VLV	0x101008
 
 #define I810_DRAM_CTL		0x3000
 #define I810_DRAM_ROW_0		0x00000001
@@ -148,29 +141,6 @@
 #define INTEL_I7505_AGPCTRL	0x70
 #define INTEL_I7505_MCHCFG	0x50
 
-#define SNB_GMCH_CTRL	0x50
-#define SNB_GMCH_GMS_STOLEN_MASK	0xF8
-#define SNB_GMCH_GMS_STOLEN_32M		(1 << 3)
-#define SNB_GMCH_GMS_STOLEN_64M		(2 << 3)
-#define SNB_GMCH_GMS_STOLEN_96M		(3 << 3)
-#define SNB_GMCH_GMS_STOLEN_128M	(4 << 3)
-#define SNB_GMCH_GMS_STOLEN_160M	(5 << 3)
-#define SNB_GMCH_GMS_STOLEN_192M	(6 << 3)
-#define SNB_GMCH_GMS_STOLEN_224M	(7 << 3)
-#define SNB_GMCH_GMS_STOLEN_256M	(8 << 3)
-#define SNB_GMCH_GMS_STOLEN_288M	(9 << 3)
-#define SNB_GMCH_GMS_STOLEN_320M	(0xa << 3)
-#define SNB_GMCH_GMS_STOLEN_352M	(0xb << 3)
-#define SNB_GMCH_GMS_STOLEN_384M	(0xc << 3)
-#define SNB_GMCH_GMS_STOLEN_416M	(0xd << 3)
-#define SNB_GMCH_GMS_STOLEN_448M	(0xe << 3)
-#define SNB_GMCH_GMS_STOLEN_480M	(0xf << 3)
-#define SNB_GMCH_GMS_STOLEN_512M	(0x10 << 3)
-#define SNB_GTT_SIZE_0M			(0 << 8)
-#define SNB_GTT_SIZE_1M			(1 << 8)
-#define SNB_GTT_SIZE_2M			(2 << 8)
-#define SNB_GTT_SIZE_MASK		(3 << 8)
-
 /* pci devices ids */
 #define PCI_DEVICE_ID_INTEL_E7221_HB	0x2588
 #define PCI_DEVICE_ID_INTEL_E7221_IG	0x258a
@@ -219,66 +189,5 @@
 #define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB	    0x0062
 #define PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB    0x006a
 #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG	    0x0046
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB		0x0100  /* Desktop */
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT1_IG		0x0102
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT2_IG		0x0112
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT2_PLUS_IG	0x0122
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB		0x0104  /* Mobile */
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT1_IG	0x0106
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_IG	0x0116
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_PLUS_IG	0x0126
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB		0x0108  /* Server */
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_IG		0x010A
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_HB		0x0150  /* Desktop */
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_GT1_IG		0x0152
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_GT2_IG		0x0162
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_HB		0x0154  /* Mobile */
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT1_IG		0x0156
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT2_IG		0x0166
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB		0x0158  /* Server */
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG		0x015A
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT2_IG		0x016A
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB		0x0F00 /* VLV1 */
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG		0x0F30
-#define PCI_DEVICE_ID_INTEL_HASWELL_HB			0x0400 /* Desktop */
-#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG		0x0402
-#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG		0x0412
-#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_PLUS_IG	0x0422
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB		0x0404 /* Mobile */
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG		0x0406
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG		0x0416
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_PLUS_IG	0x0426
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB		0x0408 /* Server */
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG		0x040a
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG		0x041a
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_PLUS_IG	0x042a
-#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB		0x0c04
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT1_IG	0x0C02
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_IG	0x0C12
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_PLUS_IG	0x0C22
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT1_IG	0x0C06
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_IG	0x0C16
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_PLUS_IG	0x0C26
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT1_IG	0x0C0A
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_IG	0x0C1A
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_PLUS_IG	0x0C2A
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT1_IG	0x0A02
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_IG	0x0A12
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_PLUS_IG	0x0A22
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT1_IG	0x0A06
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_IG	0x0A16
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_PLUS_IG	0x0A26
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT1_IG	0x0A0A
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_IG	0x0A1A
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_PLUS_IG	0x0A2A