projects/linux·commit 44fc8433

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

44fc8433 · Linus Torvalds <[email protected]> · 2025-12-02 17:03:55 -08:00

Pull arm64 updates from Catalin Marinas:
 "These are the arm64 updates for 6.19.

  The biggest part is the Arm MPAM driver under drivers/resctrl/.
  There's a patch touching mm/ to handle spurious faults for huge pmd
  (similar to the pte version). The corresponding arm64 part allows us
  to avoid the TLB maintenance if a (huge) page is reused after a write
  fault. There's EFI refactoring to allow runtime services with
  preemption enabled and the rest is the usual perf/PMU updates and
  several cleanups/typos.

  Summary:

  Core features:

   - Basic Arm MPAM (Memory system resource Partitioning And Monitoring)
     driver under drivers/resctrl/ which makes use of the fs/rectrl/ API

  Perf and PMU:

   - Avoid cycle counter on multi-threaded CPUs

   - Extend CSPMU device probing and add additional filtering support
     for NVIDIA implementations

   - Add support for the PMUs on the NoC S3 interconnect

   - Add additional compatible strings for new Cortex and C1 CPUs

   - Add support for data source filtering to the SPE driver

   - Add support for i.MX8QM and "DB" PMU in the imx PMU driver

  Memory managemennt:

   - Avoid broadcast TLBI if page reused in write fault

   - Elide TLB invalidation if the old PTE was not valid

   - Drop redundant cpu_set_*_tcr_t0sz() macros

   - Propagate pgtable_alloc() errors outside of __create_pgd_mapping()

   - Propagate return value from __change_memory_common()

  ACPI and EFI:

   - Call EFI runtime services without disabling preemption

   - Remove unused ACPI function

  Miscellaneous:

   - ptrace support to disable streaming on SME-only systems

   - Improve sysreg generation to include a 'Prefix' descriptor

   - Replace __ASSEMBLY__ with __ASSEMBLER__

   - Align register dumps in the kselftest zt-test

   - Remove some no longer used macros/functions

   - Various spelling corrections"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (94 commits)
  arm64/mm: Document why linear map split failure upon vm_reset_perms is not problematic
  arm64/pageattr: Propagate return value from __change_memory_common
  arm64/sysreg: Remove unused define ARM64_FEATURE_FIELD_BITS
  KVM: arm64: selftests: Consider all 7 possible levels of cache
  KVM: arm64: selftests: Remove ARM64_FEATURE_FIELD_BITS and its last user
  arm64: atomics: lse: Remove unused parameters from ATOMIC_FETCH_OP_AND macros
  Documentation/arm64: Fix the typo of register names
  ACPI: GTDT: Get rid of acpi_arch_timer_mem_init()
  perf: arm_spe: Add support for filtering on data source
  perf: Add perf_event_attr::config4
  perf/imx_ddr: Add support for PMU in DB (system interconnects)
  perf/imx_ddr: Get and enable optional clks
  perf/imx_ddr: Move ida_alloc() from ddr_perf_init() to ddr_perf_probe()
  dt-bindings: perf: fsl-imx-ddr: Add compatible string for i.MX8QM, i.MX8QXP and i.MX8DXL
  arm64: remove duplicate ARCH_HAS_MEM_ENCRYPT
  arm64: mm: use untagged address to calculate page index
  MAINTAINERS: new entry for MPAM Driver
  arm_mpam: Add kunit tests for props_mismatch()
  arm_mpam: Add kunit test for bitmap reset
  arm_mpam: Add helper to reset saved mbwu state
  ...
Commit
44fc84337b6eae580a51cf6f7ca6a22ef1349556
Parents
2547f79b · edde0606

Merge commit. Changes below are compared with the first parent: 2547f79b.

Changes

150 files changed · +6005 −719

FileStatusAddDelContent
Documentation/arch/arm64/booting.rstmodified+4−4View file
Documentation/arch/arm64/sve.rstmodified+5−0View file
Documentation/devicetree/bindings/perf/fsl-imx-ddr.yamlmodified+28−1View file
MAINTAINERSmodified+10−0View file
arch/arm64/Kconfigmodified+25−1View file
arch/arm64/include/asm/alternative-macros.hmodified+4−4View file
arch/arm64/include/asm/alternative.hmodified+2−2View file
arch/arm64/include/asm/arch_gicv3.hmodified+2−2View file
arch/arm64/include/asm/asm-extable.hmodified+3−3View file
arch/arm64/include/asm/assembler.hmodified+6−6View file
arch/arm64/include/asm/atomic_lse.hmodified+10−10View file
arch/arm64/include/asm/barrier.hmodified+2−2View file
arch/arm64/include/asm/cache.hmodified+2−2View file
arch/arm64/include/asm/cpucaps.hmodified+2−2View file
arch/arm64/include/asm/cpufeature.hmodified+4−4View file
arch/arm64/include/asm/cputype.hmodified+3−3View file
arch/arm64/include/asm/current.hmodified+2−2View file
arch/arm64/include/asm/debug-monitors.hmodified+2−2View file
arch/arm64/include/asm/efi.hmodified+3−10View file
arch/arm64/include/asm/el2_setup.hmodified+2−2View file
arch/arm64/include/asm/elf.hmodified+2−2View file
arch/arm64/include/asm/esr.hmodified+2−2View file
arch/arm64/include/asm/fixmap.hmodified+2−2View file
arch/arm64/include/asm/fpsimd.hmodified+1−1View file
arch/arm64/include/asm/ftrace.hmodified+3−3View file
arch/arm64/include/asm/gpr-num.hmodified+3−3View file
arch/arm64/include/asm/hwcap.hmodified+1−1View file
arch/arm64/include/asm/image.hmodified+2−2View file
arch/arm64/include/asm/insn.hmodified+2−2View file
arch/arm64/include/asm/jump_label.hmodified+2−2View file
arch/arm64/include/asm/kasan.hmodified+1−1View file
arch/arm64/include/asm/kexec.hmodified+2−2View file
arch/arm64/include/asm/kgdb.hmodified+2−2View file
arch/arm64/include/asm/kvm_asm.hmodified+2−2View file
arch/arm64/include/asm/kvm_mmu.hmodified+2−2View file
arch/arm64/include/asm/kvm_mte.hmodified+2−2View file
arch/arm64/include/asm/kvm_ptrauth.hmodified+3−3View file
arch/arm64/include/asm/linkage.hmodified+1−1View file
arch/arm64/include/asm/memory.hmodified+2−3View file
arch/arm64/include/asm/mmu.hmodified+2−2View file
arch/arm64/include/asm/mmu_context.hmodified+6−14View file
arch/arm64/include/asm/mte-kasan.hmodified+2−2View file
arch/arm64/include/asm/mte.hmodified+2−2View file
arch/arm64/include/asm/page.hmodified+2−2View file
arch/arm64/include/asm/pgtable-hwdef.hmodified+47−96View file
arch/arm64/include/asm/pgtable-prot.hmodified+3−3View file
arch/arm64/include/asm/pgtable.hmodified+13−9View file
arch/arm64/include/asm/proc-fns.hmodified+2−2View file
arch/arm64/include/asm/processor.hmodified+2−2View file
arch/arm64/include/asm/ptrace.hmodified+2−2View file
arch/arm64/include/asm/rsi_smc.hmodified+2−2View file
arch/arm64/include/asm/rwonce.hmodified+2−2View file
arch/arm64/include/asm/scs.hmodified+2−2View file
arch/arm64/include/asm/sdei.hmodified+2−2View file
arch/arm64/include/asm/simd.hmodified+1−1View file
arch/arm64/include/asm/smp.hmodified+2−2View file
arch/arm64/include/asm/spectre.hmodified+2−2View file
arch/arm64/include/asm/stacktrace/frame.hmodified+2−2View file
arch/arm64/include/asm/suspend.hmodified+1−1View file
arch/arm64/include/asm/sysreg.hmodified+5−7View file
arch/arm64/include/asm/system_misc.hmodified+2−2View file
arch/arm64/include/asm/thread_info.hmodified+1−1View file
arch/arm64/include/asm/tlbflush.hmodified+84−1View file
arch/arm64/include/asm/vdso.hmodified+2−2View file
arch/arm64/include/asm/vdso/compat_barrier.hmodified+2−2View file
arch/arm64/include/asm/vdso/compat_gettimeofday.hmodified+2−2View file
arch/arm64/include/asm/vdso/getrandom.hmodified+2−2View file
arch/arm64/include/asm/vdso/gettimeofday.hmodified+2−2View file
arch/arm64/include/asm/vdso/processor.hmodified+2−2View file
arch/arm64/include/asm/vdso/vsyscall.hmodified+2−2View file
arch/arm64/include/asm/virt.hmodified+2−2View file
arch/arm64/include/asm/vmap_stack.hmodified+0−4View file
arch/arm64/include/uapi/asm/kvm.hmodified+1−1View file
arch/arm64/include/uapi/asm/ptrace.hmodified+2−2View file
arch/arm64/include/uapi/asm/sigcontext.hmodified+2−2View file
arch/arm64/kernel/acpi.cmodified+2−2View file
arch/arm64/kernel/cpufeature.cmodified+3−3View file
arch/arm64/kernel/efi.cmodified+40−6View file
arch/arm64/kernel/entry-common.cmodified+3−25View file
arch/arm64/kernel/entry-ftrace.Smodified+1−1View file
arch/arm64/kernel/fpsimd.cmodified+21−8View file
arch/arm64/kernel/ftrace.cmodified+1−1View file
arch/arm64/kernel/irq.cmodified+1−1View file
arch/arm64/kernel/machine_kexec.cmodified+1−1View file
arch/arm64/kernel/pi/map_kernel.cmodified+4−4View file
arch/arm64/kernel/probes/uprobes.cmodified+1−1View file
arch/arm64/kernel/ptrace.cmodified+33−7View file
arch/arm64/kernel/sdei.cmodified+1−5View file
arch/arm64/kernel/smp.cmodified+2−2View file
arch/arm64/kernel/syscall.cmodified+1−1View file
arch/arm64/kernel/traps.cmodified+1−1View file
arch/arm64/kernel/vmcore_info.cmodified+1−1View file
arch/arm64/kvm/arch_timer.cmodified+1−1View file
arch/arm64/kvm/arm.cmodified+1−1View file
arch/arm64/kvm/hyp/nvhe/ffa.cmodified+1−1View file
arch/arm64/kvm/mmu.cmodified+1−1View file
arch/arm64/kvm/nested.cmodified+1−1View file
arch/arm64/mm/contpte.cmodified+1−2View file
arch/arm64/mm/fault.cmodified+6−2View file
arch/arm64/mm/mmu.cmodified+139−81View file
arch/arm64/mm/pageattr.cmodified+8−4View file
arch/arm64/mm/pgd.cmodified+1−1View file
arch/arm64/mm/proc.Smodified+23−13View file
arch/arm64/net/bpf_jit_comp.cmodified+1−1View file
arch/arm64/tools/gen-sysreg.awkmodified+99−47View file
arch/arm64/tools/sysregmodified+21−0View file
drivers/Kconfigmodified+2−0View file
drivers/Makefilemodified+1−0View file
drivers/acpi/arm64/Kconfigmodified+3−0View file
drivers/acpi/arm64/Makefilemodified+1−0View file
drivers/acpi/arm64/gtdt.cmodified+0−34View file
drivers/acpi/arm64/mpam.cadded+411−0View file
drivers/acpi/pptt.cmodified+263−17View file
drivers/acpi/tables.cmodified+1−1View file
drivers/firmware/efi/efi.cmodified+3−0View file
drivers/firmware/efi/runtime-wrappers.cmodified+16−1View file
drivers/perf/arm-ni.cmodified+75−22View file
drivers/perf/arm_cspmu/arm_cspmu.cmodified+48−4View file
drivers/perf/arm_cspmu/arm_cspmu.hmodified+36−3View file
drivers/perf/arm_cspmu/nvidia_cspmu.cmodified+141−53View file
drivers/perf/arm_pmu.cmodified+6−0View file
drivers/perf/arm_pmuv3.cmodified+24−0View file
drivers/perf/arm_spe_pmu.cmodified+37−0View file
drivers/perf/fsl_imx8_ddr_perf.cmodified+78−15View file
drivers/resctrl/Kconfigadded+24−0View file
drivers/resctrl/Makefileadded+4−0View file
drivers/resctrl/mpam_devices.cadded+2723−0View file
drivers/resctrl/mpam_internal.hadded+658−0View file
drivers/resctrl/test_mpam_devices.cadded+389−0View file
include/linux/acpi.hmodified+26−1View file
include/linux/arch_topology.hmodified+16−1View file
include/linux/arm_mpam.hadded+66−0View file
include/linux/efi.hmodified+2−0View file
include/linux/huge_mm.hmodified+1−1View file
include/linux/perf/arm_pmu.hmodified+1−0View file
include/linux/pgtable.hmodified+4−0View file
include/linux/platform_device.hmodified+1−0View file
include/uapi/linux/perf_event.hmodified+2−0View file
mm/huge_memory.cmodified+21−12View file
mm/internal.hmodified+1−1View file
mm/memory.cmodified+46−16View file
tools/arch/arm64/include/asm/cputype.hmodified+2−2View file
tools/arch/arm64/include/asm/esr.hmodified+2−2View file
tools/arch/arm64/include/asm/gpr-num.hmodified+3−3View file
tools/arch/arm64/include/asm/sysreg.hmodified+5−7View file
tools/arch/arm64/include/uapi/asm/kvm.hmodified+1−1View file
tools/testing/selftests/arm64/fp/fp-ptrace.cmodified+1−4View file
tools/testing/selftests/arm64/fp/sve-ptrace.cmodified+61−0View file
tools/testing/selftests/arm64/fp/zt-test.Smodified+1−1View file
tools/testing/selftests/kvm/arm64/set_id_regs.cmodified+7−3View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/arch/arm64/booting.rst

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diff --git a/Documentation/arch/arm64/booting.rst b/Documentation/arch/arm64/booting.rst
index e4f9538..26efca0 100644
--- a/Documentation/arch/arm64/booting.rst
+++ b/Documentation/arch/arm64/booting.rst
@@ -391,13 +391,13 @@ Before jumping into the kernel, the following conditions must be met:
- SMCR_EL2.LEN must be initialised to the same value for all CPUs the
kernel will execute on.
- - HWFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.
+ - HFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.
- - HWFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.
+ - HFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.
- - HWFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
+ - HFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
- - HWFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
+ - HFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
For CPUs with the Scalable Matrix Extension FA64 feature (FEAT_SME_FA64):

Documentation/arch/arm64/sve.rst

View file
diff --git a/Documentation/arch/arm64/sve.rst b/Documentation/arch/arm64/sve.rst
index 2815249..a61c9d0 100644
--- a/Documentation/arch/arm64/sve.rst
+++ b/Documentation/arch/arm64/sve.rst
@@ -402,6 +402,11 @@ The regset data starts with struct user_sve_header, containing:
streaming mode and any SETREGSET of NT_ARM_SSVE will enter streaming mode
if the target was not in streaming mode.
+* On systems that do not support SVE it is permitted to use SETREGSET to
+ write SVE_PT_REGS_FPSIMD formatted data via NT_ARM_SVE, in this case the
+ vector length should be specified as 0. This allows streaming mode to be
+ disabled on systems with SME but not SVE.
+
* If any register data is provided along with SVE_PT_VL_ONEXEC then the
registers data will be interpreted with the current vector length, not
the vector length configured for use on exec.

Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml

View file
diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
index d2e578d..103e4ae 100644
--- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
+++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
@@ -14,6 +14,7 @@ properties:
oneOf:
- enum:
- fsl,imx8-ddr-pmu
+ - fsl,imx8dxl-db-pmu
- fsl,imx8m-ddr-pmu
- fsl,imx8mq-ddr-pmu
- fsl,imx8mm-ddr-pmu
@@ -28,7 +29,10 @@ properties:
- fsl,imx8mp-ddr-pmu
- const: fsl,imx8m-ddr-pmu
- items:
- - const: fsl,imx8dxl-ddr-pmu
+ - enum:
+ - fsl,imx8dxl-ddr-pmu
+ - fsl,imx8qm-ddr-pmu
+ - fsl,imx8qxp-ddr-pmu
- const: fsl,imx8-ddr-pmu
- items:
- enum:
@@ -43,6 +47,14 @@ properties:
interrupts:
maxItems: 1
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: ipg
+ - const: cnt
+
required:
- compatible
- reg
@@ -50,6 +62,21 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8dxl-db-pmu
+ then:
+ required:
+ - clocks
+ - clock-names
+ else:
+ properties:
+ clocks: false
+ clock-names: false
+
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>

MAINTAINERS

View file
diff --git a/MAINTAINERS b/MAINTAINERS
index e8ad048..ac5a087 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17470,6 +17470,16 @@ S: Maintained
F: Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml
F: drivers/video/backlight/mp3309c.c
+MPAM DRIVER
+M: James Morse <[email protected]>
+M: Ben Horgan <[email protected]>
+R: Reinette Chatre <[email protected]>
+R: Fenghua Yu <[email protected]>
+S: Maintained
+F: drivers/resctrl/mpam_*
+F: drivers/resctrl/test_mpam_*
+F: include/linux/arm_mpam.h
+
MPS MP2869 DRIVER
M: Wensheng Wang <[email protected]>

arch/arm64/Kconfig

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diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 6663ffd..65db12f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -47,7 +47,6 @@ config ARM64
select ARCH_HAS_SETUP_DMA_OPS
select ARCH_HAS_SET_DIRECT_MAP
select ARCH_HAS_SET_MEMORY
- select ARCH_HAS_MEM_ENCRYPT
select ARCH_HAS_FORCE_DMA_UNENCRYPTED
select ARCH_STACKWALK
select ARCH_HAS_STRICT_KERNEL_RWX
@@ -2023,6 +2022,31 @@ config ARM64_TLB_RANGE
ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
range of input addresses.
+config ARM64_MPAM
+ bool "Enable support for MPAM"
+ select ARM64_MPAM_DRIVER if EXPERT # does nothing yet
+ select ACPI_MPAM if ACPI
+ help
+ Memory System Resource Partitioning and Monitoring (MPAM) is an
+ optional extension to the Arm architecture that allows each
+ transaction issued to the memory system to be labelled with a
+ Partition identifier (PARTID) and Performance Monitoring Group
+ identifier (PMG).
+
+ Memory system components, such as the caches, can be configured with
+ policies to control how much of various physical resources (such as
+ memory bandwidth or cache memory) the transactions labelled with each
+ PARTID can consume. Depending on the capabilities of the hardware,
+ the PARTID and PMG can also be used as filtering criteria to measure
+ the memory system resource consumption of different parts of a
+ workload.
+
+ Use of this extension requires CPU support, support in the
+ Memory System Components (MSC), and a description from firmware
+ of where the MSCs are in the address space.
+
+ MPAM is exposed to user-space via the resctrl pseudo filesystem.
+
endmenu # "ARMv8.4 architectural features"
menu "ARMv8.5 architectural features"

arch/arm64/include/asm/alternative-macros.h

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diff --git a/arch/arm64/include/asm/alternative-macros.h b/arch/arm64/include/asm/alternative-macros.h
index c8c77f9..8624166 100644
--- a/arch/arm64/include/asm/alternative-macros.h
+++ b/arch/arm64/include/asm/alternative-macros.h
@@ -19,7 +19,7 @@
#error "cpucaps have overflown ARM64_CB_BIT"
#endif
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/stringify.h>
@@ -207,7 +207,7 @@ alternative_endif
#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
/*
* Usage: asm(ALTERNATIVE(oldinstr, newinstr, cpucap));
@@ -219,7 +219,7 @@ alternative_endif
#define ALTERNATIVE(oldinstr, newinstr, ...) \
_ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/types.h>
@@ -263,6 +263,6 @@ l_yes:
return true;
}
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* __ASM_ALTERNATIVE_MACROS_H */

arch/arm64/include/asm/alternative.h

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diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h
index 5174600..621aa85 100644
--- a/arch/arm64/include/asm/alternative.h
+++ b/arch/arm64/include/asm/alternative.h
@@ -4,7 +4,7 @@
#include <asm/alternative-macros.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/init.h>
#include <linux/types.h>
@@ -37,5 +37,5 @@ static inline int apply_alternatives_module(void *start, size_t length)
void alt_cb_patch_nops(struct alt_instr *alt, __le32 *origptr,
__le32 *updptr, int nr_inst);
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* __ASM_ALTERNATIVE_H */

arch/arm64/include/asm/arch_gicv3.h

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diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index 9e96f02..d20b039 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -9,7 +9,7 @@
#include <asm/sysreg.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/irqchip/arm-gic-common.h>
#include <linux/stringify.h>
@@ -188,5 +188,5 @@ static inline bool gic_has_relaxed_pmr_sync(void)
return cpus_have_cap(ARM64_HAS_GIC_PRIO_RELAXED_SYNC);
}
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* __ASM_ARCH_GICV3_H */

arch/arm64/include/asm/asm-extable.h

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diff --git a/arch/arm64/include/asm/asm-extable.h b/arch/arm64/include/asm/asm-extable.h
index 292f268..d67e2fd 100644
--- a/arch/arm64/include/asm/asm-extable.h
+++ b/arch/arm64/include/asm/asm-extable.h
@@ -27,7 +27,7 @@
/* Data fields for EX_TYPE_UACCESS_CPY */
#define EX_DATA_UACCESS_WRITE BIT(0)
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
#define __ASM_EXTABLE_RAW(insn, fixup, type, data) \
.pushsection __ex_table, "a"; \
@@ -77,7 +77,7 @@
__ASM_EXTABLE_RAW(\insn, \fixup, EX_TYPE_UACCESS_CPY, \uaccess_is_write)
.endm
-#else /* __ASSEMBLY__ */
+#else /* __ASSEMBLER__ */
#include <linux/stringify.h>
@@ -132,6 +132,6 @@
EX_DATA_REG(ADDR, addr) \
")")
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* __ASM_ASM_EXTABLE_H */

arch/arm64/include/asm/assembler.h

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diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 23be85d..f0ca719 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -5,7 +5,7 @@
* Copyright (C) 1996-2000 Russell King
* Copyright (C) 2012 ARM Ltd.
*/
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#error "Only include this from assembly code"
#endif
@@ -325,14 +325,14 @@ alternative_cb_end
* tcr_set_t0sz - update TCR.T0SZ so that we can load the ID map
*/
.macro tcr_set_t0sz, valreg, t0sz
- bfi \valreg, \t0sz, #TCR_T0SZ_OFFSET, #TCR_TxSZ_WIDTH
+ bfi \valreg, \t0sz, #TCR_EL1_T0SZ_SHIFT, #TCR_EL1_T0SZ_WIDTH
.endm
/*
* tcr_set_t1sz - update TCR.T1SZ
*/
.macro tcr_set_t1sz, valreg, t1sz
- bfi \valreg, \t1sz, #TCR_T1SZ_OFFSET, #TCR_TxSZ_WIDTH
+ bfi \valreg, \t1sz, #TCR_EL1_T1SZ_SHIFT, #TCR_EL1_T1SZ_WIDTH
.endm
/*
@@ -371,7 +371,7 @@ alternative_endif
* [start, end) with dcache line size explicitly provided.
*
* op: operation passed to dc instruction
- * domain: domain used in dsb instruciton
+ * domain: domain used in dsb instruction
* start: starting virtual address of the region
* end: end virtual address of the region
* linesz: dcache line size
@@ -412,7 +412,7 @@ alternative_endif
* [start, end)
*
* op: operation passed to dc instruction
- * domain: domain used in dsb instruciton
+ * domain: domain used in dsb instruction
* start: starting virtual address of the region
* end: end virtual address of the region
* fixup: optional label to branch to on user fault
@@ -589,7 +589,7 @@ alternative_endif
.macro offset_ttbr1, ttbr, tmp
#if defined(CONFIG_ARM64_VA_BITS_52) && !defined(CONFIG_ARM64_LPA2)
mrs \tmp, tcr_el1
- and \tmp, \tmp, #TCR_T1SZ_MASK
+ and \tmp, \tmp, #TCR_EL1_T1SZ_MASK
cmp \tmp, #TCR_T1SZ(VA_BITS_MIN)
orr \tmp, \ttbr, #TTBR1_BADDR_4852_OFFSET
csel \ttbr, \tmp, \ttbr, eq

arch/arm64/include/asm/atomic_lse.h

View file
diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h
index 87f568a..afad184 100644
--- a/arch/arm64/include/asm/atomic_lse.h
+++ b/arch/arm64/include/asm/atomic_lse.h
@@ -103,17 +103,17 @@ static __always_inline void __lse_atomic_and(int i, atomic_t *v)
return __lse_atomic_andnot(~i, v);
}
-#define ATOMIC_FETCH_OP_AND(name, mb, cl...) \
+#define ATOMIC_FETCH_OP_AND(name) \
static __always_inline int \
__lse_atomic_fetch_and##name(int i, atomic_t *v) \
{ \
return __lse_atomic_fetch_andnot##name(~i, v); \
}
-ATOMIC_FETCH_OP_AND(_relaxed, )
-ATOMIC_FETCH_OP_AND(_acquire, a, "memory")
-ATOMIC_FETCH_OP_AND(_release, l, "memory")
-ATOMIC_FETCH_OP_AND( , al, "memory")
+ATOMIC_FETCH_OP_AND(_relaxed)
+ATOMIC_FETCH_OP_AND(_acquire)
+ATOMIC_FETCH_OP_AND(_release)
+ATOMIC_FETCH_OP_AND( )
#undef ATOMIC_FETCH_OP_AND
@@ -210,17 +210,17 @@ static __always_inline void __lse_atomic64_and(s64 i, atomic64_t *v)
return __lse_atomic64_andnot(~i, v);
}
-#define ATOMIC64_FETCH_OP_AND(name, mb, cl...) \
+#define ATOMIC64_FETCH_OP_AND(name) \
static __always_inline long \
__lse_atomic64_fetch_and##name(s64 i, atomic64_t *v) \
{ \
return __lse_atomic64_fetch_andnot##name(~i, v); \
}
-ATOMIC64_FETCH_OP_AND(_relaxed, )
-ATOMIC64_FETCH_OP_AND(_acquire, a, "memory")
-ATOMIC64_FETCH_OP_AND(_release, l, "memory")
-ATOMIC64_FETCH_OP_AND( , al, "memory")
+ATOMIC64_FETCH_OP_AND(_relaxed)
+ATOMIC64_FETCH_OP_AND(_acquire)
+ATOMIC64_FETCH_OP_AND(_release)
+ATOMIC64_FETCH_OP_AND( )
#undef ATOMIC64_FETCH_OP_AND

arch/arm64/include/asm/barrier.h

View file
diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index f5801b0..9495c44 100644
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -7,7 +7,7 @@
#ifndef __ASM_BARRIER_H
#define __ASM_BARRIER_H
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/kasan-checks.h>
@@ -221,6 +221,6 @@ do { \
#include <asm-generic/barrier.h>
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* __ASM_BARRIER_H */

arch/arm64/include/asm/cache.h

View file
diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h
index 0996300..dd2c858 100644
--- a/arch/arm64/include/asm/cache.h
+++ b/arch/arm64/include/asm/cache.h
@@ -35,7 +35,7 @@
#define ARCH_DMA_MINALIGN (128)
#define ARCH_KMALLOC_MINALIGN (8)
-#if !defined(__ASSEMBLY__) && !defined(BUILD_VDSO)
+#if !defined(__ASSEMBLER__) && !defined(BUILD_VDSO)
#include <linux/bitops.h>
#include <linux/kasan-enabled.h>
@@ -135,6 +135,6 @@ static inline u32 __attribute_const__ read_cpuid_effective_cachetype(void)
return ctr;
}
-#endif /* !defined(__ASSEMBLY__) && !defined(BUILD_VDSO) */
+#endif /* !defined(__ASSEMBLER__) && !defined(BUILD_VDSO) */
#endif

arch/arm64/include/asm/cpucaps.h

View file
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index 9d76929..2c80294 100644
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -5,7 +5,7 @@
#include <asm/cpucap-defs.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/types.h>
/*
* Check whether a cpucap is possible at compiletime.
@@ -77,6 +77,6 @@ cpucap_is_possible(const unsigned int cap)
return true;
}
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* __ASM_CPUCAPS_H */

arch/arm64/include/asm/cpufeature.h

View file
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index e223cbf..4de51f8 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -19,7 +19,7 @@
#define ARM64_SW_FEATURE_OVERRIDE_HVHE 4
#define ARM64_SW_FEATURE_OVERRIDE_RODATA_OFF 8
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/bug.h>
#include <linux/jump_label.h>
@@ -199,7 +199,7 @@ extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
* registers (e.g, SCTLR, TCR etc.) or patching the kernel via
* alternatives. The kernel patching is batched and performed at later
* point. The actions are always initiated only after the capability
- * is finalised. This is usally denoted by "enabling" the capability.
+ * is finalised. This is usually denoted by "enabling" the capability.
* The actions are initiated as follows :
* a) Action is triggered on all online CPUs, after the capability is
* finalised, invoked within the stop_machine() context from
@@ -251,7 +251,7 @@ extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
#define ARM64_CPUCAP_SCOPE_LOCAL_CPU ((u16)BIT(0))
#define ARM64_CPUCAP_SCOPE_SYSTEM ((u16)BIT(1))
/*
- * The capabilitiy is detected on the Boot CPU and is used by kernel
+ * The capability is detected on the Boot CPU and is used by kernel
* during early boot. i.e, the capability should be "detected" and
* "enabled" as early as possibly on all booting CPUs.
*/
@@ -1078,6 +1078,6 @@ static inline bool cpu_has_lpa2(void)
#endif
}
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif

arch/arm64/include/asm/cputype.h

View file
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 9b00b75..08860d4 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -247,9 +247,9 @@
/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */
#define MIDR_FUJITSU_ERRATUM_010001 MIDR_FUJITSU_A64FX
#define MIDR_FUJITSU_ERRATUM_010001_MASK (~MIDR_CPU_VAR_REV(1, 0))
-#define TCR_CLEAR_FUJITSU_ERRATUM_010001 (TCR_NFD1 | TCR_NFD0)
+#define TCR_CLEAR_FUJITSU_ERRATUM_010001 (TCR_EL1_NFD1 | TCR_EL1_NFD0)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <asm/sysreg.h>
@@ -328,6 +328,6 @@ static inline u32 __attribute_const__ read_cpuid_cachetype(void)
{
return read_cpuid(CTR_EL0);
}
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif

arch/arm64/include/asm/current.h

View file
diff --git a/arch/arm64/include/asm/current.h b/arch/arm64/include/asm/current.h
index 54ceae0..c92912e 100644
--- a/arch/arm64/include/asm/current.h
+++ b/arch/arm64/include/asm/current.h
@@ -4,7 +4,7 @@
#include <linux/compiler.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
struct task_struct;
@@ -23,7 +23,7 @@ static __always_inline struct task_struct *get_current(void)
#define current get_current()
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* __ASM_CURRENT_H */

arch/arm64/include/asm/debug-monitors.h

View file
diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
index f5e3ed2..8d5f924 100644
--- a/arch/arm64/include/asm/debug-monitors.h
+++ b/arch/arm64/include/asm/debug-monitors.h
@@ -48,7 +48,7 @@
#define AARCH32_BREAK_THUMB2_LO 0xf7f0
#define AARCH32_BREAK_THUMB2_HI 0xa000
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
struct task_struct;
#define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */
@@ -88,5 +88,5 @@ static inline bool try_step_suspended_breakpoints(struct pt_regs *regs)
bool try_handle_aarch32_break(struct pt_regs *regs);
-#endif /* __ASSEMBLY */
+#endif /* __ASSEMBLER__ */
#endif /* __ASM_DEBUG_MONITORS_H */

arch/arm64/include/asm/efi.h

View file
diff --git a/arch/arm64/include/asm/efi.h b/arch/arm64/include/asm/efi.h
index bcd5622..aa91165 100644
--- a/arch/arm64/include/asm/efi.h
+++ b/arch/arm64/include/asm/efi.h
@@ -126,21 +126,14 @@ static inline void efi_set_pgd(struct mm_struct *mm)
if (mm != current->active_mm) {
/*
* Update the current thread's saved ttbr0 since it is
- * restored as part of a return from exception. Enable
- * access to the valid TTBR0_EL1 and invoke the errata
- * workaround directly since there is no return from
- * exception when invoking the EFI run-time services.
+ * restored as part of a return from exception.
*/
update_saved_ttbr0(current, mm);
- uaccess_ttbr0_enable();
- post_ttbr_update_workaround();
} else {
/*
- * Defer the switch to the current thread's TTBR0_EL1
- * until uaccess_enable(). Restore the current
- * thread's saved ttbr0 corresponding to its active_mm
+ * Restore the current thread's saved ttbr0
+ * corresponding to its active_mm
*/
- uaccess_ttbr0_disable();
update_saved_ttbr0(current, current->active_mm);
}
}

arch/arm64/include/asm/el2_setup.h

View file
diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index 99a7c02..cacd20d 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -7,7 +7,7 @@
#ifndef __ARM_KVM_INIT_H__
#define __ARM_KVM_INIT_H__
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#error Assembly-only header
#endif
@@ -24,7 +24,7 @@
* ID_AA64MMFR4_EL1.E2H0 < 0. On such CPUs HCR_EL2.E2H is RES1, but it
* can reset into an UNKNOWN state and might not read as 1 until it has
* been initialized explicitly.
- * Initalize HCR_EL2.E2H so that later code can rely upon HCR_EL2.E2H
+ * Initialize HCR_EL2.E2H so that later code can rely upon HCR_EL2.E2H
* indicating whether the CPU is running in E2H mode.
*/
mrs_s x1, SYS_ID_AA64MMFR4_EL1

arch/arm64/include/asm/elf.h

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diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h

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include/linux/acpi.h

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include/linux/arch_topology.h

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include/linux/arm_mpam.h

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include/linux/efi.h

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include/linux/huge_mm.h

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include/linux/perf/arm_pmu.h

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include/linux/pgtable.h

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include/linux/platform_device.h

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include/uapi/linux/perf_event.h

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mm/huge_memory.c

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mm/internal.h

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mm/memory.c

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tools/arch/arm64/include/asm/cputype.h

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tools/arch/arm64/include/asm/esr.h

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tools/arch/arm64/include/asm/gpr-num.h

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tools/arch/arm64/include/asm/sysreg.h

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tools/arch/arm64/include/uapi/asm/kvm.h

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tools/testing/selftests/arm64/fp/fp-ptrace.c

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tools/testing/selftests/arm64/fp/sve-ptrace.c

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tools/testing/selftests/arm64/fp/zt-test.S

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tools/testing/selftests/kvm/arm64/set_id_regs.c

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