ARM: Fix wrong register in proc-arm6_7.S data abort handler

4aba098c · Russell King <[email protected]> · 2010-02-03 15:48:03 +00:00

Signed-off-by: Russell King <[email protected]>

Changes

1 files changed · +1 −1

File	Status	Add	Del	Content
arch/arm/mm/proc-arm6_7.S	modified	+1	−1	View file

diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 3f9cd3d..795dc61 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -41,7 +41,7 @@ ENTRY(cpu_arm7_dcache_clean_area)
 ENTRY(cpu_arm7_data_abort)
 	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
-	ldr	r8, [r0]			@ read arm instruction
+	ldr	r8, [r2]			@ read arm instruction
 	tst	r8, #1 << 20			@ L = 0 -> write?
 	orreq	r1, r1, #1 << 11		@ yes.
 	and	r7, r8, #15 << 24