Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

50686e8a · Linus Torvalds <[email protected]> · 2015-09-01 12:18:40 -07:00

Pull ARM SoC platform updates from Olof Johansson:
 "New or improved SoC support:

   - add support for Atmel's SAMA5D2 SoC
   - add support for Freescale i.MX6UL
   - improved support for TI's DM814x platform
   - misc fixes and improvements for RockChip platforms
   - Marvell MVEBU suspend/resume support

  A few driver changes that ideally would belong in the drivers branch
  are also here (acked by appropriate maintainers):

   - power key input driver for Freescale platforms (svns)
   - RTC driver updates for Freescale platforms (svns/mxc)
   - clk fixes for TI DM814/816X

  + a bunch of other changes for various platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: rockchip: pm: Fix PTR_ERR() argument
  ARM: imx: mach-imx6ul: Fix allmodconfig build
  clk: ti: fix for definition movement
  ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
  memory: kill off set_irq_flags usage
  rtc: snvs: select option REGMAP_MMIO
  ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
  ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
  soc: mediatek: Fix SCPSYS compilation
  ARM: at91/soc: add basic support for new sama5d2 SoC
  ...

Commit: 50686e8a3aed2f5d295e9d2e79ff43df461c7b76
Parents: c5fc2498 · 1ec6f701

Merge commit. Changes below are compared with the first parent: c5fc2498.

Changes

100 files changed · +2728 −517

File	Status	Add	Del	Content
Documentation/arm/Atmel/README	modified	+5	−0	View file
Documentation/devicetree/bindings/arm/atmel-at91.txt	modified	+2	−0	View file
Documentation/devicetree/bindings/crypto/fsl-sec4.txt	modified	+78	−13	View file
Documentation/devicetree/bindings/input/snvs-pwrkey.txt	added	+1	−0	View file
Documentation/devicetree/bindings/rtc/rtc-mxc.txt	added	+26	−0	View file
Documentation/devicetree/bindings/soc/mediatek/scpsys.txt	added	+41	−0	View file
MAINTAINERS	modified	+4	−1	View file
arch/arm/Kconfig.debug	modified	+15	−0	View file
arch/arm/boot/dts/am4372.dtsi	modified	+1	−0	View file
arch/arm/include/debug/at91.S	modified	+4	−1	View file
arch/arm/include/debug/imx-uart.h	modified	+13	−0	View file
arch/arm/include/debug/zynq.S	modified	+1	−1	View file
arch/arm/mach-at91/Kconfig	modified	+12	−0	View file
arch/arm/mach-at91/sama5.c	modified	+3	−0	View file
arch/arm/mach-at91/soc.h	modified	+3	−0	View file
arch/arm/mach-bcm/Kconfig	modified	+2	−0	View file
arch/arm/mach-davinci/cp_intc.c	modified	+1	−11	View file
arch/arm/mach-imx/Kconfig	modified	+8	−0	View file
arch/arm/mach-imx/Makefile	modified	+1	−0	View file
arch/arm/mach-imx/cpu.c	modified	+3	−0	View file
arch/arm/mach-imx/mach-imx6ul.c	added	+88	−0	View file
arch/arm/mach-imx/mxc.h	modified	+6	−0	View file
arch/arm/mach-mediatek/Kconfig	modified	+1	−0	View file
arch/arm/mach-mvebu/coherency.c	modified	+17	−12	View file
arch/arm/mach-mvebu/common.h	modified	+2	−2	View file
arch/arm/mach-mvebu/pm-board.c	modified	+19	−11	View file
arch/arm/mach-mvebu/pm.c	modified	+65	−14	View file
arch/arm/mach-omap2/Makefile	modified	+1	−2	View file
arch/arm/mach-omap2/board-generic.c	modified	+3	−3	View file
arch/arm/mach-omap2/clockdomain.h	modified	+2	−1	View file
arch/arm/mach-omap2/clockdomains7xx_data.c	modified	+1	−1	View file
arch/arm/mach-omap2/clockdomains81xx_data.c	modified	+20	−3	View file
arch/arm/mach-omap2/common.h	modified	+1	−0	View file
arch/arm/mach-omap2/control.c	modified	+1	−0	View file
arch/arm/mach-omap2/io.c	modified	+62	−8	View file
arch/arm/mach-omap2/iomap.h	modified	+63	−0	View file
arch/arm/mach-omap2/omap-iommu.c	modified	+1	−12	View file
arch/arm/mach-omap2/omap-mpuss-lowpower.c	modified	+1	−1	View file
arch/arm/mach-omap2/omap3-restart.c	modified	+1	−0	View file
arch/arm/mach-omap2/omap4-restart.c	modified	+1	−0	View file
arch/arm/mach-omap2/omap54xx.h	modified	+8	−0	View file
arch/arm/mach-omap2/omap_hwmod.c	modified	+15	−1	View file
arch/arm/mach-omap2/omap_hwmod.h	modified	+6	−1	View file
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c	modified	+1	−1	View file
arch/arm/mach-omap2/omap_hwmod_43xx_data.c	modified	+1	−1	View file
arch/arm/mach-omap2/omap_hwmod_81xx_data.c	modified	+376	−195	View file
arch/arm/mach-omap2/pdata-quirks.c	modified	+3	−3	View file
arch/arm/mach-omap2/powerdomains3xxx_data.c	modified	+123	−3	View file
arch/arm/mach-omap2/prcm-common.h	modified	+8	−0	View file
arch/arm/mach-omap2/prcm43xx.h	modified	+7	−0	View file
arch/arm/mach-omap2/prm44xx.c	modified	+37	−24	View file
arch/arm/mach-omap2/prm_common.c	modified	+1	−0	View file
arch/arm/mach-omap2/timer.c	modified	+2	−16	View file
arch/arm/mach-pxa/devices.c	modified	+37	−0	View file
arch/arm/mach-pxa/pxa25x.c	modified	+1	−0	View file
arch/arm/mach-pxa/pxa27x.c	modified	+1	−0	View file
arch/arm/mach-pxa/pxa3xx.c	modified	+1	−0	View file
arch/arm/mach-pxa/sharpsl_pm.c	modified	+2	−4	View file
arch/arm/mach-pxa/tosa-bt.c	modified	+1	−14	View file
arch/arm/mach-rockchip/platsmp.c	modified	+34	−22	View file
arch/arm/mach-rockchip/pm.c	modified	+69	−9	View file
arch/arm/mach-rockchip/pm.h	modified	+1	−11	View file
arch/arm/mach-shmobile/Kconfig	modified	+5	−0	View file
arch/arm/mach-shmobile/Makefile	modified	+2	−0	View file
arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c	modified	+2	−1	View file
arch/arm/mach-shmobile/setup-r8a7793.c	added	+33	−0	View file
arch/arm/mach-socfpga/core.h	modified	+1	−0	View file
arch/arm/mach-socfpga/platsmp.c	modified	+13	−0	View file
arch/arm/mach-socfpga/socfpga.c	modified	+26	−0	View file
arch/arm/mach-sti/headsmp.S	modified	+1	−0	View file
arch/arm/mach-sti/platsmp.c	modified	+52	−5	View file
arch/arm/mach-sti/smp.h	modified	+2	−0	View file
arch/arm/mach-uniphier/platsmp.c	modified	+1	−7	View file
arch/arm/mach-zx/Kconfig	modified	+1	−0	View file
arch/arm/mach-zx/Makefile	modified	+1	−1	View file
arch/arm/mach-zx/zx296702-pm-domain.c	added	+202	−0	View file
arch/arm/mach-zynq/common.c	modified	+2	−2	View file
arch/arm/mach-zynq/headsmp.S	modified	+1	−1	View file
arch/arm/plat-pxa/dma.c	modified	+11	−11	View file
arch/arm/plat-pxa/include/plat/dma.h	modified	+15	−0	View file
drivers/clk/ti/Makefile	modified	+1	−1	View file
drivers/clk/ti/clk-814x.c	added	+33	−0	View file
drivers/clk/ti/clk-816x.c	modified	+1	−1	View file
drivers/clk/zynq/Makefile	modified	+1	−1	View file
drivers/input/keyboard/Kconfig	modified	+11	−0	View file
drivers/input/keyboard/Makefile	modified	+1	−0	View file
drivers/input/keyboard/snvs_pwrkey.c	added	+227	−0	View file
drivers/memory/omap-gpmc.c	modified	+2	−3	View file
drivers/rtc/Kconfig	modified	+1	−0	View file
drivers/rtc/rtc-mxc.c	modified	+46	−14	View file
drivers/rtc/rtc-snvs.c	modified	+67	−65	View file
drivers/soc/mediatek/Kconfig	modified	+19	−0	View file
drivers/soc/mediatek/Makefile	modified	+2	−0	View file
drivers/soc/mediatek/mtk-infracfg.c	added	+91	−0	View file
drivers/soc/mediatek/mtk-pmic-wrap.c	modified	+0	−1	View file
drivers/soc/mediatek/mtk-scpsys.c	added	+488	−0	View file
include/dt-bindings/power/mt8173-power.h	added	+15	−0	View file
include/linux/clk/ti.h	modified	+2	−1	View file
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h	modified	+8	−0	View file
include/linux/soc/mediatek/infracfg.h	added	+26	−0	View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/arm/Atmel/README

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diff --git a/Documentation/arm/Atmel/README b/Documentation/arm/Atmel/README
index c53a19b..0931cf7 100644
--- a/Documentation/arm/Atmel/README
+++ b/Documentation/arm/Atmel/README
@@ -90,6 +90,11 @@ the Atmel website: http://www.atmel.com.
         + Datasheet
           http://www.atmel.com/Images/Atmel-11238-32-bit-Cortex-A5-Microcontroller-SAMA5D4_Datasheet.pdf
 
+      - sama5d2 family
+        - sama5d27
+        + Datasheet
+          Coming soon
+
 
 Linux kernel information
 ------------------------

Documentation/devicetree/bindings/arm/atmel-at91.txt

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diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index dd998b9..23c0978 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -27,6 +27,8 @@ compatible: must be one of:
     o "atmel,at91sam9xe"
  * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
    SoC family:
+    o "atmel,sama5d2" shall be extended with the specific SoC compatible:
+       - "atmel,sama5d27"
     o "atmel,sama5d3" shall be extended with the specific SoC compatible:
        - "atmel,sama5d31"
        - "atmel,sama5d33"

Documentation/devicetree/bindings/crypto/fsl-sec4.txt

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diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
index 1003073..6831d02 100644
--- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
+++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
@@ -305,12 +305,13 @@ Secure Non-Volatile Storage (SNVS) Node
     Node defines address range and the associated
     interrupt for the SNVS function.  This function
     monitors security state information & reports
-    security violations.
+    security violations. This also included rtc,
+    system power off and ON/OFF key.
 
   - compatible
       Usage: required
       Value type: <string>
-      Definition: Must include "fsl,sec-v4.0-mon".
+      Definition: Must include "fsl,sec-v4.0-mon" and "syscon".
 
   - reg
       Usage: required
@@ -341,7 +342,7 @@ Secure Non-Volatile Storage (SNVS) Node
            the child address, parent address, & length.
 
    - interrupts
-      Usage: required
+      Usage: optional
       Value type: <prop_encoded-array>
       Definition:  Specifies the interrupts generated by this
            device.  The value of the interrupts property
@@ -358,7 +359,7 @@ Secure Non-Volatile Storage (SNVS) Node
 
 EXAMPLE
 	sec_mon@314000 {
-		compatible = "fsl,sec-v4.0-mon";
+		compatible = "fsl,sec-v4.0-mon", "syscon";
 		reg = <0x314000 0x1000>;
 		ranges = <0 0x314000 0x1000>;
 		interrupt-parent = <&mpic>;
@@ -375,16 +376,72 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
       Value type: <string>
       Definition: Must include "fsl,sec-v4.0-mon-rtc-lp".
 
-  - reg
+  - interrupts
       Usage: required
-      Value type: <prop-encoded-array>
-      Definition: A standard property.  Specifies the physical
-          address and length of the SNVS LP configuration registers.
+      Value type: <prop_encoded-array>
+      Definition: Specifies the interrupts generated by this
+	   device.  The value of the interrupts property
+	   consists of one interrupt specifier. The format
+	   of the specifier is defined by the binding document
+	   describing the node's interrupt parent.
+
+ - regmap
+	Usage: required
+	Value type: <phandle>
+	Definition: this is phandle to the register map node.
+
+ - offset
+	Usage: option
+	value type: <u32>
+	Definition: LP register offset. default it is 0x34.
 
 EXAMPLE
-	sec_mon_rtc_lp@314000 {
+	sec_mon_rtc_lp@1 {
 		compatible = "fsl,sec-v4.0-mon-rtc-lp";
-		reg = <0x34 0x58>;
+		interrupts = <93 2>;
+		regmap = <&snvs>;
+		offset = <0x34>;
+	};
+
+=====================================================================
+System ON/OFF key driver
+
+  The snvs-pwrkey is designed to enable POWER key function which controlled
+  by SNVS ONOFF, the driver can report the status of POWER key and wakeup
+  system if pressed after system suspend.
+
+  - compatible:
+      Usage: required
+      Value type: <string>
+      Definition: Mush include "fsl,sec-v4.0-pwrkey".
+
+  - interrupts:
+      Usage: required
+      Value type: <prop_encoded-array>
+      Definition: The SNVS ON/OFF interrupt number to the CPU(s).
+
+  - linux,keycode:
+      Usage: option
+      Value type: <int>
+      Definition: Keycode to emit, KEY_POWER by default.
+
+  - wakeup-source:
+      Usage: option
+      Value type: <boo>
+      Definition: Button can wake-up the system.
+
+ - regmap:
+      Usage: required:
+      Value type: <phandle>
+      Definition: this is phandle to the register map node.
+
+EXAMPLE:
+	snvs-pwrkey@0x020cc000 {
+		compatible = "fsl,sec-v4.0-pwrkey";
+		regmap = <&snvs>;
+		interrupts = <0 4 0x4>
+	        linux,keycode = <116>; /* KEY_POWER */
+		wakeup;
 	};
 
 =====================================================================
@@ -460,12 +517,20 @@ FULL EXAMPLE
 		compatible = "fsl,sec-v4.0-mon";
 		reg = <0x314000 0x1000>;
 		ranges = <0 0x314000 0x1000>;
-		interrupt-parent = <&mpic>;
-		interrupts = <93 2>;
 
 		sec_mon_rtc_lp@34 {
 			compatible = "fsl,sec-v4.0-mon-rtc-lp";
-			reg = <0x34 0x58>;
+			regmap = <&sec_mon>;
+			offset = <0x34>;
+			interrupts = <93 2>;
+		};
+
+		snvs-pwrkey@0x020cc000 {
+			compatible = "fsl,sec-v4.0-pwrkey";
+			regmap = <&sec_mon>;
+			interrupts = <0 4 0x4>;
+			linux,keycode = <116>; /* KEY_POWER */
+			wakeup;
 		};
 	};
 

Documentation/devicetree/bindings/input/snvs-pwrkey.txt

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diff --git a/Documentation/devicetree/bindings/input/snvs-pwrkey.txt b/Documentation/devicetree/bindings/input/snvs-pwrkey.txt
new file mode 100644
index 0000000..70c1425
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/snvs-pwrkey.txt
@@ -0,0 +1 @@
+See Documentation/devicetree/bindings/crypto/fsl-sec4.txt

Documentation/devicetree/bindings/rtc/rtc-mxc.txt

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diff --git a/Documentation/devicetree/bindings/rtc/rtc-mxc.txt b/Documentation/devicetree/bindings/rtc/rtc-mxc.txt
new file mode 100644
index 0000000..5bcd31d
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/rtc-mxc.txt
@@ -0,0 +1,26 @@
+* Real Time Clock of the i.MX SoCs
+
+RTC controller for the i.MX SoCs
+
+Required properties:
+- compatible: Should be "fsl,imx1-rtc" or "fsl,imx21-rtc".
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: IRQ line for the RTC.
+- clocks: should contain two entries:
+  * one for the input reference
+  * one for the the SoC RTC
+- clock-names: should contain:
+  * "ref" for the input reference clock
+  * "ipg" for the SoC RTC clock
+
+Example:
+
+rtc@10007000 {
+	compatible = "fsl,imx21-rtc";
+	reg = <0x10007000 0x1000>;
+	interrupts = <22>;
+	clocks = <&clks IMX27_CLK_CKIL>,
+		 <&clks IMX27_CLK_RTC_IPG_GATE>;
+	clock-names = "ref", "ipg";
+};

Documentation/devicetree/bindings/soc/mediatek/scpsys.txt

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diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
new file mode 100644
index 0000000..c051114
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
@@ -0,0 +1,41 @@
+MediaTek SCPSYS
+===============
+
+The System Control Processor System (SCPSYS) has several power management
+related tasks in the system. The tasks include thermal measurement, dynamic
+voltage frequency scaling (DVFS), interrupt filter and lowlevel sleep control.
+The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power
+domain control.
+
+The driver implements the Generic PM domain bindings described in
+power/power_domain.txt. It provides the power domains defined in
+include/dt-bindings/power/mt8173-power.h.
+
+Required properties:
+- compatible: Must be "mediatek,mt8173-scpsys"
+- #power-domain-cells: Must be 1
+- reg: Address range of the SCPSYS unit
+- infracfg: must contain a phandle to the infracfg controller
+- clock, clock-names: clocks according to the common clock binding.
+                      The clocks needed "mm" and "mfg". These are the
+		      clocks which hardware needs to be enabled before
+		      enabling certain power domains.
+
+Example:
+
+	scpsys: scpsys@10006000 {
+		#power-domain-cells = <1>;
+		compatible = "mediatek,mt8173-scpsys";
+		reg = <0 0x10006000 0 0x1000>;
+		infracfg = <&infracfg>;
+		clocks = <&clk26m>,
+			 <&topckgen CLK_TOP_MM_SEL>;
+		clock-names = "mfg", "mm";
+	};
+
+Example consumer:
+
+	afe: mt8173-afe-pcm@11220000 {
+		compatible = "mediatek,mt8173-afe-pcm";
+		power-domains = <&scpsys MT8173_POWER_DOMAIN_AUDIO>;
+	};

MAINTAINERS

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diff --git a/MAINTAINERS b/MAINTAINERS
index 671a8f8..b772b85 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1583,7 +1583,10 @@ ARM/UNIPHIER ARCHITECTURE
 M:	Masahiro Yamada <[email protected]>
 L:	[email protected] (moderated for non-subscribers)
 S:	Maintained
+F:	arch/arm/boot/dts/uniphier*
 F:	arch/arm/mach-uniphier/
+F:	drivers/pinctrl/uniphier/
+F:	drivers/tty/serial/8250/8250_uniphier.c
 N:	uniphier
 
 ARM/Ux500 ARM ARCHITECTURE
@@ -1678,7 +1681,7 @@ M:	Michal Simek <[email protected]>
 R:	Sören Brinkmann <[email protected]>
 L:	[email protected] (moderated for non-subscribers)
 W:	http://wiki.xilinx.com
-T:	git git://git.xilinx.com/linux-xlnx.git
+T:	git https://github.com/Xilinx/linux-xlnx.git
 S:	Supported
 F:	arch/arm/mach-zynq/
 F:	drivers/cpuidle/cpuidle-zynq.c

arch/arm/Kconfig.debug

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diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index a2e16f9..0cfd7f9 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -141,6 +141,12 @@ choice
 		depends on ARCH_AT91
 		depends on SOC_SAMA5
 
+	config AT91_DEBUG_LL_DBGU3
+		bool "Kernel low-level debugging on sama5d2"
+		select DEBUG_AT91_UART
+		depends on ARCH_AT91
+		depends on SOC_SAMA5
+
 	config DEBUG_BCM2835
 		bool "Kernel low-level debugging on BCM2835 PL011 UART"
 		depends on ARCH_BCM2835
@@ -411,6 +417,13 @@ choice
 		  Say Y here if you want kernel low-level debugging support
 		  on i.MX6SX.
 
+	config DEBUG_IMX6UL_UART
+		bool "i.MX6UL Debug UART"
+		depends on SOC_IMX6UL
+		help
+		  Say Y here if you want kernel low-level debugging support
+		  on i.MX6UL.
+
 	config DEBUG_IMX7D_UART
 		bool "i.MX7D Debug UART"
 		depends on SOC_IMX7D
@@ -1269,6 +1282,7 @@ config DEBUG_IMX_UART_PORT
 						DEBUG_IMX6Q_UART || \
 						DEBUG_IMX6SL_UART || \
 						DEBUG_IMX6SX_UART || \
+						DEBUG_IMX6UL_UART || \
 						DEBUG_IMX7D_UART
 	default 1
 	depends on ARCH_MXC
@@ -1320,6 +1334,7 @@ config DEBUG_LL_INCLUDE
 				 DEBUG_IMX6Q_UART || \
 				 DEBUG_IMX6SL_UART || \
 				 DEBUG_IMX6SX_UART || \
+				 DEBUG_IMX6UL_UART || \
 				 DEBUG_IMX7D_UART
 	default "debug/ks8695.S" if DEBUG_KS8695_UART
 	default "debug/msm.S" if DEBUG_QCOM_UARTDM

arch/arm/boot/dts/am4372.dtsi

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diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ade28c7..359a3b6 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -86,6 +86,7 @@
 			prcm: prcm@1f0000 {
 				compatible = "ti,am4-prcm";
 				reg = <0x1f0000 0x11000>;
+				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 
 				prcm_clocks: clocks {
 					#address-cells = <1>;

arch/arm/include/debug/at91.S

View file

diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index c3c45e6..2556a88 100644
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -13,9 +13,12 @@
 #define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */
 #elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
 #define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */
-#else
+#elif defined(CONFIG_AT91_DEBUG_LL_DBGU2)
 /* On sama5d4, use USART3 as low level serial console */
 #define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
+#else
+/* On sama5d2, use UART1 as low level serial console */
+#define AT91_DBGU 0xf8020000
 #endif
 
 #ifdef CONFIG_MMU

arch/arm/include/debug/imx-uart.h

View file

diff --git a/arch/arm/include/debug/imx-uart.h b/arch/arm/include/debug/imx-uart.h
index 66f736f..bce58e9 100644
--- a/arch/arm/include/debug/imx-uart.h
+++ b/arch/arm/include/debug/imx-uart.h
@@ -90,6 +90,17 @@
 #define IMX6SX_UART_BASE_ADDR(n) IMX6SX_UART##n##_BASE_ADDR
 #define IMX6SX_UART_BASE(n)	IMX6SX_UART_BASE_ADDR(n)
 
+#define IMX6UL_UART1_BASE_ADDR	0x02020000
+#define IMX6UL_UART2_BASE_ADDR	0x021e8000
+#define IMX6UL_UART3_BASE_ADDR	0x021ec000
+#define IMX6UL_UART4_BASE_ADDR	0x021f0000
+#define IMX6UL_UART5_BASE_ADDR	0x021f4000
+#define IMX6UL_UART6_BASE_ADDR	0x021fc000
+#define IMX6UL_UART7_BASE_ADDR	0x02018000
+#define IMX6UL_UART8_BASE_ADDR	0x02024000
+#define IMX6UL_UART_BASE_ADDR(n) IMX6UL_UART##n##_BASE_ADDR
+#define IMX6UL_UART_BASE(n)	IMX6UL_UART_BASE_ADDR(n)
+
 #define IMX7D_UART1_BASE_ADDR	0x30860000
 #define IMX7D_UART2_BASE_ADDR	0x30890000
 #define IMX7D_UART3_BASE_ADDR	0x30880000
@@ -124,6 +135,8 @@
 #define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6SL)
 #elif defined(CONFIG_DEBUG_IMX6SX_UART)
 #define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6SX)
+#elif defined(CONFIG_DEBUG_IMX6UL_UART)
+#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6UL)
 #elif defined(CONFIG_DEBUG_IMX7D_UART)
 #define UART_PADDR	IMX_DEBUG_UART_BASE(IMX7D)
 

arch/arm/include/debug/zynq.S

View file

diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S
index bd13ded..de86b92 100644
--- a/arch/arm/include/debug/zynq.S
+++ b/arch/arm/include/debug/zynq.S
@@ -38,7 +38,7 @@
 		.endm
 
 		.macro	senduart,rd,rx
-		str	\rd, [\rx, #UART_FIFO_OFFSET]	@ TXDATA
+		strb	\rd, [\rx, #UART_FIFO_OFFSET]	@ TXDATA
 		.endm
 
 		.macro	waituart,rd,rx

arch/arm/mach-at91/Kconfig

View file

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index fd95f34..89a755b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -8,6 +8,18 @@ menuconfig ARCH_AT91
 	select SOC_BUS
 
 if ARCH_AT91
+config SOC_SAMA5D2
+	bool "SAMA5D2 family" if ARCH_MULTI_V7
+	select SOC_SAMA5
+	select CACHE_L2X0
+	select HAVE_FB_ATMEL
+	select HAVE_AT91_UTMI
+	select HAVE_AT91_USB_CLK
+	select HAVE_AT91_H32MX
+	select HAVE_AT91_GENERATED_CLK
+	help
+	  Select this if ou are using one of Atmel's SAMA5D2 family SoC.
+
 config SOC_SAMA5D3
 	bool "SAMA5D3 family" if ARCH_MULTI_V7
 	select SOC_SAMA5

arch/arm/mach-at91/sama5.c

View file

diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91/sama5.c
index 8fc4763..d9cf679 100644
--- a/arch/arm/mach-at91/sama5.c
+++ b/arch/arm/mach-at91/sama5.c
@@ -18,6 +18,8 @@
 #include "soc.h"
 
 static const struct at91_soc sama5_socs[] = {
+	AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27_EXID_MATCH,
+		 "sama5d27", "sama5d2"),
 	AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
 		 "sama5d31", "sama5d3"),
 	AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
@@ -64,6 +66,7 @@ DT_MACHINE_START(sama5_dt, "Atmel SAMA5")
 MACHINE_END
 
 static const char *const sama5_alt_dt_board_compat[] __initconst = {
+	"atmel,sama5d2",
 	"atmel,sama5d4",
 	NULL
 };

arch/arm/mach-at91/soc.h

View file

diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index be23c40..8ede0ef 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -62,6 +62,9 @@ at91_soc_init(const struct at91_soc *socs);
 #define AT91SAM9XE256_CIDR_MATCH	0x329a93a0
 #define AT91SAM9XE512_CIDR_MATCH	0x329aa3a0
 
+#define SAMA5D2_CIDR_MATCH		0x0a5c08c0
+#define SAMA5D27_EXID_MATCH		0x00000021
+
 #define SAMA5D3_CIDR_MATCH		0x0a5c07c0
 #define SAMA5D31_EXID_MATCH		0x00444300
 #define SAMA5D33_EXID_MATCH		0x00414300

arch/arm/mach-bcm/Kconfig

View file

diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 0ac9e4b..1319c3c 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -140,10 +140,12 @@ config ARCH_BCM_63XX
 config ARCH_BRCMSTB
 	bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7
 	select ARM_GIC
+	select ARM_ERRATA_798181 if SMP
 	select HAVE_ARM_ARCH_TIMER
 	select BRCMSTB_GISB_ARB
 	select BRCMSTB_L2_IRQ
 	select BCM7120_L2_IRQ
+	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
 	select ARCH_WANT_OPTIONAL_GPIOLIB
 	help
 	  Say Y if you intend to run the kernel on a Broadcom ARM-based STB

arch/arm/mach-davinci/cp_intc.c

View file

diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index bf12ce6..507aad4 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -85,23 +85,13 @@ static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
 	return 0;
 }
 
-/*
- * Faking this allows us to to work with suspend functions of
- * generic drivers which call {enable|disable}_irq_wake for
- * wake up interrupt sources (eg RTC on DA850).
- */
-static int cp_intc_set_wake(struct irq_data *d, unsigned int on)
-{
-	return 0;
-}
-
 static struct irq_chip cp_intc_irq_chip = {
 	.name		= "cp_intc",
 	.irq_ack	= cp_intc_ack_irq,
 	.irq_mask	= cp_intc_mask_irq,
 	.irq_unmask	= cp_intc_unmask_irq,
 	.irq_set_type	= cp_intc_set_irq_type,
-	.irq_set_wake	= cp_intc_set_wake,
+	.flags		= IRQCHIP_SKIP_SET_WAKE,
 };
 
 static struct irq_domain *cp_intc_domain;

arch/arm/mach-imx/Kconfig

View file

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 573536f..8ceda28 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -548,6 +548,14 @@ config SOC_IMX6SX
 	help
 	  This enables support for Freescale i.MX6 SoloX processor.
 
+config SOC_IMX6UL
+	bool "i.MX6 UltraLite support"
+	select PINCTRL_IMX6UL
+	select SOC_IMX6
+
+	help
+	  This enables support for Freescale i.MX6 UltraLite processor.
+
 config SOC_IMX7D
 	bool "i.MX7 Dual support"
 	select PINCTRL_IMX7D

arch/arm/mach-imx/Makefile

View file

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 37c502a..fb689d8 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -83,6 +83,7 @@ endif
 obj-$(CONFIG_SOC_IMX6Q) += mach-imx6q.o
 obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o
 obj-$(CONFIG_SOC_IMX6SX) += mach-imx6sx.o
+obj-$(CONFIG_SOC_IMX6UL) += mach-imx6ul.o
 obj-$(CONFIG_SOC_IMX7D) += mach-imx7d.o
 
 ifeq ($(CONFIG_SUSPEND),y)

arch/arm/mach-imx/cpu.c

View file

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index a7fa92a..5b0f752 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -130,6 +130,9 @@ struct device * __init imx_soc_device_init(void)
 	case MXC_CPU_IMX6Q:
 		soc_id = "i.MX6Q";
 		break;
+	case MXC_CPU_IMX6UL:
+		soc_id = "i.MX6UL";
+		break;
 	case MXC_CPU_IMX7D:
 		soc_id = "i.MX7D";
 		break;

arch/arm/mach-imx/mach-imx6ul.c

View file

diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
new file mode 100644
index 0000000..1b97fe1
--- /dev/null
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/irqchip.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
+#include <linux/micrel_phy.h>
+#include <linux/of_platform.h>
+#include <linux/phy.h>
+#include <linux/regmap.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include "common.h"
+
+static void __init imx6ul_enet_clk_init(void)
+{
+	struct regmap *gpr;
+
+	gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
+	if (!IS_ERR(gpr))
+		regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
+				   IMX6UL_GPR1_ENET_CLK_OUTPUT);
+	else
+		pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
+
+}
+
+static int ksz8081_phy_fixup(struct phy_device *dev)
+{
+	if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
+		phy_write(dev, 0x1f, 0x8110);
+		phy_write(dev, 0x16, 0x201);
+	} else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
+		phy_write(dev, 0x1f, 0x8190);
+		phy_write(dev, 0x16, 0x202);
+	}
+
+	return 0;
+}