projects/linux·commit 533b220f

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

533b220f · Linus Torvalds <[email protected]> · 2020-06-01 15:18:27 -07:00

Pull arm64 updates from Will Deacon:
 "A sizeable pile of arm64 updates for 5.8.

  Summary below, but the big two features are support for Branch Target
  Identification and Clang's Shadow Call stack. The latter is currently
  arm64-only, but the high-level parts are all in core code so it could
  easily be adopted by other architectures pending toolchain support

  Branch Target Identification (BTI):

   - Support for ARMv8.5-BTI in both user- and kernel-space. This allows
     branch targets to limit the types of branch from which they can be
     called and additionally prevents branching to arbitrary code,
     although kernel support requires a very recent toolchain.

   - Function annotation via SYM_FUNC_START() so that assembly functions
     are wrapped with the relevant "landing pad" instructions.

   - BPF and vDSO updates to use the new instructions.

   - Addition of a new HWCAP and exposure of BTI capability to userspace
     via ID register emulation, along with ELF loader support for the
     BTI feature in .note.gnu.property.

   - Non-critical fixes to CFI unwind annotations in the sigreturn
     trampoline.

  Shadow Call Stack (SCS):

   - Support for Clang's Shadow Call Stack feature, which reserves
     platform register x18 to point at a separate stack for each task
     that holds only return addresses. This protects function return
     control flow from buffer overruns on the main stack.

   - Save/restore of x18 across problematic boundaries (user-mode,
     hypervisor, EFI, suspend, etc).

   - Core support for SCS, should other architectures want to use it
     too.

   - SCS overflow checking on context-switch as part of the existing
     stack limit check if CONFIG_SCHED_STACK_END_CHECK=y.

  CPU feature detection:

   - Removed numerous "SANITY CHECK" errors when running on a system
     with mismatched AArch32 support at EL1. This is primarily a concern
     for KVM, which disabled support for 32-bit guests on such a system.

   - Addition of new ID registers and fields as the architecture has
     been extended.

  Perf and PMU drivers:

   - Minor fixes and cleanups to system PMU drivers.

  Hardware errata:

   - Unify KVM workarounds for VHE and nVHE configurations.

   - Sort vendor errata entries in Kconfig.

  Secure Monitor Call Calling Convention (SMCCC):

   - Update to the latest specification from Arm (v1.2).

   - Allow PSCI code to query the SMCCC version.

  Software Delegated Exception Interface (SDEI):

   - Unexport a bunch of unused symbols.

   - Minor fixes to handling of firmware data.

  Pointer authentication:

   - Add support for dumping the kernel PAC mask in vmcoreinfo so that
     the stack can be unwound by tools such as kdump.

   - Simplification of key initialisation during CPU bringup.

  BPF backend:

   - Improve immediate generation for logical and add/sub instructions.

  vDSO:

   - Minor fixes to the linker flags for consistency with other
     architectures and support for LLVM's unwinder.

   - Clean up logic to initialise and map the vDSO into userspace.

  ACPI:

   - Work around for an ambiguity in the IORT specification relating to
     the "num_ids" field.

   - Support _DMA method for all named components rather than only PCIe
     root complexes.

   - Minor other IORT-related fixes.

  Miscellaneous:

   - Initialise debug traps early for KGDB and fix KDB cacheflushing
     deadlock.

   - Minor tweaks to early boot state (documentation update, set
     TEXT_OFFSET to 0x0, increase alignment of PE/COFF sections).

   - Refactoring and cleanup"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (148 commits)
  KVM: arm64: Move __load_guest_stage2 to kvm_mmu.h
  KVM: arm64: Check advertised Stage-2 page size capability
  arm64/cpufeature: Add get_arm64_ftr_reg_nowarn()
  ACPI/IORT: Remove the unused __get_pci_rid()
  arm64/cpuinfo: Add ID_MMFR4_EL1 into the cpuinfo_arm64 context
  arm64/cpufeature: Add remaining feature bits in ID_AA64PFR1 register
  arm64/cpufeature: Add remaining feature bits in ID_AA64PFR0 register
  arm64/cpufeature: Add remaining feature bits in ID_AA64ISAR0 register
  arm64/cpufeature: Add remaining feature bits in ID_MMFR4 register
  arm64/cpufeature: Add remaining feature bits in ID_PFR0 register
  arm64/cpufeature: Introduce ID_MMFR5 CPU register
  arm64/cpufeature: Introduce ID_DFR1 CPU register
  arm64/cpufeature: Introduce ID_PFR2 CPU register
  arm64/cpufeature: Make doublelock a signed feature in ID_AA64DFR0
  arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register
  arm64/cpufeature: Add explicit ftr_id_isar0[] for ID_ISAR0 register
  arm64: mm: Add asid_gen_match() helper
  firmware: smccc: Fix missing prototype warning for arm_smccc_version_init
  arm64: vdso: Fix CFI directives in sigreturn trampoline
  arm64: vdso: Don't prefix sigreturn trampoline with a BTI C instruction
  ...
Commit
533b220f7be4e461a5222a223d169b42856741ef
Parents
3ee3723b · 082af5ec

Merge commit. Changes below are compared with the first parent: 3ee3723b.

Changes

159 files changed · +2559 −976

FileStatusAddDelContent
Documentation/admin-guide/kdump/vmcoreinfo.rstmodified+6−0View file
Documentation/arm64/booting.rstmodified+2−1View file
Documentation/arm64/cpu-feature-registers.rstmodified+2−0View file
Documentation/arm64/elf_hwcaps.rstmodified+5−0View file
Documentation/arm64/silicon-errata.rstmodified+4−4View file
Documentation/filesystems/proc.rstmodified+1−0View file
MAINTAINERSmodified+9−0View file
Makefilemodified+6−0View file
arch/Kconfigmodified+25−0View file
arch/arm64/Kconfigmodified+105−57View file
arch/arm64/Makefilemodified+13−3View file
arch/arm64/include/asm/asm_pointer_auth.hmodified+38−5View file
arch/arm64/include/asm/assembler.hmodified+50−0View file
arch/arm64/include/asm/cacheflush.hmodified+3−3View file
arch/arm64/include/asm/compiler.hmodified+0−4View file
arch/arm64/include/asm/cpu.hmodified+4−0View file
arch/arm64/include/asm/cpucaps.hmodified+9−8View file
arch/arm64/include/asm/cpufeature.hmodified+30−0View file
arch/arm64/include/asm/debug-monitors.hmodified+2−0View file
arch/arm64/include/asm/elf.hmodified+50−0View file
arch/arm64/include/asm/esr.hmodified+1−1View file
arch/arm64/include/asm/exception.hmodified+1−0View file
arch/arm64/include/asm/hwcap.hmodified+1−0View file
arch/arm64/include/asm/insn.hmodified+27−3View file
arch/arm64/include/asm/kvm_emulate.hmodified+4−2View file
arch/arm64/include/asm/kvm_host.hmodified+1−5View file
arch/arm64/include/asm/kvm_hyp.hmodified+1−19View file
arch/arm64/include/asm/kvm_mmu.hmodified+18−1View file
arch/arm64/include/asm/linkage.hmodified+46−0View file
arch/arm64/include/asm/mman.hadded+37−0View file
arch/arm64/include/asm/pgtable-hwdef.hmodified+1−1View file
arch/arm64/include/asm/pgtable-prot.hmodified+11−0View file
arch/arm64/include/asm/pgtable.hmodified+5−4View file
arch/arm64/include/asm/ptrace.hmodified+1−0View file
arch/arm64/include/asm/scs.hadded+29−0View file
arch/arm64/include/asm/smp.hmodified+0−11View file
arch/arm64/include/asm/stacktrace.hmodified+14−26View file
arch/arm64/include/asm/suspend.hmodified+1−1View file
arch/arm64/include/asm/sysreg.hmodified+65−12View file
arch/arm64/include/asm/thread_info.hmodified+13−0View file
arch/arm64/include/uapi/asm/hwcap.hmodified+1−0View file
arch/arm64/include/uapi/asm/mman.hadded+9−0View file
arch/arm64/include/uapi/asm/ptrace.hmodified+9−0View file
arch/arm64/kernel/Makefilemodified+1−0View file
arch/arm64/kernel/asm-offsets.cmodified+4−3View file
arch/arm64/kernel/cpu-reset.Smodified+2−2View file
arch/arm64/kernel/cpu_errata.cmodified+13−16View file
arch/arm64/kernel/cpufeature.cmodified+383−72View file
arch/arm64/kernel/cpuinfo.cmodified+7−2View file
arch/arm64/kernel/crash_core.cmodified+4−0View file
arch/arm64/kernel/debug-monitors.cmodified+1−3View file
arch/arm64/kernel/efi-entry.Smodified+1−1View file
arch/arm64/kernel/efi-header.Smodified+1−1View file
arch/arm64/kernel/efi-rt-wrapper.Smodified+12−3View file
arch/arm64/kernel/entry-common.cmodified+12−1View file
arch/arm64/kernel/entry-fpsimd.Smodified+10−10View file
arch/arm64/kernel/entry-ftrace.Smodified+3−2View file
arch/arm64/kernel/entry.Smodified+51−18View file
arch/arm64/kernel/head.Smodified+34−15View file
arch/arm64/kernel/hibernate-asm.Smodified+8−8View file
arch/arm64/kernel/hyp-stub.Smodified+10−10View file
arch/arm64/kernel/image-vars.hmodified+1−1View file
arch/arm64/kernel/insn.cmodified+29−17View file
arch/arm64/kernel/machine_kexec_file.cmodified+7−7View file
arch/arm64/kernel/paravirt.cmodified+1−1View file
arch/arm64/kernel/probes/decode-insn.cmodified+1−1View file
arch/arm64/kernel/probes/kprobes_trampoline.Smodified+2−2View file
arch/arm64/kernel/process.cmodified+39−2View file
arch/arm64/kernel/ptrace.cmodified+1−1View file
arch/arm64/kernel/reloc_test_syms.Smodified+22−22View file
arch/arm64/kernel/relocate_kernel.Smodified+2−2View file
arch/arm64/kernel/scs.cadded+16−0View file
arch/arm64/kernel/sdei.cmodified+2−26View file
arch/arm64/kernel/signal.cmodified+16−0View file
arch/arm64/kernel/sleep.Smodified+6−7View file
arch/arm64/kernel/smccc-call.Smodified+4−4View file
arch/arm64/kernel/smp.cmodified+1−9View file
arch/arm64/kernel/syscall.cmodified+18−0View file
arch/arm64/kernel/traps.cmodified+72−61View file
arch/arm64/kernel/vdso.cmodified+73−82View file
arch/arm64/kernel/vdso/Makefilemodified+8−4View file
arch/arm64/kernel/vdso/note.Smodified+3−0View file
arch/arm64/kernel/vdso/sigreturn.Smodified+47−7View file
arch/arm64/kernel/vdso/vdso.Smodified+3−0View file
arch/arm64/kernel/vdso32/sigreturn.Smodified+11−8View file
arch/arm64/kernel/vmlinux.lds.Smodified+7−11View file
arch/arm64/kvm/hyp/switch.cmodified+3−3View file
arch/arm64/kvm/hyp/sysreg-sr.cmodified+4−2View file
arch/arm64/kvm/hyp/tlb.cmodified+6−5View file
arch/arm64/kvm/reset.cmodified+50−15View file
arch/arm64/kvm/sys_regs.cmodified+3−3View file
arch/arm64/lib/copy_from_user.Smodified+16−16View file
arch/arm64/lib/copy_in_user.Smodified+16−16View file
arch/arm64/lib/copy_to_user.Smodified+16−16View file
arch/arm64/lib/crc32.Smodified+1−1View file
arch/arm64/lib/memcpy.Smodified+16−16View file
arch/arm64/mm/context.cmodified+5−3View file
arch/arm64/mm/dump.cmodified+5−0View file
arch/arm64/mm/init.cmodified+1−1View file
arch/arm64/mm/mmu.cmodified+24−0View file
arch/arm64/mm/pageattr.cmodified+2−2View file
arch/arm64/mm/proc.Smodified+15−45View file
arch/arm64/net/bpf_jit.hmodified+30−0View file
arch/arm64/net/bpf_jit_comp.cmodified+71−14View file
arch/x86/Kconfigmodified+1−0View file
arch/x86/Kconfig.debugmodified+0−9View file
arch/x86/entry/entry_32.Smodified+0−2View file
arch/x86/include/asm/doublefault.hmodified+1−1View file
arch/x86/include/asm/traps.hmodified+0−2View file
arch/x86/kernel/Makefilemodified+1−3View file
arch/x86/kernel/dumpstack_32.cmodified+0−4View file
arch/x86/kernel/traps.cmodified+0−2View file
arch/x86/mm/cpu_entry_area.cmodified+1−3View file
drivers/acpi/arm64/gtdt.cmodified+3−1View file
drivers/acpi/arm64/iort.cmodified+50−76View file
drivers/base/node.cmodified+6−0View file
drivers/firmware/Kconfigmodified+2−4View file
drivers/firmware/Makefilemodified+2−1View file
drivers/firmware/arm_sdei.cmodified+21−28View file
drivers/firmware/efi/libstub/Makefilemodified+3−0View file
drivers/firmware/psci/psci.cmodified+5−16View file
drivers/firmware/smccc/Kconfigadded+16−0View file
drivers/firmware/smccc/Makefileadded+3−0View file
drivers/firmware/smccc/smccc.cadded+31−0View file
drivers/perf/Kconfigmodified+2−7View file
drivers/perf/arm_dsu_pmu.cmodified+1−3View file
drivers/perf/arm_smmuv3_pmu.cmodified+4−1View file
drivers/perf/arm_spe_pmu.cmodified+1−3View file
drivers/perf/hisilicon/Kconfigadded+7−0View file
drivers/perf/hisilicon/Makefilemodified+2−1View file
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.cmodified+6−4View file
drivers/perf/hisilicon/hisi_uncore_hha_pmu.cmodified+7−5View file
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.cmodified+6−4View file
drivers/perf/hisilicon/hisi_uncore_pmu.cmodified+21−2View file
fs/Kconfig.binfmtmodified+6−0View file
fs/binfmt_elf.cmodified+139−6View file
fs/compat_binfmt_elf.cmodified+4−0View file
fs/proc/meminfo.cmodified+4−0View file
fs/proc/task_mmu.cmodified+3−0View file
include/linux/arm-smccc.hmodified+23−2View file
include/linux/compiler-clang.hmodified+4−0View file
include/linux/compiler_types.hmodified+4−0View file
include/linux/elf.hmodified+43−0View file
include/linux/linkage.hmodified+4−4View file
include/linux/mm.hmodified+3−0View file
include/linux/mmzone.hmodified+3−0View file
include/linux/psci.hmodified+0−7View file
include/linux/scs.hadded+72−0View file
include/uapi/linux/elf.hmodified+11−0View file
init/init_task.cmodified+8−0View file
kernel/Makefilemodified+1−0View file
kernel/fork.cmodified+9−0View file
kernel/sched/core.cmodified+5−0View file
kernel/scs.cadded+104−0View file
lib/Kconfigmodified+3−0View file
mm/page_alloc.cmodified+6−0View file
mm/vmstat.cmodified+3−0View file
tools/testing/selftests/wireguard/qemu/debug.configmodified+0−1View file
virt/kvm/arm/arm.cmodified+1−3View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/admin-guide/kdump/vmcoreinfo.rst

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diff --git a/Documentation/admin-guide/kdump/vmcoreinfo.rst b/Documentation/admin-guide/kdump/vmcoreinfo.rst
index 007a6b8..e4ee8b2 100644
--- a/Documentation/admin-guide/kdump/vmcoreinfo.rst
+++ b/Documentation/admin-guide/kdump/vmcoreinfo.rst
@@ -393,6 +393,12 @@ KERNELOFFSET
The kernel randomization offset. Used to compute the page offset. If
KASLR is disabled, this value is zero.
+KERNELPACMASK
+-------------
+
+The mask to extract the Pointer Authentication Code from a kernel virtual
+address.
+
arm
===

Documentation/arm64/booting.rst

View file
diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst
index a3f1a47..d063c05 100644
--- a/Documentation/arm64/booting.rst
+++ b/Documentation/arm64/booting.rst
@@ -173,7 +173,8 @@ Before jumping into the kernel, the following conditions must be met:
- Caches, MMUs
The MMU must be off.
- Instruction cache may be on or off.
+ The instruction cache may be on or off, and must not hold any stale
+ entries corresponding to the loaded kernel image.
The address range corresponding to the loaded kernel image must be
cleaned to the PoC. In the presence of a system cache or other
coherent masters with caches enabled, this will typically require

Documentation/arm64/cpu-feature-registers.rst

View file
diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
index 41937a8..314fa5b 100644
--- a/Documentation/arm64/cpu-feature-registers.rst
+++ b/Documentation/arm64/cpu-feature-registers.rst
@@ -176,6 +176,8 @@ infrastructure:
+------------------------------+---------+---------+
| SSBS | [7-4] | y |
+------------------------------+---------+---------+
+ | BT | [3-0] | y |
+ +------------------------------+---------+---------+
4) MIDR_EL1 - Main ID Register

Documentation/arm64/elf_hwcaps.rst

View file
diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst
index 7dfb97d..84a9fd2 100644
--- a/Documentation/arm64/elf_hwcaps.rst
+++ b/Documentation/arm64/elf_hwcaps.rst
@@ -236,6 +236,11 @@ HWCAP2_RNG
Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.
+HWCAP2_BTI
+
+ Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001.
+
+
4. Unused AT_HWCAP bits
-----------------------

Documentation/arm64/silicon-errata.rst

View file
diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst
index 2c08c62..936cf2a 100644
--- a/Documentation/arm64/silicon-errata.rst
+++ b/Documentation/arm64/silicon-errata.rst
@@ -64,6 +64,10 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A53 | #843419 | ARM64_ERRATUM_843419 |
+----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A55 | #1530923 | ARM64_ERRATUM_1530923 |
++----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A57 | #852523 | N/A |
@@ -78,8 +82,6 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |
-+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #1188873,1418040| ARM64_ERRATUM_1418040 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 |
@@ -88,8 +90,6 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A55 | #1530923 | ARM64_ERRATUM_1530923 |
-+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N1 | #1349291 | N/A |

Documentation/filesystems/proc.rst

View file
diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst
index 38b6069..9969bf4 100644
--- a/Documentation/filesystems/proc.rst
+++ b/Documentation/filesystems/proc.rst
@@ -543,6 +543,7 @@ encoded manner. The codes are the following:
hg huge page advise flag
nh no huge page advise flag
mg mergable advise flag
+ bt - arm64 BTI guarded page
== =======================================
Note that there is no guarantee that every flag and associated mnemonic will

MAINTAINERS

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diff --git a/MAINTAINERS b/MAINTAINERS
index 110ac19..47341fb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15518,6 +15518,15 @@ M: Nicolas Pitre <[email protected]>
S: Odd Fixes
F: drivers/net/ethernet/smsc/smc91x.*
+SECURE MONITOR CALL(SMC) CALLING CONVENTION (SMCCC)
+M: Mark Rutland <[email protected]>
+M: Lorenzo Pieralisi <[email protected]>
+M: Sudeep Holla <[email protected]>
+S: Maintained
+F: drivers/firmware/smccc/
+F: include/linux/arm-smccc.h
+
SMIA AND SMIA++ IMAGE SENSOR DRIVER
M: Sakari Ailus <[email protected]>

Makefile

View file
diff --git a/Makefile b/Makefile
index b668725..a7bc91c 100644
--- a/Makefile
+++ b/Makefile
@@ -862,6 +862,12 @@ ifdef CONFIG_LIVEPATCH
KBUILD_CFLAGS += $(call cc-option, -flive-patching=inline-clone)
endif
+ifdef CONFIG_SHADOW_CALL_STACK
+CC_FLAGS_SCS := -fsanitize=shadow-call-stack
+KBUILD_CFLAGS += $(CC_FLAGS_SCS)
+export CC_FLAGS_SCS
+endif
+
# arch Makefile may override CC so keep this after arch Makefile is included
NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)

arch/Kconfig

View file
diff --git a/arch/Kconfig b/arch/Kconfig
index 786a85d..2e6f843 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -533,6 +533,31 @@ config STACKPROTECTOR_STRONG
about 20% of all kernel functions, which increases the kernel code
size by about 2%.
+config ARCH_SUPPORTS_SHADOW_CALL_STACK
+ bool
+ help
+ An architecture should select this if it supports Clang's Shadow
+ Call Stack and implements runtime support for shadow stack
+ switching.
+
+config SHADOW_CALL_STACK
+ bool "Clang Shadow Call Stack"
+ depends on CC_IS_CLANG && ARCH_SUPPORTS_SHADOW_CALL_STACK
+ depends on DYNAMIC_FTRACE_WITH_REGS || !FUNCTION_GRAPH_TRACER
+ help
+ This option enables Clang's Shadow Call Stack, which uses a
+ shadow stack to protect function return addresses from being
+ overwritten by an attacker. More information can be found in
+ Clang's documentation:
+
+ https://clang.llvm.org/docs/ShadowCallStack.html
+
+ Note that security guarantees in the kernel differ from the
+ ones documented for user space. The kernel must store addresses
+ of shadow stacks in memory, which means an attacker capable of
+ reading and writing arbitrary memory may be able to locate them
+ and hijack control flow by modifying the stacks.
+
config HAVE_ARCH_WITHIN_STACK_FRAMES
bool
help

arch/arm64/Kconfig

View file
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 819d62a..552d36c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -9,6 +9,7 @@ config ARM64
select ACPI_MCFG if (ACPI && PCI)
select ACPI_SPCR_TABLE if ACPI
select ACPI_PPTT if ACPI
+ select ARCH_BINFMT_ELF_STATE
select ARCH_HAS_DEBUG_VIRTUAL
select ARCH_HAS_DEVMEM_IS_ALLOWED
select ARCH_HAS_DMA_PREP_COHERENT
@@ -33,6 +34,7 @@ config ARM64
select ARCH_HAS_SYSCALL_WRAPPER
select ARCH_HAS_TEARDOWN_DMA_OPS if IOMMU_SUPPORT
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
+ select ARCH_HAVE_ELF_PROT
select ARCH_HAVE_NMI_SAFE_CMPXCHG
select ARCH_INLINE_READ_LOCK if !PREEMPTION
select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
@@ -62,9 +64,12 @@ config ARM64
select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
select ARCH_KEEP_MEMBLOCK
select ARCH_USE_CMPXCHG_LOCKREF
+ select ARCH_USE_GNU_PROPERTY
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
+ select ARCH_USE_SYM_ANNOTATIONS
select ARCH_SUPPORTS_MEMORY_FAILURE
+ select ARCH_SUPPORTS_SHADOW_CALL_STACK if CC_HAVE_SHADOW_CALL_STACK
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 && (GCC_VERSION >= 50000 || CC_IS_CLANG)
select ARCH_SUPPORTS_NUMA_BALANCING
@@ -525,13 +530,13 @@ config ARM64_ERRATUM_1418040
If unsure, say Y.
-config ARM64_WORKAROUND_SPECULATIVE_AT_VHE
+config ARM64_WORKAROUND_SPECULATIVE_AT
bool
config ARM64_ERRATUM_1165522
- bool "Cortex-A76: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
+ bool "Cortex-A76: 1165522: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
default y
- select ARM64_WORKAROUND_SPECULATIVE_AT_VHE
+ select ARM64_WORKAROUND_SPECULATIVE_AT
help
This option adds a workaround for ARM Cortex-A76 erratum 1165522.
@@ -541,10 +546,23 @@ config ARM64_ERRATUM_1165522
If unsure, say Y.
+config ARM64_ERRATUM_1319367
+ bool "Cortex-A57/A72: 1319537: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
+ default y
+ select ARM64_WORKAROUND_SPECULATIVE_AT
+ help
+ This option adds work arounds for ARM Cortex-A57 erratum 1319537
+ and A72 erratum 1319367
+
+ Cortex-A57 and A72 cores could end-up with corrupted TLBs by
+ speculating an AT instruction during a guest context switch.
+
+ If unsure, say Y.
+
config ARM64_ERRATUM_1530923
- bool "Cortex-A55: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
+ bool "Cortex-A55: 1530923: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
default y
- select ARM64_WORKAROUND_SPECULATIVE_AT_VHE
+ select ARM64_WORKAROUND_SPECULATIVE_AT
help
This option adds a workaround for ARM Cortex-A55 erratum 1530923.
@@ -554,6 +572,9 @@ config ARM64_ERRATUM_1530923
If unsure, say Y.
+config ARM64_WORKAROUND_REPEAT_TLBI
+ bool
+
config ARM64_ERRATUM_1286807
bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-after-read ordering violation"
default y
@@ -570,22 +591,6 @@ config ARM64_ERRATUM_1286807
invalidated has been observed by other observers. The
workaround repeats the TLBI+DSB operation.
-config ARM64_WORKAROUND_SPECULATIVE_AT_NVHE
- bool
-
-config ARM64_ERRATUM_1319367
- bool "Cortex-A57/A72: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
- default y
- select ARM64_WORKAROUND_SPECULATIVE_AT_NVHE
- help
- This option adds work arounds for ARM Cortex-A57 erratum 1319537
- and A72 erratum 1319367
-
- Cortex-A57 and A72 cores could end-up with corrupted TLBs by
- speculating an AT instruction during a guest context switch.
-
- If unsure, say Y.
-
config ARM64_ERRATUM_1463225
bool "Cortex-A76: Software Step might prevent interrupt recognition"
default y
@@ -695,6 +700,35 @@ config CAVIUM_TX2_ERRATUM_219
If unsure, say Y.
+config FUJITSU_ERRATUM_010001
+ bool "Fujitsu-A64FX erratum E#010001: Undefined fault may occur wrongly"
+ default y
+ help
+ This option adds a workaround for Fujitsu-A64FX erratum E#010001.
+ On some variants of the Fujitsu-A64FX cores ver(1.0, 1.1), memory
+ accesses may cause undefined fault (Data abort, DFSC=0b111111).
+ This fault occurs under a specific hardware condition when a
+ load/store instruction performs an address translation using:
+ case-1 TTBR0_EL1 with TCR_EL1.NFD0 == 1.
+ case-2 TTBR0_EL2 with TCR_EL2.NFD0 == 1.
+ case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
+ case-4 TTBR1_EL2 with TCR_EL2.NFD1 == 1.
+
+ The workaround is to ensure these bits are clear in TCR_ELx.
+ The workaround only affects the Fujitsu-A64FX.
+
+ If unsure, say Y.
+
+config HISILICON_ERRATUM_161600802
+ bool "Hip07 161600802: Erroneous redistributor VLPI base"
+ default y
+ help
+ The HiSilicon Hip07 SoC uses the wrong redistributor base
+ when issued ITS commands such as VMOVP and VMAPP, and requires
+ a 128kB offset to be applied to the target address in this commands.
+
+ If unsure, say Y.
+
config QCOM_FALKOR_ERRATUM_1003
bool "Falkor E1003: Incorrect translation due to ASID change"
default y
@@ -706,9 +740,6 @@ config QCOM_FALKOR_ERRATUM_1003
is unchanged. Work around the erratum by invalidating the walk cache
entries for the trampoline before entering the kernel proper.
-config ARM64_WORKAROUND_REPEAT_TLBI
- bool
-
config QCOM_FALKOR_ERRATUM_1009
bool "Falkor E1009: Prematurely complete a DSB after a TLBI"
default y
@@ -730,25 +761,6 @@ config QCOM_QDF2400_ERRATUM_0065
If unsure, say Y.
-config SOCIONEXT_SYNQUACER_PREITS
- bool "Socionext Synquacer: Workaround for GICv3 pre-ITS"
- default y
- help
- Socionext Synquacer SoCs implement a separate h/w block to generate
- MSI doorbell writes with non-zero values for the device ID.
-
- If unsure, say Y.
-
-config HISILICON_ERRATUM_161600802
- bool "Hip07 161600802: Erroneous redistributor VLPI base"
- default y
- help
- The HiSilicon Hip07 SoC uses the wrong redistributor base
- when issued ITS commands such as VMOVP and VMAPP, and requires
- a 128kB offset to be applied to the target address in this commands.
-
- If unsure, say Y.
-
config QCOM_FALKOR_ERRATUM_E1041
bool "Falkor E1041: Speculative instruction fetches might cause errant memory access"
default y
@@ -759,22 +771,12 @@ config QCOM_FALKOR_ERRATUM_E1041
If unsure, say Y.
-config FUJITSU_ERRATUM_010001
- bool "Fujitsu-A64FX erratum E#010001: Undefined fault may occur wrongly"
+config SOCIONEXT_SYNQUACER_PREITS
+ bool "Socionext Synquacer: Workaround for GICv3 pre-ITS"
default y
help
- This option adds a workaround for Fujitsu-A64FX erratum E#010001.
- On some variants of the Fujitsu-A64FX cores ver(1.0, 1.1), memory
- accesses may cause undefined fault (Data abort, DFSC=0b111111).
- This fault occurs under a specific hardware condition when a
- load/store instruction performs an address translation using:
- case-1 TTBR0_EL1 with TCR_EL1.NFD0 == 1.
- case-2 TTBR0_EL2 with TCR_EL2.NFD0 == 1.
- case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
- case-4 TTBR1_EL2 with TCR_EL2.NFD1 == 1.
-
- The workaround is to ensure these bits are clear in TCR_ELx.
- The workaround only affects the Fujitsu-A64FX.
+ Socionext Synquacer SoCs implement a separate h/w block to generate
+ MSI doorbell writes with non-zero values for the device ID.
If unsure, say Y.
@@ -1026,6 +1028,10 @@ config ARCH_HAS_CACHE_LINE_SIZE
config ARCH_ENABLE_SPLIT_PMD_PTLOCK
def_bool y if PGTABLE_LEVELS > 2
+# Supported by clang >= 7.0
+config CC_HAVE_SHADOW_CALL_STACK
+ def_bool $(cc-option, -fsanitize=shadow-call-stack -ffixed-x18)
+
config SECCOMP
bool "Enable seccomp to safely compute untrusted bytecode"
---help---
@@ -1585,6 +1591,48 @@ endmenu
menu "ARMv8.5 architectural features"
+config ARM64_BTI
+ bool "Branch Target Identification support"
+ default y
+ help
+ Branch Target Identification (part of the ARMv8.5 Extensions)
+ provides a mechanism to limit the set of locations to which computed
+ branch instructions such as BR or BLR can jump.
+
+ To make use of BTI on CPUs that support it, say Y.
+
+ BTI is intended to provide complementary protection to other control
+ flow integrity protection mechanisms, such as the Pointer
+ authentication mechanism provided as part of the ARMv8.3 Extensions.
+ For this reason, it does not make sense to enable this option without
+ also enabling support for pointer authentication. Thus, when
+ enabling this option you should also select ARM64_PTR_AUTH=y.
+
+ Userspace binaries must also be specifically compiled to make use of
+ this mechanism. If you say N here or the hardware does not support
+ BTI, such binaries can still run, but you get no additional
+ enforcement of branch destinations.
+
+config ARM64_BTI_KERNEL
+ bool "Use Branch Target Identification for kernel"
+ default y
+ depends on ARM64_BTI
+ depends on ARM64_PTR_AUTH
+ depends on CC_HAS_BRANCH_PROT_PAC_RET_BTI
+ # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697
+ depends on !CC_IS_GCC || GCC_VERSION >= 100100
+ depends on !(CC_IS_CLANG && GCOV_KERNEL)
+ depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS)
+ help
+ Build the kernel with Branch Target Identification annotations
+ and enable enforcement of this for kernel code. When this option
+ is enabled and the system supports BTI all kernel code including
+ modular code must have BTI enabled.
+
+config CC_HAS_BRANCH_PROT_PAC_RET_BTI
+ # GCC 9 or later, clang 8 or later
+ def_bool $(cc-option,-mbranch-protection=pac-ret+leaf+bti)
+
config ARM64_E0PD
bool "Enable support for E0PD"
default y

arch/arm64/Makefile

View file
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 85e4149..650e118 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -12,7 +12,6 @@
LDFLAGS_vmlinux :=--no-undefined -X
CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
-GZFLAGS :=-9
ifeq ($(CONFIG_RELOCATABLE), y)
# Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour
@@ -71,7 +70,14 @@ branch-prot-flags-y += $(call cc-option,-mbranch-protection=none)
ifeq ($(CONFIG_ARM64_PTR_AUTH),y)
branch-prot-flags-$(CONFIG_CC_HAS_SIGN_RETURN_ADDRESS) := -msign-return-address=all
+# We enable additional protection for leaf functions as there is some
+# narrow potential for ROP protection benefits and no substantial
+# performance impact has been observed.
+ifeq ($(CONFIG_ARM64_BTI_KERNEL),y)
+branch-prot-flags-$(CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI) := -mbranch-protection=pac-ret+leaf+bti
+else
branch-prot-flags-$(CONFIG_CC_HAS_BRANCH_PROT_PAC_RET) := -mbranch-protection=pac-ret+leaf
+endif
# -march=armv8.3-a enables the non-nops instructions for PAC, to avoid the
# compiler to generate them and consequently to break the single image contract
# we pass it only to the assembler. This option is utilized only in case of non
@@ -81,6 +87,10 @@ endif
KBUILD_CFLAGS += $(branch-prot-flags-y)
+ifeq ($(CONFIG_SHADOW_CALL_STACK), y)
+KBUILD_CFLAGS += -ffixed-x18
+endif
+
ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
KBUILD_CPPFLAGS += -mbig-endian
CHECKFLAGS += -D__AARCH64EB__
@@ -118,7 +128,7 @@ TEXT_OFFSET := $(shell awk "BEGIN {srand(); printf \"0x%06x\n\", \
int(2 * 1024 * 1024 / (2 ^ $(CONFIG_ARM64_PAGE_SHIFT)) * \
rand()) * (2 ^ $(CONFIG_ARM64_PAGE_SHIFT))}")
else
-TEXT_OFFSET := 0x00080000
+TEXT_OFFSET := 0x0
endif
ifeq ($(CONFIG_KASAN_SW_TAGS), y)
@@ -131,7 +141,7 @@ KBUILD_CFLAGS += -DKASAN_SHADOW_SCALE_SHIFT=$(KASAN_SHADOW_SCALE_SHIFT)
KBUILD_CPPFLAGS += -DKASAN_SHADOW_SCALE_SHIFT=$(KASAN_SHADOW_SCALE_SHIFT)
KBUILD_AFLAGS += -DKASAN_SHADOW_SCALE_SHIFT=$(KASAN_SHADOW_SCALE_SHIFT)
-export TEXT_OFFSET GZFLAGS
+export TEXT_OFFSET
core-y += arch/arm64/
libs-y := arch/arm64/lib/ $(libs-y)

arch/arm64/include/asm/asm_pointer_auth.h

View file
diff --git a/arch/arm64/include/asm/asm_pointer_auth.h b/arch/arm64/include/asm/asm_pointer_auth.h
index ce2a848..52dead2 100644
--- a/arch/arm64/include/asm/asm_pointer_auth.h
+++ b/arch/arm64/include/asm/asm_pointer_auth.h
@@ -39,25 +39,58 @@ alternative_if ARM64_HAS_GENERIC_AUTH
alternative_else_nop_endif
.endm
- .macro ptrauth_keys_install_kernel tsk, sync, tmp1, tmp2, tmp3
-alternative_if ARM64_HAS_ADDRESS_AUTH
+ .macro __ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
mov \tmp1, #THREAD_KEYS_KERNEL
add \tmp1, \tsk, \tmp1
ldp \tmp2, \tmp3, [\tmp1, #PTRAUTH_KERNEL_KEY_APIA]
msr_s SYS_APIAKEYLO_EL1, \tmp2
msr_s SYS_APIAKEYHI_EL1, \tmp3
- .if \sync == 1
+ .endm
+
+ .macro ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
+alternative_if ARM64_HAS_ADDRESS_AUTH
+ __ptrauth_keys_install_kernel_nosync \tsk, \tmp1, \tmp2, \tmp3
+alternative_else_nop_endif
+ .endm
+
+ .macro ptrauth_keys_install_kernel tsk, tmp1, tmp2, tmp3
+alternative_if ARM64_HAS_ADDRESS_AUTH
+ __ptrauth_keys_install_kernel_nosync \tsk, \tmp1, \tmp2, \tmp3
isb
- .endif
alternative_else_nop_endif
.endm
+ .macro __ptrauth_keys_init_cpu tsk, tmp1, tmp2, tmp3
+ mrs \tmp1, id_aa64isar1_el1
+ ubfx \tmp1, \tmp1, #ID_AA64ISAR1_APA_SHIFT, #8
+ cbz \tmp1, .Lno_addr_auth\@
+ mov_q \tmp1, (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | \
+ SCTLR_ELx_ENDA | SCTLR_ELx_ENDB)
+ mrs \tmp2, sctlr_el1
+ orr \tmp2, \tmp2, \tmp1
+ msr sctlr_el1, \tmp2
+ __ptrauth_keys_install_kernel_nosync \tsk, \tmp1, \tmp2, \tmp3
+ isb
+.Lno_addr_auth\@:
+ .endm
+
+ .macro ptrauth_keys_init_cpu tsk, tmp1, tmp2, tmp3
+alternative_if_not ARM64_HAS_ADDRESS_AUTH
+ b .Lno_addr_auth\@
+alternative_else_nop_endif
+ __ptrauth_keys_init_cpu \tsk, \tmp1, \tmp2, \tmp3
+.Lno_addr_auth\@:
+ .endm
+
#else /* CONFIG_ARM64_PTR_AUTH */
.macro ptrauth_keys_install_user tsk, tmp1, tmp2, tmp3
.endm
- .macro ptrauth_keys_install_kernel tsk, sync, tmp1, tmp2, tmp3
+ .macro ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
+ .endm
+
+ .macro ptrauth_keys_install_kernel tsk, tmp1, tmp2, tmp3
.endm
#endif /* CONFIG_ARM64_PTR_AUTH */

arch/arm64/include/asm/assembler.h

View file
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 0bff325..54d1811 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -736,4 +736,54 @@ USER(\label, ic ivau, \tmp2) // invalidate I line PoU
.Lyield_out_\@ :
.endm
+/*
+ * This macro emits a program property note section identifying
+ * architecture features which require special handling, mainly for
+ * use in assembly files included in the VDSO.
+ */
+
+#define NT_GNU_PROPERTY_TYPE_0 5
+#define GNU_PROPERTY_AARCH64_FEATURE_1_AND 0xc0000000
+
+#define GNU_PROPERTY_AARCH64_FEATURE_1_BTI (1U << 0)
+#define GNU_PROPERTY_AARCH64_FEATURE_1_PAC (1U << 1)
+
+#ifdef CONFIG_ARM64_BTI_KERNEL
+#define GNU_PROPERTY_AARCH64_FEATURE_1_DEFAULT \
+ ((GNU_PROPERTY_AARCH64_FEATURE_1_BTI | \
+ GNU_PROPERTY_AARCH64_FEATURE_1_PAC))
+#endif
+
+#ifdef GNU_PROPERTY_AARCH64_FEATURE_1_DEFAULT
+.macro emit_aarch64_feature_1_and, feat=GNU_PROPERTY_AARCH64_FEATURE_1_DEFAULT
+ .pushsection .note.gnu.property, "a"
+ .align 3

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arch/x86/include/asm/traps.h

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arch/x86/kernel/Makefile

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arch/x86/kernel/dumpstack_32.c

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arch/x86/kernel/traps.c

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arch/x86/mm/cpu_entry_area.c

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drivers/acpi/arm64/gtdt.c

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drivers/acpi/arm64/iort.c

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drivers/base/node.c

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drivers/firmware/Kconfig

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drivers/firmware/arm_sdei.c

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drivers/firmware/efi/libstub/Makefile

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drivers/firmware/psci/psci.c

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drivers/firmware/smccc/Kconfig

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drivers/firmware/smccc/Makefile

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drivers/firmware/smccc/smccc.c

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drivers/perf/Kconfig

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drivers/perf/arm_dsu_pmu.c

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drivers/perf/arm_smmuv3_pmu.c

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drivers/perf/arm_spe_pmu.c

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drivers/perf/hisilicon/Kconfig

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drivers/perf/hisilicon/Makefile

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drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c

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drivers/perf/hisilicon/hisi_uncore_hha_pmu.c

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drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

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drivers/perf/hisilicon/hisi_uncore_pmu.c

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fs/Kconfig.binfmt

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fs/binfmt_elf.c

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fs/compat_binfmt_elf.c

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fs/proc/meminfo.c

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fs/proc/task_mmu.c

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include/linux/arm-smccc.h

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include/linux/compiler-clang.h

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include/linux/compiler_types.h

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include/linux/elf.h

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include/linux/linkage.h

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include/linux/mm.h

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include/linux/mmzone.h

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include/linux/psci.h

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include/linux/scs.h

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include/uapi/linux/elf.h

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init/init_task.c

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kernel/Makefile

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kernel/fork.c

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kernel/sched/core.c

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kernel/scs.c

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lib/Kconfig

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mm/page_alloc.c

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mm/vmstat.c

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tools/testing/selftests/wireguard/qemu/debug.config

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virt/kvm/arm/arm.c

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