Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6

5b2eef96 · Linus Torvalds <[email protected]> · 2011-01-10 17:11:39 -08:00

* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (390 commits)
  drm/radeon/kms: disable underscan by default
  drm/radeon/kms: only enable hdmi features if the monitor supports audio
  drm: Restore the old_fb upon modeset failure
  drm/nouveau: fix hwmon device binding
  radeon: consolidate asic-specific function decls for pre-r600
  vga_switcheroo: comparing too few characters in strncmp()
  drm/radeon/kms: add NI pci ids
  drm/radeon/kms: don't enable pcie gen2 on NI yet
  drm/radeon/kms: add radeon_asic struct for NI asics
  drm/radeon/kms/ni: load default sclk/mclk/vddc at pm init
  drm/radeon/kms: add ucode loader for NI
  drm/radeon/kms: add support for DCE5 display LUTs
  drm/radeon/kms: add ni_reg.h
  drm/radeon/kms: add bo blit support for NI
  drm/radeon/kms: always use writeback/events for fences on NI
  drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5
  drm/radeon/kms: add backend map workaround for barts
  drm/radeon/kms: fill gpu init for NI asics
  drm/radeon/kms: add disabled vbios accessor for NI asics
  drm/radeon/kms: handle NI thermal controller
  ...

Commit: 5b2eef966cb2ae307aa4ef1767f7307774bc96ca
Parents: 8adbf8d4 · 56bec7c0

Merge commit. Changes below are compared with the first parent: 8adbf8d4.

Changes

187 files changed · +24886 −10827

File	Status	Add	Del	Content
drivers/char/agp/agp.h	modified	+0	−1	View file
drivers/char/agp/compat_ioctl.c	modified	+0	−1	View file
drivers/char/agp/compat_ioctl.h	modified	+0	−1	View file
drivers/char/agp/frontend.c	modified	+0	−8	View file
drivers/char/agp/generic.c	modified	+0	−27	View file
drivers/char/agp/intel-agp.c	modified	+0	−5	View file
drivers/char/agp/intel-agp.h	modified	+11	−3	View file
drivers/char/agp/intel-gtt.c	modified	+352	−426	View file
drivers/gpu/drm/drm_agpsupport.c	modified	+0	−6	View file
drivers/gpu/drm/drm_crtc_helper.c	modified	+16	−2	View file
drivers/gpu/drm/drm_fb_helper.c	modified	+43	−18	View file
drivers/gpu/drm/drm_fops.c	modified	+2	−0	View file
drivers/gpu/drm/drm_irq.c	modified	+541	−25	View file
drivers/gpu/drm/drm_mm.c	modified	+39	−1	View file
drivers/gpu/drm/drm_stub.c	modified	+10	−0	View file
drivers/gpu/drm/i915/Makefile	modified	+2	−0	View file
drivers/gpu/drm/i915/i915_debugfs.c	modified	+323	−148	View file
drivers/gpu/drm/i915/i915_dma.c	modified	+376	−418	View file
drivers/gpu/drm/i915/i915_drv.c	modified	+65	−15	View file
drivers/gpu/drm/i915/i915_drv.h	modified	+343	−262	View file
drivers/gpu/drm/i915/i915_gem.c	modified	+1409	−2565	View file
drivers/gpu/drm/i915/i915_gem_debug.c	modified	+10	−13	View file
drivers/gpu/drm/i915/i915_gem_evict.c	modified	+62	−63	View file
drivers/gpu/drm/i915/i915_gem_execbuffer.c	added	+1343	−0	View file
drivers/gpu/drm/i915/i915_gem_gtt.c	added	+99	−0	View file
drivers/gpu/drm/i915/i915_gem_tiling.c	modified	+70	−69	View file
drivers/gpu/drm/i915/i915_irq.c	modified	+473	−251	View file
drivers/gpu/drm/i915/i915_reg.h	modified	+186	−7	View file
drivers/gpu/drm/i915/i915_suspend.c	modified	+58	−46	View file
drivers/gpu/drm/i915/i915_trace.h	modified	+48	−43	View file
drivers/gpu/drm/i915/intel_display.c	modified	+785	−214	View file
drivers/gpu/drm/i915/intel_dp.c	modified	+1	−2	View file
drivers/gpu/drm/i915/intel_drv.h	modified	+13	−9	View file
drivers/gpu/drm/i915/intel_fb.c	modified	+12	−20	View file
drivers/gpu/drm/i915/intel_i2c.c	modified	+11	−10	View file
drivers/gpu/drm/i915/intel_lvds.c	modified	+28	−15	View file
drivers/gpu/drm/i915/intel_opregion.c	modified	+1	−7	View file
drivers/gpu/drm/i915/intel_overlay.c	modified	+76	−40	View file
drivers/gpu/drm/i915/intel_panel.c	modified	+42	−10	View file
drivers/gpu/drm/i915/intel_ringbuffer.c	modified	+591	−416	View file
drivers/gpu/drm/i915/intel_ringbuffer.h	modified	+76	−60	View file
drivers/gpu/drm/i915/intel_sdvo.c	modified	+5	−2	View file
drivers/gpu/drm/i915/intel_tv.c	modified	+8	−6	View file
drivers/gpu/drm/nouveau/Kconfig	modified	+1	−1	View file
drivers/gpu/drm/nouveau/Makefile	modified	+11	−6	View file
drivers/gpu/drm/nouveau/nouveau_acpi.c	modified	+8	−3	View file
drivers/gpu/drm/nouveau/nouveau_bios.c	modified	+38	−64	View file
drivers/gpu/drm/nouveau/nouveau_bo.c	modified	+215	−104	View file
drivers/gpu/drm/nouveau/nouveau_channel.c	modified	+222	−161	View file
drivers/gpu/drm/nouveau/nouveau_connector.c	modified	+48	−6	View file
drivers/gpu/drm/nouveau/nouveau_display.c	modified	+207	−0	View file
drivers/gpu/drm/nouveau/nouveau_dma.c	modified	+18	−14	View file
drivers/gpu/drm/nouveau/nouveau_dma.h	modified	+8	−1	View file
drivers/gpu/drm/nouveau/nouveau_dp.c	modified	+3	−3	View file
drivers/gpu/drm/nouveau/nouveau_drv.c	modified	+29	−29	View file
drivers/gpu/drm/nouveau/nouveau_drv.h	modified	+286	−139	View file
drivers/gpu/drm/nouveau/nouveau_fbcon.c	modified	+139	−50	View file
drivers/gpu/drm/nouveau/nouveau_fbcon.h	modified	+12	−6	View file
drivers/gpu/drm/nouveau/nouveau_fence.c	modified	+74	−43	View file
drivers/gpu/drm/nouveau/nouveau_gem.c	modified	+50	−121	View file
drivers/gpu/drm/nouveau/nouveau_hw.c	modified	+6	−5	View file
drivers/gpu/drm/nouveau/nouveau_irq.c	modified	+52	−1158	View file
drivers/gpu/drm/nouveau/nouveau_mem.c	modified	+201	−225	View file
drivers/gpu/drm/nouveau/nouveau_mm.c	added	+271	−0	View file
drivers/gpu/drm/nouveau/nouveau_mm.h	added	+67	−0	View file
drivers/gpu/drm/nouveau/nouveau_notifier.c	modified	+16	−28	View file
drivers/gpu/drm/nouveau/nouveau_object.c	modified	+414	−340	View file
drivers/gpu/drm/nouveau/nouveau_pm.c	modified	+31	−2	View file
drivers/gpu/drm/nouveau/nouveau_ramht.c	modified	+6	−5	View file
drivers/gpu/drm/nouveau/nouveau_ramht.h	modified	+1	−1	View file
drivers/gpu/drm/nouveau/nouveau_reg.h	modified	+34	−41	View file
drivers/gpu/drm/nouveau/nouveau_sgdma.c	modified	+81	−131	View file
drivers/gpu/drm/nouveau/nouveau_state.c	modified	+199	−101	View file
drivers/gpu/drm/nouveau/nouveau_util.c	added	+69	−0	View file
drivers/gpu/drm/nouveau/nouveau_util.h	added	+45	−0	View file
drivers/gpu/drm/nouveau/nouveau_vm.c	added	+439	−0	View file
drivers/gpu/drm/nouveau/nouveau_vm.h	added	+113	−0	View file
drivers/gpu/drm/nouveau/nv04_crtc.c	modified	+7	−1	View file
drivers/gpu/drm/nouveau/nv04_dac.c	modified	+6	−6	View file
drivers/gpu/drm/nouveau/nv04_display.c	modified	+21	−0	View file
drivers/gpu/drm/nouveau/nv04_fbcon.c	modified	+33	−69	View file
drivers/gpu/drm/nouveau/nv04_fifo.c	modified	+236	−4	View file
drivers/gpu/drm/nouveau/nv04_graph.c	modified	+418	−227	View file
drivers/gpu/drm/nouveau/nv04_instmem.c	modified	+37	−13	View file
drivers/gpu/drm/nouveau/nv10_fb.c	modified	+112	−12	View file
drivers/gpu/drm/nouveau/nv10_fifo.c	modified	+7	−12	View file
drivers/gpu/drm/nouveau/nv10_graph.c	modified	+147	−56	View file
drivers/gpu/drm/nouveau/nv20_graph.c	modified	+177	−67	View file
drivers/gpu/drm/nouveau/nv30_fb.c	modified	+22	−1	View file
drivers/gpu/drm/nouveau/nv40_fb.c	modified	+9	−13	View file
drivers/gpu/drm/nouveau/nv40_fifo.c	modified	+7	−13	View file
drivers/gpu/drm/nouveau/nv40_graph.c	modified	+161	−44	View file
drivers/gpu/drm/nouveau/nv50_crtc.c	modified	+16	−11	View file
drivers/gpu/drm/nouveau/nv50_display.c	modified	+59	−363	View file
drivers/gpu/drm/nouveau/nv50_display.h	modified	+0	−2	View file
drivers/gpu/drm/nouveau/nv50_evo.c	added	+345	−0	View file
drivers/gpu/drm/nouveau/nv50_evo.h	modified	+10	−0	View file
drivers/gpu/drm/nouveau/nv50_fb.c	modified	+66	−5	View file
drivers/gpu/drm/nouveau/nv50_fbcon.c	modified	+54	−60	View file
drivers/gpu/drm/nouveau/nv50_fifo.c	modified	+37	−5	View file
drivers/gpu/drm/nouveau/nv50_gpio.c	modified	+193	−5	View file
drivers/gpu/drm/nouveau/nv50_graph.c	modified	+635	−42	View file
drivers/gpu/drm/nouveau/nv50_instmem.c	modified	+164	−211	View file
drivers/gpu/drm/nouveau/nv50_vm.c	added	+180	−0	View file
drivers/gpu/drm/nouveau/nv50_vram.c	added	+190	−0	View file
drivers/gpu/drm/nouveau/nv84_crypt.c	added	+140	−0	View file
drivers/gpu/drm/nouveau/nvc0_fbcon.c	added	+269	−0	View file
drivers/gpu/drm/nouveau/nvc0_fifo.c	modified	+365	−0	View file
drivers/gpu/drm/nouveau/nvc0_graph.c	modified	+704	−1	View file
drivers/gpu/drm/nouveau/nvc0_graph.h	added	+64	−0	View file
drivers/gpu/drm/nouveau/nvc0_grctx.c	added	+2874	−0	View file
drivers/gpu/drm/nouveau/nvc0_instmem.c	modified	+159	−158	View file
drivers/gpu/drm/nouveau/nvc0_vm.c	added	+123	−0	View file
drivers/gpu/drm/nouveau/nvc0_vram.c	added	+99	−0	View file
drivers/gpu/drm/nouveau/nvreg.h	modified	+2	−1	View file
drivers/gpu/drm/radeon/Makefile	modified	+4	−1	View file
drivers/gpu/drm/radeon/ObjectID.h	modified	+48	−0	View file
drivers/gpu/drm/radeon/atom.c	modified	+7	−7	View file
drivers/gpu/drm/radeon/atombios.h	modified	+932	−65	View file
drivers/gpu/drm/radeon/atombios_crtc.c	modified	+53	−4	View file
drivers/gpu/drm/radeon/evergreen.c	modified	+604	−202	View file
drivers/gpu/drm/radeon/evergreen_blit_kms.c	modified	+90	−2	View file
drivers/gpu/drm/radeon/evergreen_reg.h	modified	+6	−0	View file
drivers/gpu/drm/radeon/evergreend.h	modified	+49	−4	View file
drivers/gpu/drm/radeon/ni.c	added	+316	−0	View file
drivers/gpu/drm/radeon/ni_reg.h	added	+86	−0	View file
drivers/gpu/drm/radeon/nid.h	added	+41	−0	View file
drivers/gpu/drm/radeon/r100.c	modified	+69	−9	View file
drivers/gpu/drm/radeon/r100d.h	modified	+1	−1	View file
drivers/gpu/drm/radeon/r300.c	modified	+17	−4	View file
drivers/gpu/drm/radeon/r300d.h	modified	+1	−0	View file
drivers/gpu/drm/radeon/r500_reg.h	modified	+4	−0	View file
drivers/gpu/drm/radeon/r600.c	modified	+300	−57	View file
drivers/gpu/drm/radeon/r600d.h	modified	+48	−0	View file
drivers/gpu/drm/radeon/radeon.h	modified	+86	−65	View file
drivers/gpu/drm/radeon/radeon_asic.c	modified	+147	−6	View file
drivers/gpu/drm/radeon/radeon_asic.h	modified	+62	−3	View file
drivers/gpu/drm/radeon/radeon_atombios.c	modified	+755	−491	View file
drivers/gpu/drm/radeon/radeon_bios.c	modified	+41	−0	View file
drivers/gpu/drm/radeon/radeon_combios.c	modified	+2	−1	View file
drivers/gpu/drm/radeon/radeon_connectors.c	modified	+6	−3	View file
drivers/gpu/drm/radeon/radeon_cs.c	modified	+10	−7	View file
drivers/gpu/drm/radeon/radeon_device.c	modified	+22	−13	View file
drivers/gpu/drm/radeon/radeon_display.c	modified	+364	−27	View file
drivers/gpu/drm/radeon/radeon_drv.c	modified	+10	−1	View file
drivers/gpu/drm/radeon/radeon_encoders.c	modified	+165	−40	View file
drivers/gpu/drm/radeon/radeon_family.h	modified	+4	−0	View file
drivers/gpu/drm/radeon/radeon_fb.c	modified	+0	−4	View file
drivers/gpu/drm/radeon/radeon_fence.c	modified	+4	−0	View file
drivers/gpu/drm/radeon/radeon_irq_kms.c	modified	+41	−5	View file
drivers/gpu/drm/radeon/radeon_kms.c	modified	+48	−16	View file
drivers/gpu/drm/radeon/radeon_mode.h	modified	+10	−6	View file
drivers/gpu/drm/radeon/radeon_object.c	modified	+6	−51	View file
drivers/gpu/drm/radeon/radeon_object.h	modified	+2	−5	View file
drivers/gpu/drm/radeon/radeon_pm.c	modified	+52	−42	View file
drivers/gpu/drm/radeon/radeon_reg.h	modified	+13	−0	View file
drivers/gpu/drm/radeon/radeon_trace.h	added	+82	−0	View file
drivers/gpu/drm/radeon/radeon_trace_points.c	added	+9	−0	View file
drivers/gpu/drm/radeon/reg_srcs/rv515	modified	+16	−0	View file
drivers/gpu/drm/radeon/rs600.c	modified	+88	−30	View file
drivers/gpu/drm/radeon/rv770.c	modified	+195	−1	View file
drivers/gpu/drm/radeon/rv770d.h	modified	+47	−0	View file
drivers/gpu/drm/ttm/ttm_bo.c	modified	+99	−57	View file
drivers/gpu/drm/ttm/ttm_bo_util.c	modified	+119	−19	View file
drivers/gpu/drm/ttm/ttm_bo_vm.c	modified	+18	−11	View file
drivers/gpu/drm/ttm/ttm_execbuf_util.c	modified	+145	−24	View file
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h	modified	+0	−1	View file
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c	modified	+1	−2	View file
drivers/gpu/drm/vmwgfx/vmwgfx_fb.c	modified	+0	−3	View file
drivers/gpu/vga/vga_switcheroo.c	modified	+62	−16	View file
include/drm/drmP.h	modified	+98	−4	View file
include/drm/drm_crtc.h	modified	+9	−0	View file
include/drm/drm_fb_helper.h	modified	+0	−3	View file
include/drm/drm_mm.h	modified	+7	−0	View file
include/drm/drm_pciids.h	modified	+40	−0	View file
include/drm/i915_drm.h	modified	+12	−0	View file
include/drm/intel-gtt.h	modified	+29	−6	View file
include/drm/nouveau_drm.h	modified	+1	−4	View file
include/drm/radeon_drm.h	modified	+1	−0	View file
include/drm/ttm/ttm_bo_api.h	modified	+45	−5	View file
include/drm/ttm/ttm_bo_driver.h	modified	+103	−49	View file
include/drm/ttm/ttm_execbuf_util.h	modified	+8	−3	View file
include/linux/agp_backend.h	modified	+0	−2	View file
include/linux/intel-gtt.h	deleted	+0	−20	View before deletion
include/linux/kref.h	modified	+2	−0	View file
include/linux/vga_switcheroo.h	modified	+2	−0	View file
lib/kref.c	modified	+30	−0	View file

Only the first 600 diff lines are shown. Download the complete patch.

drivers/char/agp/agp.h

View file

diff --git a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
index 5259065..3e67ddd 100644
--- a/drivers/char/agp/agp.h
+++ b/drivers/char/agp/agp.h
@@ -120,7 +120,6 @@ struct agp_bridge_driver {
 	void (*agp_destroy_page)(struct page *, int flags);
 	void (*agp_destroy_pages)(struct agp_memory *);
 	int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
-	void (*chipset_flush)(struct agp_bridge_data *);
 };
 
 struct agp_bridge_data {

drivers/char/agp/compat_ioctl.c

View file

diff --git a/drivers/char/agp/compat_ioctl.c b/drivers/char/agp/compat_ioctl.c
index 9d2c97a..a48e05b 100644
--- a/drivers/char/agp/compat_ioctl.c
+++ b/drivers/char/agp/compat_ioctl.c
@@ -276,7 +276,6 @@ long compat_agp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 		break;
 
 	case AGPIOC_CHIPSET_FLUSH32:
-		ret_val = agpioc_chipset_flush_wrap(curr_priv);
 		break;
 	}
 

drivers/char/agp/compat_ioctl.h

View file

diff --git a/drivers/char/agp/compat_ioctl.h b/drivers/char/agp/compat_ioctl.h
index 0c9678a..f30e0fd 100644
--- a/drivers/char/agp/compat_ioctl.h
+++ b/drivers/char/agp/compat_ioctl.h
@@ -102,6 +102,5 @@ void agp_free_memory_wrap(struct agp_memory *memory);
 struct agp_memory *agp_allocate_memory_wrap(size_t pg_count, u32 type);
 struct agp_memory *agp_find_mem_by_key(int key);
 struct agp_client *agp_find_client_by_pid(pid_t id);
-int agpioc_chipset_flush_wrap(struct agp_file_private *priv);
 
 #endif /* _AGP_COMPAT_H */

drivers/char/agp/frontend.c

View file

diff --git a/drivers/char/agp/frontend.c b/drivers/char/agp/frontend.c
index 3cb4539..2e04433 100644
--- a/drivers/char/agp/frontend.c
+++ b/drivers/char/agp/frontend.c
@@ -957,13 +957,6 @@ static int agpioc_unbind_wrap(struct agp_file_private *priv, void __user *arg)
 	return agp_unbind_memory(memory);
 }
 
-int agpioc_chipset_flush_wrap(struct agp_file_private *priv)
-{
-	DBG("");
-	agp_flush_chipset(agp_bridge);
-	return 0;
-}
-
 static long agp_ioctl(struct file *file,
 		     unsigned int cmd, unsigned long arg)
 {
@@ -1039,7 +1032,6 @@ static long agp_ioctl(struct file *file,
 		break;
 	       
 	case AGPIOC_CHIPSET_FLUSH:
-		ret_val = agpioc_chipset_flush_wrap(curr_priv);
 		break;
 	}
 

drivers/char/agp/generic.c

View file

diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index 4956f1c..012cba0 100644
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -81,13 +81,6 @@ static int agp_get_key(void)
 	return -1;
 }
 
-void agp_flush_chipset(struct agp_bridge_data *bridge)
-{
-	if (bridge->driver->chipset_flush)
-		bridge->driver->chipset_flush(bridge);
-}
-EXPORT_SYMBOL(agp_flush_chipset);
-
 /*
  * Use kmalloc if possible for the page list. Otherwise fall back to
  * vmalloc. This speeds things up and also saves memory for small AGP
@@ -487,26 +480,6 @@ int agp_unbind_memory(struct agp_memory *curr)
 }
 EXPORT_SYMBOL(agp_unbind_memory);
 
-/**
- *	agp_rebind_emmory  -  Rewrite the entire GATT, useful on resume
- */
-int agp_rebind_memory(void)
-{
-	struct agp_memory *curr;
-	int ret_val = 0;
-
-	spin_lock(&agp_bridge->mapped_lock);
-	list_for_each_entry(curr, &agp_bridge->mapped_list, mapped_list) {
-		ret_val = curr->bridge->driver->insert_memory(curr,
-							      curr->pg_start,
-							      curr->type);
-		if (ret_val != 0)
-			break;
-	}
-	spin_unlock(&agp_bridge->mapped_lock);
-	return ret_val;
-}
-EXPORT_SYMBOL(agp_rebind_memory);
 
 /* End - Routines for handling swapping of agp_memory into the GATT */
 

drivers/char/agp/intel-agp.c

View file

diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index e72f49d..07e9796 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -828,14 +828,9 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev)
 static int agp_intel_resume(struct pci_dev *pdev)
 {
 	struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
-	int ret_val;
 
 	bridge->driver->configure();
 
-	ret_val = agp_rebind_memory();
-	if (ret_val != 0)
-		return ret_val;
-
 	return 0;
 }
 #endif

drivers/char/agp/intel-agp.h

View file

diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 90539df..010e3de 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -75,6 +75,8 @@
 #define I810_GMS_DISABLE	0x00000000
 #define I810_PGETBL_CTL		0x2020
 #define I810_PGETBL_ENABLED	0x00000001
+/* Note: PGETBL_CTL2 has a different offset on G33. */
+#define I965_PGETBL_CTL2	0x20c4
 #define I965_PGETBL_SIZE_MASK	0x0000000e
 #define I965_PGETBL_SIZE_512KB	(0 << 1)
 #define I965_PGETBL_SIZE_256KB	(1 << 1)
@@ -82,9 +84,15 @@
 #define I965_PGETBL_SIZE_1MB	(3 << 1)
 #define I965_PGETBL_SIZE_2MB	(4 << 1)
 #define I965_PGETBL_SIZE_1_5MB	(5 << 1)
-#define G33_PGETBL_SIZE_MASK    (3 << 8)
-#define G33_PGETBL_SIZE_1M      (1 << 8)
-#define G33_PGETBL_SIZE_2M      (2 << 8)
+#define G33_GMCH_SIZE_MASK	(3 << 8)
+#define G33_GMCH_SIZE_1M	(1 << 8)
+#define G33_GMCH_SIZE_2M	(2 << 8)
+#define G4x_GMCH_SIZE_MASK	(0xf << 8)
+#define G4x_GMCH_SIZE_1M	(0x1 << 8)
+#define G4x_GMCH_SIZE_2M	(0x3 << 8)
+#define G4x_GMCH_SIZE_VT_1M	(0x9 << 8)
+#define G4x_GMCH_SIZE_VT_1_5M	(0xa << 8)
+#define G4x_GMCH_SIZE_VT_2M	(0xc << 8)
 
 #define I810_DRAM_CTL		0x3000
 #define I810_DRAM_ROW_0		0x00000001

drivers/char/agp/intel-gtt.c

View file

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 29ac6d4..356f73e 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -24,7 +24,6 @@
 #include <asm/smp.h>
 #include "agp.h"
 #include "intel-agp.h"
-#include <linux/intel-gtt.h>
 #include <drm/intel-gtt.h>
 
 /*
@@ -39,40 +38,12 @@
 #define USE_PCI_DMA_API 0
 #endif
 
-/* Max amount of stolen space, anything above will be returned to Linux */
-int intel_max_stolen = 32 * 1024 * 1024;
-
-static const struct aper_size_info_fixed intel_i810_sizes[] =
-{
-	{64, 16384, 4},
-	/* The 32M mode still requires a 64k gatt */
-	{32, 8192, 4}
-};
-
-#define AGP_DCACHE_MEMORY	1
-#define AGP_PHYS_MEMORY		2
-#define INTEL_AGP_CACHED_MEMORY 3
-
-static struct gatt_mask intel_i810_masks[] =
-{
-	{.mask = I810_PTE_VALID, .type = 0},
-	{.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},
-	{.mask = I810_PTE_VALID, .type = 0},
-	{.mask = I810_PTE_VALID | I830_PTE_SYSTEM_CACHED,
-	 .type = INTEL_AGP_CACHED_MEMORY}
-};
-
-#define INTEL_AGP_UNCACHED_MEMORY              0
-#define INTEL_AGP_CACHED_MEMORY_LLC            1
-#define INTEL_AGP_CACHED_MEMORY_LLC_GFDT       2
-#define INTEL_AGP_CACHED_MEMORY_LLC_MLC        3
-#define INTEL_AGP_CACHED_MEMORY_LLC_MLC_GFDT   4
-
 struct intel_gtt_driver {
 	unsigned int gen : 8;
 	unsigned int is_g33 : 1;
 	unsigned int is_pineview : 1;
 	unsigned int is_ironlake : 1;
+	unsigned int has_pgtbl_enable : 1;
 	unsigned int dma_mask_size : 8;
 	/* Chipset specific GTT setup */
 	int (*setup)(void);
@@ -95,13 +66,14 @@ static struct _intel_private {
 	u8 __iomem *registers;
 	phys_addr_t gtt_bus_addr;
 	phys_addr_t gma_bus_addr;
-	phys_addr_t pte_bus_addr;
+	u32 PGETBL_save;
 	u32 __iomem *gtt;		/* I915G */
 	int num_dcache_entries;
 	union {
 		void __iomem *i9xx_flush_page;
 		void *i8xx_flush_page;
 	};
+	char *i81x_gtt_table;
 	struct page *i8xx_page;
 	struct resource ifp_resource;
 	int resource_valid;
@@ -113,42 +85,31 @@ static struct _intel_private {
 #define IS_G33		intel_private.driver->is_g33
 #define IS_PINEVIEW	intel_private.driver->is_pineview
 #define IS_IRONLAKE	intel_private.driver->is_ironlake
+#define HAS_PGTBL_EN	intel_private.driver->has_pgtbl_enable
 
-static void intel_agp_free_sglist(struct agp_memory *mem)
-{
-	struct sg_table st;
-
-	st.sgl = mem->sg_list;
-	st.orig_nents = st.nents = mem->page_count;
-
-	sg_free_table(&st);
-
-	mem->sg_list = NULL;
-	mem->num_sg = 0;
-}
-
-static int intel_agp_map_memory(struct agp_memory *mem)
+int intel_gtt_map_memory(struct page **pages, unsigned int num_entries,
+			 struct scatterlist **sg_list, int *num_sg)
 {
 	struct sg_table st;
 	struct scatterlist *sg;
 	int i;
 
-	if (mem->sg_list)
+	if (*sg_list)
 		return 0; /* already mapped (for e.g. resume */
 
-	DBG("try mapping %lu pages\n", (unsigned long)mem->page_count);
+	DBG("try mapping %lu pages\n", (unsigned long)num_entries);
 
-	if (sg_alloc_table(&st, mem->page_count, GFP_KERNEL))
+	if (sg_alloc_table(&st, num_entries, GFP_KERNEL))
 		goto err;
 
-	mem->sg_list = sg = st.sgl;
+	*sg_list = sg = st.sgl;
 
-	for (i = 0 ; i < mem->page_count; i++, sg = sg_next(sg))
-		sg_set_page(sg, mem->pages[i], PAGE_SIZE, 0);
+	for (i = 0 ; i < num_entries; i++, sg = sg_next(sg))
+		sg_set_page(sg, pages[i], PAGE_SIZE, 0);
 
-	mem->num_sg = pci_map_sg(intel_private.pcidev, mem->sg_list,
-				 mem->page_count, PCI_DMA_BIDIRECTIONAL);
-	if (unlikely(!mem->num_sg))
+	*num_sg = pci_map_sg(intel_private.pcidev, *sg_list,
+				 num_entries, PCI_DMA_BIDIRECTIONAL);
+	if (unlikely(!*num_sg))
 		goto err;
 
 	return 0;
@@ -157,90 +118,22 @@ err:
 	sg_free_table(&st);
 	return -ENOMEM;
 }
+EXPORT_SYMBOL(intel_gtt_map_memory);
 
-static void intel_agp_unmap_memory(struct agp_memory *mem)
+void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg)
 {
+	struct sg_table st;
 	DBG("try unmapping %lu pages\n", (unsigned long)mem->page_count);
 
-	pci_unmap_sg(intel_private.pcidev, mem->sg_list,
-		     mem->page_count, PCI_DMA_BIDIRECTIONAL);
-	intel_agp_free_sglist(mem);
-}
-
-static int intel_i810_fetch_size(void)
-{
-	u32 smram_miscc;
-	struct aper_size_info_fixed *values;
-
-	pci_read_config_dword(intel_private.bridge_dev,
-			      I810_SMRAM_MISCC, &smram_miscc);
-	values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
-
-	if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
-		dev_warn(&intel_private.bridge_dev->dev, "i810 is disabled\n");
-		return 0;
-	}
-	if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
-		agp_bridge->current_size = (void *) (values + 1);
-		agp_bridge->aperture_size_idx = 1;
-		return values[1].size;
-	} else {
-		agp_bridge->current_size = (void *) (values);
-		agp_bridge->aperture_size_idx = 0;
-		return values[0].size;
-	}
-
-	return 0;
-}
-
-static int intel_i810_configure(void)
-{
-	struct aper_size_info_fixed *current_size;
-	u32 temp;
-	int i;
-
-	current_size = A_SIZE_FIX(agp_bridge->current_size);
+	pci_unmap_sg(intel_private.pcidev, sg_list,
+		     num_sg, PCI_DMA_BIDIRECTIONAL);
 
-	if (!intel_private.registers) {
-		pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &temp);
-		temp &= 0xfff80000;
+	st.sgl = sg_list;
+	st.orig_nents = st.nents = num_sg;
 
-		intel_private.registers = ioremap(temp, 128 * 4096);
-		if (!intel_private.registers) {
-			dev_err(&intel_private.pcidev->dev,
-				"can't remap memory\n");
-			return -ENOMEM;
-		}
-	}
-
-	if ((readl(intel_private.registers+I810_DRAM_CTL)
-		& I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
-		/* This will need to be dynamically assigned */
-		dev_info(&intel_private.pcidev->dev,
-			 "detected 4MB dedicated video ram\n");
-		intel_private.num_dcache_entries = 1024;
-	}
-	pci_read_config_dword(intel_private.pcidev, I810_GMADDR, &temp);
-	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
-	writel(agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL);
-	readl(intel_private.registers+I810_PGETBL_CTL);	/* PCI Posting. */
-
-	if (agp_bridge->driver->needs_scratch_page) {
-		for (i = 0; i < current_size->num_entries; i++) {
-			writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4));
-		}
-		readl(intel_private.registers+I810_PTE_BASE+((i-1)*4));	/* PCI posting. */
-	}
-	global_cache_flush();
-	return 0;
-}
-
-static void intel_i810_cleanup(void)
-{
-	writel(0, intel_private.registers+I810_PGETBL_CTL);
-	readl(intel_private.registers);	/* PCI Posting. */
-	iounmap(intel_private.registers);
+	sg_free_table(&st);
 }
+EXPORT_SYMBOL(intel_gtt_unmap_memory);
 
 static void intel_fake_agp_enable(struct agp_bridge_data *bridge, u32 mode)
 {
@@ -277,80 +170,64 @@ static void i8xx_destroy_pages(struct page *page)
 	atomic_dec(&agp_bridge->current_memory_agp);
 }
 
-static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
-				int type)
+#define I810_GTT_ORDER 4
+static int i810_setup(void)
 {
-	int i, j, num_entries;
-	void *temp;
-	int ret = -EINVAL;
-	int mask_type;
-
-	if (mem->page_count == 0)
-		goto out;
-
-	temp = agp_bridge->current_size;
-	num_entries = A_SIZE_FIX(temp)->num_entries;
+	u32 reg_addr;
+	char *gtt_table;
 
-	if ((pg_start + mem->page_count) > num_entries)
-		goto out_err;
+	/* i81x does not preallocate the gtt. It's always 64kb in size. */
+	gtt_table = alloc_gatt_pages(I810_GTT_ORDER);
+	if (gtt_table == NULL)
+		return -ENOMEM;
+	intel_private.i81x_gtt_table = gtt_table;
 
+	pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &reg_addr);
+	reg_addr &= 0xfff80000;
 
-	for (j = pg_start; j < (pg_start + mem->page_count); j++) {
-		if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j))) {
-			ret = -EBUSY;
-			goto out_err;
-		}
-	}
+	intel_private.registers = ioremap(reg_addr, KB(64));
+	if (!intel_private.registers)
+		return -ENOMEM;
 
-	if (type != mem->type)
-		goto out_err;
+	writel(virt_to_phys(gtt_table) | I810_PGETBL_ENABLED,
+	       intel_private.registers+I810_PGETBL_CTL);
 
-	mask_type = agp_bridge->driver->agp_type_to_mask_type(agp_bridge, type);
+	intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE;
 
-	switch (mask_type) {
-	case AGP_DCACHE_MEMORY:
-		if (!mem->is_flushed)
-			global_cache_flush();
-		for (i = pg_start; i < (pg_start + mem->page_count); i++) {
-			writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID,
-			       intel_private.registers+I810_PTE_BASE+(i*4));
-		}
-		readl(intel_private.registers+I810_PTE_BASE+((i-1)*4));
-		break;
-	case AGP_PHYS_MEMORY:
-	case AGP_NORMAL_MEMORY:
-		if (!mem->is_flushed)
-			global_cache_flush();
-		for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
-			writel(agp_bridge->driver->mask_memory(agp_bridge,
-					page_to_phys(mem->pages[i]), mask_type),
-			       intel_private.registers+I810_PTE_BASE+(j*4));
-		}
-		readl(intel_private.registers+I810_PTE_BASE+((j-1)*4));
-		break;
-	default:
-		goto out_err;
+	if ((readl(intel_private.registers+I810_DRAM_CTL)
+		& I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
+		dev_info(&intel_private.pcidev->dev,
+			 "detected 4MB dedicated video ram\n");
+		intel_private.num_dcache_entries = 1024;
 	}
 
-out:
-	ret = 0;
-out_err:
-	mem->is_flushed = true;
-	return ret;
+	return 0;
 }
 
-static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
-				int type)
+static void i810_cleanup(void)
+{
+	writel(0, intel_private.registers+I810_PGETBL_CTL);
+	free_gatt_pages(intel_private.i81x_gtt_table, I810_GTT_ORDER);
+}
+
+static int i810_insert_dcache_entries(struct agp_memory *mem, off_t pg_start,
+				      int type)
 {
 	int i;
 
-	if (mem->page_count == 0)
-		return 0;
+	if ((pg_start + mem->page_count)
+			> intel_private.num_dcache_entries)
+		return -EINVAL;
+
+	if (!mem->is_flushed)
+		global_cache_flush();
 
-	for (i = pg_start; i < (mem->page_count + pg_start); i++) {
-		writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4));
+	for (i = pg_start; i < (pg_start + mem->page_count); i++) {
+		dma_addr_t addr = i << PAGE_SHIFT;
+		intel_private.driver->write_entry(addr,
+						  i, type);
 	}
-	readl(intel_private.registers+I810_PTE_BASE+((i-1)*4));
+	readl(intel_private.gtt+i-1);
 
 	return 0;
 }
@@ -397,29 +274,6 @@ static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type)
 	return new;
 }
 
-static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
-{
-	struct agp_memory *new;
-
-	if (type == AGP_DCACHE_MEMORY) {
-		if (pg_count != intel_private.num_dcache_entries)
-			return NULL;
-
-		new = agp_create_memory(1);
-		if (new == NULL)
-			return NULL;
-
-		new->type = AGP_DCACHE_MEMORY;
-		new->page_count = pg_count;
-		new->num_scratch_pages = 0;
-		agp_free_page_array(new);
-		return new;
-	}
-	if (type == AGP_PHYS_MEMORY)
-		return alloc_agpphysmem_i8xx(pg_count, type);
-	return NULL;
-}
-
 static void intel_i810_free_by_type(struct agp_memory *curr)
 {
 	agp_free_key(curr->key);
@@ -437,13 +291,6 @@ static void intel_i810_free_by_type(struct agp_memory *curr)
 	kfree(curr);
 }
 
-static unsigned long intel_i810_mask_memory(struct agp_bridge_data *bridge,
-					    dma_addr_t addr, int type)
-{
-	/* Type checking must be done elsewhere */
-	return addr | bridge->driver->masks[type].mask;
-}
-
 static int intel_gtt_setup_scratch_page(void)
 {
 	struct page *page;
@@ -455,7 +302,7 @@ static int intel_gtt_setup_scratch_page(void)
 	get_page(page);
 	set_pages_uc(page, 1);
 
-	if (USE_PCI_DMA_API && INTEL_GTT_GEN > 2) {
+	if (intel_private.base.needs_dmar) {
 		dma_addr = pci_map_page(intel_private.pcidev, page, 0,
 				    PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 		if (pci_dma_mapping_error(intel_private.pcidev, dma_addr))
@@ -470,34 +317,45 @@ static int intel_gtt_setup_scratch_page(void)
 	return 0;
 }
 
-static const struct aper_size_info_fixed const intel_fake_agp_sizes[] = {
+static void i810_write_entry(dma_addr_t addr, unsigned int entry,
+			     unsigned int flags)
+{
+	u32 pte_flags = I810_PTE_VALID;
+
+	switch (flags) {
+	case AGP_DCACHE_MEMORY:
+		pte_flags |= I810_PTE_LOCAL;
+		break;
+	case AGP_USER_CACHED_MEMORY:
+		pte_flags |= I830_PTE_SYSTEM_CACHED;
+		break;
+	}
+
+	writel(addr | pte_flags, intel_private.gtt + entry);
+}
+
+static const struct aper_size_info_fixed intel_fake_agp_sizes[] = {
+	{32, 8192, 3},
+	{64, 16384, 4},
 	{128, 32768, 5},
-	/* The 64M mode still requires a 128k gatt */
-	{64, 16384, 5},
 	{256, 65536, 6},
 	{512, 131072, 7},
 };
 
-static unsigned int intel_gtt_stolen_entries(void)
+static unsigned int intel_gtt_stolen_size(void)
 {
 	u16 gmch_ctrl;
 	u8 rdct;
 	int local = 0;
 	static const int ddt[4] = { 0, 16, 32, 64 };
-	unsigned int overhead_entries, stolen_entries;
 	unsigned int stolen_size = 0;
 