projects/linux·commit 822ef14e

Merge tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

822ef14e · Linus Torvalds <[email protected]> · 2020-08-03 19:30:59 -07:00

Pull ARM SoC driver updates from Arnd Bergmann:
 "A couple of subsystems have their own subsystem maintainers but choose
  to have the code merged through the soc tree as upstream, as the code
  tends to be used across multiple SoCs or has SoC specific drivers
  itself:

   - memory controllers:

     Krzysztof Kozlowski takes ownership of the drivers/memory subsystem
     and its drivers, starting out with a set of cleanup patches.

     A larger driver for the Tegra memory controller that was
     accidentally missed for v5.8 is now added.

   - reset controllers:

     Only minor updates to drivers/reset this time

   - firmware:

     The "turris mox" firmware driver gains support for signed firmware
     blobs The tegra firmware driver gets extended to export some debug
     information Various updates to i.MX firmware drivers, mostly
     cosmetic

   - ARM SCMI/SCPI:

     A new mechanism for platform notifications is added, among a number
     of minor changes.

   - optee:

     Probing of the TEE bus is rewritten to better support detection of
     devices that depend on the tee-supplicant user space. A new
     firmware based trusted platform module (fTPM) driver is added based
     on OP-TEE

   - SoC attributes:

     A new driver is added to provide a generic soc_device for
     identifying a machine through the SMCCC ARCH_SOC_ID firmware
     interface rather than by probing SoC family specific registers.

     The series also contains some cleanups to the common soc_device
     code.

  There are also a number of updates to SoC specific drivers, the main
  ones are:

   - Mediatek cmdq driver gains a few in-kernel interfaces

   - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
     support for additional SoC variants

   - The Qualcomm GENI core code gains interconnect path voting and
     performance level support, and integrating this into a number of
     device drivers.

   - A new driver for Samsung Exynos5800 voltage coupler for

   - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
     specific device drivers

   - Updates to the TI K3 Ring Accelerator driver"

* tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits)
  soc: qcom: geni: Fix unused label warning
  soc: qcom: smd-rpm: Fix kerneldoc
  memory: jz4780_nemc: Only request IO memory the driver will use
  soc: qcom: pdr: Reorder the PD state indication ack
  MAINTAINERS: Add Git repository for memory controller drivers
  memory: brcmstb_dpfe: Fix language typo
  memory: samsung: exynos5422-dmc: Correct white space issues
  memory: samsung: exynos-srom: Correct alignment
  memory: pl172: Enclose macro argument usage in parenthesis
  memory: of: Correct kerneldoc
  memory: omap-gpmc: Fix language typo
  memory: omap-gpmc: Correct white space issues
  memory: omap-gpmc: Use 'unsigned int' for consistency
  memory: omap-gpmc: Enclose macro argument usage in parenthesis
  memory: omap-gpmc: Correct kerneldoc
  memory: mvebu-devbus: Align with open parenthesis
  memory: mvebu-devbus: Add missing braces to all arms of if statement
  memory: bt1-l2-ctl: Add blank lines after declarations
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  ...
Commit
822ef14e9dc73079c646d33aa77e2ac42361b39e
Parents
6ce076f4 · d76cfc7c

Merge commit. Changes below are compared with the first parent: 6ce076f4.

Changes

143 files changed · +10925 −1350

FileStatusAddDelContent
Documentation/ABI/testing/debugfs-turris-mox-rwtmadded+9−0View file
Documentation/ABI/testing/sysfs-bus-optee-devicesadded+8−0View file
Documentation/ABI/testing/sysfs-devices-socmodified+30−0View file
Documentation/devicetree/bindings/firmware/qcom,scm.txtmodified+2−0View file
Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txtmodified+1−1View file
Documentation/devicetree/bindings/reset/fsl,imx-src.txtdeleted+0−49View before deletion
Documentation/devicetree/bindings/reset/fsl,imx-src.yamladded+82−0View file
Documentation/devicetree/bindings/reset/fsl,imx7-src.txtdeleted+0−56View before deletion
Documentation/devicetree/bindings/reset/fsl,imx7-src.yamladded+58−0View file
Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txtdeleted+0−62View before deletion
Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yamladded+87−0View file
Documentation/devicetree/bindings/soc/ti/k3-ringacc.txtdeleted+0−59View before deletion
Documentation/devicetree/bindings/soc/ti/k3-ringacc.yamladded+102−0View file
MAINTAINERSmodified+9−0View file
arch/arm/mach-exynos/Kconfigmodified+1−0View file
arch/arm/mach-omap2/id.cmodified+11−9View file
arch/arm64/configs/defconfigmodified+0−1View file
drivers/char/tpm/tpm_ftpm_tee.cmodified+60−10View file
drivers/clk/clk-scmi.cmodified+19−3View file
drivers/cpufreq/scmi-cpufreq.cmodified+2−1View file
drivers/dma/ti/k3-udma-glue.cmodified+13−29View file
drivers/dma/ti/k3-udma.cmodified+11−23View file
drivers/firmware/arm_scmi/Makefilemodified+2−2View file
drivers/firmware/arm_scmi/base.cmodified+104−4View file
drivers/firmware/arm_scmi/clock.cmodified+18−2View file
drivers/firmware/arm_scmi/common.hmodified+4−0View file
drivers/firmware/arm_scmi/driver.cmodified+12−3View file
drivers/firmware/arm_scmi/notify.cadded+1526−0View file
drivers/firmware/arm_scmi/notify.hadded+68−0View file
drivers/firmware/arm_scmi/perf.cmodified+146−5View file
drivers/firmware/arm_scmi/power.cmodified+86−6View file
drivers/firmware/arm_scmi/reset.cmodified+92−4View file
drivers/firmware/arm_scmi/scmi_pm_domain.cmodified+6−6View file
drivers/firmware/arm_scmi/sensors.cmodified+64−5View file
drivers/firmware/arm_scmi/smc.cmodified+1−0View file
drivers/firmware/imx/Makefilemodified+1−1View file
drivers/firmware/imx/imx-scu-irq.cmodified+2−0View file
drivers/soc/imx/soc-imx-scu.c → drivers/firmware/imx/imx-scu-soc.crenamed+17−66View file
drivers/firmware/imx/imx-scu.cmodified+4−0View file
drivers/firmware/imx/rm.cadded+45−0View file
drivers/firmware/imx/scu-pd.cmodified+12−2View file
drivers/firmware/qcom_scm.cmodified+4−4View file
drivers/firmware/smccc/Kconfigmodified+9−0View file
drivers/firmware/smccc/Makefilemodified+1−0View file
drivers/firmware/smccc/soc_id.cadded+114−0View file
drivers/firmware/tegra/bpmp-debugfs.cmodified+399−37View file
drivers/firmware/tegra/bpmp.cmodified+3−3View file
drivers/firmware/ti_sci.cmodified+1−1View file
drivers/firmware/ti_sci.hmodified+1−1View file
drivers/firmware/turris-mox-rwtm.cmodified+166−0View file
drivers/gpu/drm/mediatek/mtk_drm_crtc.cmodified+1−0View file
drivers/i2c/busses/i2c-qcom-geni.cmodified+25−1View file
drivers/interconnect/qcom/bcm-voter.cmodified+1−5View file
drivers/irqchip/irq-ti-sci-inta.cmodified+1−1View file
drivers/irqchip/irq-ti-sci-intr.cmodified+1−1View file
drivers/memory/Kconfigmodified+6−0View file
drivers/memory/brcmstb_dpfe.cmodified+3−4View file
drivers/memory/bt1-l2-ctl.cmodified+2−0View file
drivers/memory/da8xx-ddrctl.cmodified+0−2View file
drivers/memory/emif-asm-offsets.cmodified+1−9View file
drivers/memory/emif.cmodified+9−14View file
drivers/memory/fsl_ifc.cmodified+15−15View file
drivers/memory/jz4780-nemc.cmodified+16−1View file
drivers/memory/mtk-smi.cmodified+1−1View file
drivers/memory/mvebu-devbus.cmodified+10−10View file
drivers/memory/of_memory.cmodified+16−16View file
drivers/memory/of_memory.hmodified+11−10View file
drivers/memory/omap-gpmc.cmodified+29−37View file
drivers/memory/pl172.cmodified+8−11View file
drivers/memory/samsung/Kconfigmodified+7−0View file
drivers/memory/samsung/exynos-srom.cmodified+11−11View file
drivers/memory/samsung/exynos5422-dmc.cmodified+10−5View file
drivers/memory/tegra/Kconfigmodified+14−0View file
drivers/memory/tegra/Makefilemodified+4−0View file
drivers/memory/tegra/mc.hmodified+1−0View file
drivers/memory/tegra/tegra124-emc.cmodified+4−3View file
drivers/memory/tegra/tegra186-emc.cmodified+13−12View file
drivers/memory/tegra/tegra186.cmodified+2−2View file
drivers/memory/tegra/tegra20-emc.cmodified+14−20View file
drivers/memory/tegra/tegra210-emc-cc-r21021.cadded+1775−0View file
drivers/memory/tegra/tegra210-emc-core.cadded+2100−0View file
drivers/memory/tegra/tegra210-emc-table.cadded+90−0View file
drivers/memory/tegra/tegra210-emc.hadded+1016−0View file
drivers/memory/tegra/tegra210-mc.hadded+50−0View file
drivers/memory/tegra/tegra30-emc.cmodified+47−75View file
drivers/memory/ti-aemif.cmodified+8−8View file
drivers/memory/ti-emif-pm.cmodified+1−1View file
drivers/reset/reset-intel-gw.cmodified+12−12View file
drivers/reset/reset-simple.cmodified+21−2View file
drivers/reset/reset-socfpga.cmodified+1−2View file
drivers/reset/reset-sunxi.cmodified+1−2View file
drivers/reset/reset-ti-sci.cmodified+1−1View file
drivers/reset/reset-ti-syscon.cmodified+1−1View file
drivers/reset/reset-uniphier-glue.cmodified+1−2View file
drivers/soc/imx/Kconfigmodified+1−9View file
drivers/soc/imx/Makefilemodified+0−1View file
drivers/soc/mediatek/mtk-cmdq-helper.cmodified+40−6View file
drivers/soc/qcom/Kconfigmodified+1−1View file
drivers/soc/qcom/pdr_interface.cmodified+3−1View file
drivers/soc/qcom/qcom-geni-se.cmodified+165−0View file
drivers/soc/qcom/rpmh-rsc.cmodified+14−5View file
drivers/soc/qcom/rpmh.cmodified+1−3View file
drivers/soc/qcom/smd-rpm.cmodified+5−0View file
drivers/soc/qcom/socinfo.cmodified+64−1View file
drivers/soc/renesas/Kconfigmodified+11−0View file
drivers/soc/renesas/Makefilemodified+1−0View file
drivers/soc/renesas/r8a774e1-sysc.cadded+43−0View file
drivers/soc/renesas/rcar-rst.cmodified+1−0View file
drivers/soc/renesas/rcar-sysc.cmodified+3−0View file
drivers/soc/renesas/rcar-sysc.hmodified+1−0View file
drivers/soc/renesas/renesas-soc.cmodified+8−0View file
drivers/soc/samsung/Kconfigmodified+3−0View file
drivers/soc/samsung/Makefilemodified+1−0View file
drivers/soc/samsung/exynos-regulator-coupler.cadded+221−0View file
drivers/soc/tegra/fuse/tegra-apbmisc.cmodified+1−1View file
drivers/soc/ti/k3-ringacc.cmodified+135−65View file
drivers/soc/ti/knav_qmss_acc.cmodified+1−1View file
drivers/soc/ux500/ux500-soc-id.cmodified+12−10View file
drivers/soc/versatile/soc-integrator.cmodified+23−25View file
drivers/soc/versatile/soc-realview.cmodified+23−25View file
drivers/spi/spi-geni-qcom.cmodified+122−71View file
drivers/spi/spi-qcom-qspi.cmodified+110−7View file
drivers/tee/optee/core.cmodified+24−3View file
drivers/tee/optee/device.cmodified+17−21View file
drivers/tee/optee/optee_private.hmodified+9−1View file
drivers/tty/serial/qcom_geni_serial.cmodified+162−48View file
include/dt-bindings/reset/ti-syscon.hmodified+1−1View file
include/linux/arm-smccc.hmodified+5−0View file
include/linux/firmware/imx/sci.hmodified+2−0View file
include/linux/firmware/imx/svc/rm.hadded+69−0View file
include/linux/mailbox/mtk-cmdq-mailbox.hmodified+2−0View file
include/linux/of.hmodified+5−0View file
include/linux/qcom-geni-se.hmodified+45−0View file
drivers/reset/reset-simple.h → include/linux/reset/reset-simple.hrenamed+7−0View file
include/linux/scmi_protocol.hmodified+105−5View file
include/linux/soc/mediatek/mtk-cmdq.hmodified+31−0View file
include/linux/soc/ti/k3-ringacc.hmodified+4−0View file
include/linux/soc/ti/ti_sci_inta_msi.hmodified+1−1View file
include/linux/soc/ti/ti_sci_protocol.hmodified+3−3View file
include/soc/qcom/rpmh.hmodified+4−3View file
include/soc/tegra/bpmp-abi.hmodified+636−277View file
include/soc/tegra/fuse.hmodified+2−0View file
include/trace/events/scmi.hmodified+3−3View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/ABI/testing/debugfs-turris-mox-rwtm

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diff --git a/Documentation/ABI/testing/debugfs-turris-mox-rwtm b/Documentation/ABI/testing/debugfs-turris-mox-rwtm
new file mode 100644
index 0000000..2b3255e
--- /dev/null
+++ b/Documentation/ABI/testing/debugfs-turris-mox-rwtm
@@ -0,0 +1,9 @@
+What: /sys/kernel/debug/turris-mox-rwtm/do_sign
+Date: Jun 2020
+KernelVersion: 5.8
+Contact: Marek Behún <[email protected]>
+Description: (W) Message to sign with the ECDSA private key stored in
+ device's OTP. The message must be exactly 64 bytes (since
+ this is intended for SHA-512 hashes).
+ (R) The resulting signature, 136 bytes. This contains the R and
+ S values of the ECDSA signature, both in big-endian format.

Documentation/ABI/testing/sysfs-bus-optee-devices

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diff --git a/Documentation/ABI/testing/sysfs-bus-optee-devices b/Documentation/ABI/testing/sysfs-bus-optee-devices
new file mode 100644
index 0000000..0f58701
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-optee-devices
@@ -0,0 +1,8 @@
+What: /sys/bus/tee/devices/optee-ta-<uuid>/
+Date: May 2020
+KernelVersion 5.8
+Description:
+ OP-TEE bus provides reference to registered drivers under this directory. The <uuid>
+ matches Trusted Application (TA) driver and corresponding TA in secure OS. Drivers
+ are free to create needed API under optee-ta-<uuid> directory.

Documentation/ABI/testing/sysfs-devices-soc

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diff --git a/Documentation/ABI/testing/sysfs-devices-soc b/Documentation/ABI/testing/sysfs-devices-soc
index ba3a3fa..ea999e2 100644
--- a/Documentation/ABI/testing/sysfs-devices-soc
+++ b/Documentation/ABI/testing/sysfs-devices-soc
@@ -26,6 +26,30 @@ Description:
Read-only attribute common to all SoCs. Contains SoC family name
(e.g. DB8500).
+ On many of ARM based silicon with SMCCC v1.2+ compliant firmware
+ this will contain the JEDEC JEP106 manufacturer’s identification
+ code. The format is "jep106:XXYY" where XX is identity code and
+ YY is continuation code.
+
+ This manufacturer’s identification code is defined by one
+ or more eight (8) bit fields, each consisting of seven (7)
+ data bits plus one (1) odd parity bit. It is a single field,
+ limiting the possible number of vendors to 126. To expand
+ the maximum number of identification codes, a continuation
+ scheme has been defined.
+
+ The specified mechanism is that an identity code of 0x7F
+ represents the "continuation code" and implies the presence
+ of an additional identity code field, and this mechanism
+ may be extended to multiple continuation codes followed
+ by the manufacturer's identity code.
+
+ For example, ARM has identity code 0x7F 0x7F 0x7F 0x7F 0x3B,
+ which is code 0x3B on the fifth 'page'. This is shortened
+ as JEP106 identity code of 0x3B and a continuation code of
+ 0x4 to represent the four continuation codes preceding the
+ identity code.
+
What: /sys/devices/socX/serial_number
Date: January 2019
contact: Bjorn Andersson <[email protected]>
@@ -40,6 +64,12 @@ Description:
Read-only attribute supported by most SoCs. In the case of
ST-Ericsson's chips this contains the SoC serial number.
+ On many of ARM based silicon with SMCCC v1.2+ compliant firmware
+ this will contain the SOC ID appended to the family attribute
+ to ensure there is no conflict in this namespace across various
+ vendors. The format is "jep106:XXYY:ZZZZ" where XX is identity
+ code, YY is continuation code and ZZZZ is the SOC ID.
+
What: /sys/devices/socX/revision
Date: January 2012
contact: Lee Jones <[email protected]>

Documentation/devicetree/bindings/firmware/qcom,scm.txt

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diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
index 354b448..7845643 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
@@ -11,10 +11,12 @@ Required properties:
* "qcom,scm-apq8084"
* "qcom,scm-ipq4019"
* "qcom,scm-ipq806x"
+ * "qcom,scm-ipq8074"
* "qcom,scm-msm8660"
* "qcom,scm-msm8916"
* "qcom,scm-msm8960"
* "qcom,scm-msm8974"
+ * "qcom,scm-msm8994"
* "qcom,scm-msm8996"
* "qcom,scm-msm8998"
* "qcom,scm-sc7180"

Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt

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diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
index 1a8718f..178fca0 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
@@ -55,7 +55,7 @@ Required Properties:
corresponds to a range of host irqs.
For more details on TISCI IRQ resource management refer:
-http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
+https://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
Example:
--------

Documentation/devicetree/bindings/reset/fsl,imx-src.txt

View before deletion
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx-src.txt
deleted file mode 100644
index 6ed79e6..0000000
--- a/Documentation/devicetree/bindings/reset/fsl,imx-src.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-Freescale i.MX System Reset Controller
-======================================
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required properties:
-- compatible: Should be "fsl,<chip>-src"
-- reg: should be register base and length as documented in the
- datasheet
-- interrupts: Should contain SRC interrupt and CPU WDOG interrupt,
- in this order.
-- #reset-cells: 1, see below
-
-example:
-
-src: src@20d8000 {
- compatible = "fsl,imx6q-src";
- reg = <0x020d8000 0x4000>;
- interrupts = <0 91 0x04 0 96 0x04>;
- #reset-cells = <1>;
-};
-
-Specifying reset lines connected to IP modules
-==============================================
-
-The system reset controller can be used to reset the GPU, VPU,
-IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
-nodes should specify the reset line on the SRC in their resets
-property, containing a phandle to the SRC device node and a
-RESET_INDEX specifying which module to reset, as described in
-reset.txt
-
-example:
-
- ipu1: ipu@2400000 {
- resets = <&src 2>;
- };
- ipu2: ipu@2800000 {
- resets = <&src 4>;
- };
-
-The following RESET_INDEX values are valid for i.MX5:
-GPU_RESET 0
-VPU_RESET 1
-IPU1_RESET 2
-OPEN_VG_RESET 3
-The following additional RESET_INDEX value is valid for i.MX6:
-IPU2_RESET 4

Documentation/devicetree/bindings/reset/fsl,imx-src.yaml

View file
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml b/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
new file mode 100644
index 0000000..27c5e34
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX System Reset Controller
+
+maintainers:
+ - Philipp Zabel <[email protected]>
+
+description: |
+ The system reset controller can be used to reset the GPU, VPU,
+ IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
+ nodes should specify the reset line on the SRC in their resets
+ property, containing a phandle to the SRC device node and a
+ RESET_INDEX specifying which module to reset, as described in
+ reset.txt
+
+ The following RESET_INDEX values are valid for i.MX5:
+ GPU_RESET 0
+ VPU_RESET 1
+ IPU1_RESET 2
+ OPEN_VG_RESET 3
+ The following additional RESET_INDEX value is valid for i.MX6:
+ IPU2_RESET 4
+
+properties:
+ compatible:
+ oneOf:
+ - const: "fsl,imx51-src"
+ - items:
+ - const: "fsl,imx50-src"
+ - const: "fsl,imx51-src"
+ - items:
+ - const: "fsl,imx53-src"
+ - const: "fsl,imx51-src"
+ - items:
+ - const: "fsl,imx6q-src"
+ - const: "fsl,imx51-src"
+ - items:
+ - const: "fsl,imx6sx-src"
+ - const: "fsl,imx51-src"
+ - items:
+ - const: "fsl,imx6sl-src"
+ - const: "fsl,imx51-src"
+ - items:
+ - const: "fsl,imx6ul-src"
+ - const: "fsl,imx51-src"
+ - items:
+ - const: "fsl,imx6sll-src"
+ - const: "fsl,imx51-src"
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: SRC interrupt
+ - description: CPU WDOG interrupts out of SRC
+ minItems: 1
+ maxItems: 2
+
+ '#reset-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@73fd0000 {
+ compatible = "fsl,imx51-src";
+ reg = <0x73fd0000 0x4000>;
+ interrupts = <75>;
+ #reset-cells = <1>;
+ };

Documentation/devicetree/bindings/reset/fsl,imx7-src.txt

View before deletion
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
deleted file mode 100644
index e10502d..0000000
--- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
+++ /dev/null
@@ -1,56 +0,0 @@
-Freescale i.MX7 System Reset Controller
-======================================
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required properties:
-- compatible:
- - For i.MX7 SoCs should be "fsl,imx7d-src", "syscon"
- - For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon"
- - For i.MX8MM SoCs should be "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon"
- - For i.MX8MN SoCs should be "fsl,imx8mn-src", "fsl,imx8mq-src", "syscon"
- - For i.MX8MP SoCs should be "fsl,imx8mp-src", "syscon"
-- reg: should be register base and length as documented in the
- datasheet
-- interrupts: Should contain SRC interrupt
-- #reset-cells: 1, see below
-
-example:
-
-src: reset-controller@30390000 {
- compatible = "fsl,imx7d-src", "syscon";
- reg = <0x30390000 0x2000>;
- interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
- #reset-cells = <1>;
-};
-
-
-Specifying reset lines connected to IP modules
-==============================================
-
-The system reset controller can be used to reset various set of
-peripherals. Device nodes that need access to reset lines should
-specify them as a reset phandle in their corresponding node as
-specified in reset.txt.
-
-Example:
-
- pcie: pcie@33800000 {
-
- ...
-
- resets = <&src IMX7_RESET_PCIEPHY>,
- <&src IMX7_RESET_PCIE_CTRL_APPS_EN>;
- reset-names = "pciephy", "apps";
-
- ...
- };
-
-
-For list of all valid reset indices see
-<dt-bindings/reset/imx7-reset.h> for i.MX7,
-<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ and
-<dt-bindings/reset/imx8mq-reset.h> for i.MX8MM and
-<dt-bindings/reset/imx8mq-reset.h> for i.MX8MN and
-<dt-bindings/reset/imx8mp-reset.h> for i.MX8MP

Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml

View file
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml b/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml
new file mode 100644
index 0000000..b1a71c1
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX7 System Reset Controller
+
+maintainers:
+ - Andrey Smirnov <[email protected]>
+
+description: |
+ The system reset controller can be used to reset various set of
+ peripherals. Device nodes that need access to reset lines should
+ specify them as a reset phandle in their corresponding node as
+ specified in reset.txt.
+
+ For list of all valid reset indices see
+ <dt-bindings/reset/imx7-reset.h> for i.MX7,
+ <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN,
+ <dt-bindings/reset/imx8mp-reset.h> for i.MX8MP.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - fsl,imx7d-src
+ - fsl,imx8mq-src
+ - fsl,imx8mp-src
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ '#reset-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ reset-controller@30390000 {
+ compatible = "fsl,imx7d-src", "syscon";
+ reg = <0x30390000 0x2000>;
+ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+ #reset-cells = <1>;
+ };

Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt

View before deletion
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
deleted file mode 100644
index 616fddc..0000000
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-Qualcomm Resource Power Manager (RPM) over SMD
-
-This driver is used to interface with the Resource Power Manager (RPM) found in
-various Qualcomm platforms. The RPM allows each component in the system to vote
-for state of the system resources, such as clocks, regulators and bus
-frequencies.
-
-The SMD information for the RPM edge should be filled out. See qcom,smd.txt for
-the required edge properties. All SMD related properties will reside within the
-RPM node itself.
-
-= SUBDEVICES
-
-The RPM exposes resources to its subnodes. The rpm_requests node must be
-present and this subnode may contain children that designate regulator
-resources.
-
-- compatible:
- Usage: required
- Value type: <string>
- Definition: must be one of:
- "qcom,rpm-apq8084"
- "qcom,rpm-msm8916"
- "qcom,rpm-msm8974"
- "qcom,rpm-msm8976"
- "qcom,rpm-msm8998"
- "qcom,rpm-sdm660"
- "qcom,rpm-qcs404"
-
-- qcom,smd-channels:
- Usage: required
- Value type: <string>
- Definition: must be "rpm_requests"
-
-Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
-for information on the regulator subnodes that can exist under the rpm_requests.
-
-Example:
-
- soc {
- apcs: syscon@f9011000 {
- compatible = "syscon";
- reg = <0xf9011000 0x1000>;
- };
- };
-
- smd {
- compatible = "qcom,smd";
-
- rpm {
- interrupts = <0 168 1>;
- qcom,ipc = <&apcs 8 0>;
- qcom,smd-edge = <15>;
-
- rpm_requests {
- compatible = "qcom,rpm-msm8974";
- qcom,smd-channels = "rpm_requests";
-
- ...
- };
- };
- };

Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml

View file
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
new file mode 100644
index 0000000..468d658
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Resource Power Manager (RPM) over SMD
+
+description: |
+ This driver is used to interface with the Resource Power Manager (RPM) found
+ in various Qualcomm platforms. The RPM allows each component in the system
+ to vote for state of the system resources, such as clocks, regulators and bus
+ frequencies.
+
+ The SMD information for the RPM edge should be filled out. See qcom,smd.txt
+ for the required edge properties. All SMD related properties will reside
+ within the RPM node itself.
+
+ The RPM exposes resources to its subnodes. The rpm_requests node must be
+ present and this subnode may contain children that designate regulator
+ resources.
+
+ Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
+ for information on the regulator subnodes that can exist under the
+ rpm_requests.
+
+maintainers:
+ - Kathiravan T <[email protected]>
+
+properties:
+ compatible:
+ enum:
+ - qcom,rpm-apq8084
+ - qcom,rpm-ipq6018
+ - qcom,rpm-msm8916
+ - qcom,rpm-msm8974
+ - qcom,rpm-msm8976
+ - qcom,rpm-msm8996
+ - qcom,rpm-msm8998
+ - qcom,rpm-sdm660
+ - qcom,rpm-qcs404
+
+ qcom,smd-channels:
+ $ref: /schemas/types.yaml#/definitions/string-array
+ description: Channel name used for the RPM communication
+ items:
+ - const: rpm_requests
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,rpm-apq8084
+ - qcom,rpm-msm8916
+ - qcom,rpm-msm8974
+then:
+ required:
+ - qcom,smd-channels
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ smd {
+ compatible = "qcom,smd";
+
+ rpm {
+ interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+ qcom,ipc = <&apcs 8 0>;
+ qcom,smd-edge = <15>;
+
+ rpm_requests {
+ compatible = "qcom,rpm-msm8974";
+ qcom,smd-channels = "rpm_requests";
+
+ /* Regulator nodes to follow */
+ };
+ };
+ };
+...

Documentation/devicetree/bindings/soc/ti/k3-ringacc.txt

View before deletion
diff --git a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.txt b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.txt
deleted file mode 100644
index 59758cc..0000000
--- a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.txt
+++ /dev/null
@@ -1,59 +0,0 @@
-* Texas Instruments K3 NavigatorSS Ring Accelerator
-
-The Ring Accelerator (RA) is a machine which converts read/write accesses
-from/to a constant address into corresponding read/write accesses from/to a
-circular data structure in memory. The RA eliminates the need for each DMA
-controller which needs to access ring elements from having to know the current
-state of the ring (base address, current offset). The DMA controller
-performs a read or write access to a specific address range (which maps to the
-source interface on the RA) and the RA replaces the address for the transaction
-with a new address which corresponds to the head or tail element of the ring
-(head for reads, tail for writes).
-
-The Ring Accelerator is a hardware module that is responsible for accelerating
-management of the packet queues. The K3 SoCs can have more than one RA instances
-
-Required properties:
-- compatible : Must be "ti,am654-navss-ringacc";
-- reg : Should contain register location and length of the following
- named register regions.
-- reg-names : should be
- "rt" - The RA Ring Real-time Control/Status Registers
- "fifos" - The RA Queues Registers
- "proxy_gcfg" - The RA Proxy Global Config Registers
- "proxy_target" - The RA Proxy Datapath Registers
-- ti,num-rings : Number of rings supported by RA
-- ti,sci-rm-range-gp-rings : TI-SCI RM subtype for GP ring range
-- ti,sci : phandle on TI-SCI compatible System controller node
-- ti,sci-dev-id : TI-SCI device id of the ring accelerator
-- msi-parent : phandle for "ti,sci-inta" interrupt controller
-
-Optional properties:
- -- ti,dma-ring-reset-quirk : enable ringacc / udma ring state interoperability
- issue software w/a
-
-Example:
-
-ringacc: ringacc@3c000000 {
- compatible = "ti,am654-navss-ringacc";
- reg = <0x0 0x3c000000 0x0 0x400000>,
- <0x0 0x38000000 0x0 0x400000>,
- <0x0 0x31120000 0x0 0x100>,
- <0x0 0x33000000 0x0 0x40000>;
- reg-names = "rt", "fifos",
- "proxy_gcfg", "proxy_target";
- ti,num-rings = <818>;
- ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
- ti,dma-ring-reset-quirk;
- ti,sci = <&dmsc>;
- ti,sci-dev-id = <187>;
- msi-parent = <&inta_main_udmass>;
-};
-
-client:
-
-dma_ipx: dma_ipx@<addr> {
- ...
- ti,ringacc = <&ringacc>;

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include/soc/qcom/rpmh.h

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include/soc/tegra/bpmp-abi.h

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include/soc/tegra/fuse.h

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include/trace/events/scmi.h

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