Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

b27186ab · Linus Torvalds <[email protected]> · 2018-10-26 12:09:58 -07:00

Pull Devicetree updates from Rob Herring:
 "A bit bigger than normal as I've been busy this cycle.

  There's a few things with dependencies and a few things subsystem
  maintainers didn't pick up, so I'm taking them thru my tree.

  The fixes from Johan didn't get into linux-next, but they've been
  waiting for some time now and they are what's left of what subsystem
  maintainers didn't pick up.

  Summary:

   - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4

   - Work to get rid of direct accesses to struct device_node name and
     type pointers in preparation for removing them. New helpers for
     parsing DT cpu nodes and conversions to use the helpers. printk
     conversions to %pOFn for printing DT node names. Most went thru
     subystem trees, so this is the remainder.

   - Fixes to DT child node lookups to actually be restricted to child
     nodes instead of treewide.

   - Refactoring of dtb targets out of arch code. This makes the support
     more uniform and enables building all dtbs on c6x, microblaze, and
     powerpc.

   - Various DT binding updates for Renesas r8a7744 SoC

   - Vendor prefixes for Facebook, OLPC

   - Restructuring of some ARM binding docs moving some peripheral
     bindings out of board/SoC binding files

   - New "secure-chosen" binding for secure world settings on ARM

   - Dual licensing of 2 DT IRQ binding headers"

* tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
  ARM: dt: relicense two DT binding IRQ headers
  power: supply: twl4030-charger: fix OF sibling-node lookup
  NFC: nfcmrvl_uart: fix OF child-node lookup
  net: stmmac: dwmac-sun8i: fix OF child-node lookup
  net: bcmgenet: fix OF child-node lookup
  drm/msm: fix OF child-node lookup
  drm/mediatek: fix OF sibling-node lookup
  of: Add missing exports of node name compare functions
  dt-bindings: Add OLPC vendor prefix
  dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus
  dt-bindings: thermal: samsung: Add SPDX license identifier
  dt-bindings: clock: samsung: Add SPDX license identifiers
  dt-bindings: timer: ostm: Add R7S9210 support
  dt-bindings: phy: rcar-gen2: Add r8a7744 support
  dt-bindings: can: rcar_can: Add r8a7744 support
  dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
  dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
  dt-bindings: thermal: rcar: Add device tree support for r8a7744
  Documentation: dt: Add binding for /secure-chosen/stdout-path
  dt-bindings: arm: zte: Move sysctrl bindings to their own doc
  ...

Commit: b27186abb37b7bd19e0ca434f4f425c807dbd708
Parents: 0ef7791e · d061864b

Merge commit. Changes below are compared with the first parent: 0ef7791e.

Changes

140 files changed · +1736 −1043

File	Status	Add	Del	Content
Documentation/devicetree/bindings/arm/al,alpine.txt	modified	+0	−72	View file
Documentation/devicetree/bindings/arm/atmel-at91.txt	modified	+0	−170	View file
Documentation/devicetree/bindings/arm/atmel-sysregs.txt	added	+171	−0	View file
Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp	modified	+31	−3	View file
Documentation/devicetree/bindings/arm/cpus.txt	modified	+2	−2	View file
Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt	added	+19	−0	View file
Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt	added	+19	−0	View file
Documentation/devicetree/bindings/arm/fsl.txt	modified	+0	−39	View file
Documentation/devicetree/bindings/arm/secure.txt	modified	+18	−1	View file
Documentation/devicetree/bindings/arm/zte,sysctrl.txt	added	+30	−0	View file
Documentation/devicetree/bindings/arm/zte.txt	modified	+1	−26	View file
Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt	modified	+1	−1	View file
Documentation/devicetree/bindings/fpga/fpga-region.txt	modified	+2	−2	View file
Documentation/devicetree/bindings/i2c/i2c.txt	modified	+1	−1	View file
Documentation/devicetree/bindings/mfd/arizona.txt	modified	+1	−1	View file
Documentation/devicetree/bindings/misc/lwn-bk4.txt	added	+26	−0	View file
Documentation/devicetree/bindings/net/can/rcar_can.txt	modified	+1	−0	View file
Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt	modified	+1	−0	View file
Documentation/devicetree/bindings/reset/fsl,imx7-src.txt	modified	+1	−1	View file
Documentation/devicetree/bindings/timer/renesas,cmt.txt	modified	+2	−0	View file
Documentation/devicetree/bindings/timer/renesas,ostm.txt	modified	+2	−1	View file
Documentation/devicetree/bindings/vendor-prefixes.txt	modified	+2	−0	View file
Documentation/devicetree/bindings/watchdog/renesas-wdt.txt	modified	+1	−0	View file
Makefile	modified	+36	−1	View file
arch/arc/Makefile	modified	+0	−6	View file
arch/arm/Makefile	modified	+1	−19	View file
arch/arm/boot/compressed/libfdt_env.h	modified	+2	−0	View file
arch/arm/kernel/devtree.c	modified	+1	−4	View file
arch/arm/kernel/topology.c	modified	+0	−6	View file
arch/arm/mach-shmobile/pm-rcar-gen2.c	modified	+2	−6	View file
arch/arm/mach-shmobile/pm-rmobile.c	modified	+1	−1	View file
arch/arm/mach-shmobile/timer.c	modified	+2	−8	View file
arch/arm64/Makefile	modified	+1	−16	View file
arch/arm64/kernel/smp.c	modified	+1	−1	View file
arch/c6x/Makefile	modified	+0	−2	View file
arch/c6x/boot/dts/Makefile	modified	+7	−10	View file
arch/c6x/boot/dts/linked_dtb.S	deleted	+0	−2	View before deletion
arch/c6x/include/asm/sections.h	modified	+0	−1	View file
arch/c6x/kernel/setup.c	modified	+5	−10	View file
arch/c6x/kernel/vmlinux.lds.S	modified	+0	−10	View file
arch/h8300/Makefile	modified	+1	−10	View file
arch/microblaze/Makefile	modified	+1	−3	View file
arch/microblaze/boot/dts/Makefile	modified	+4	−0	View file
arch/microblaze/kernel/cpu/cpuinfo.c	modified	+4	−2	View file
arch/mips/Makefile	modified	+1	−14	View file
arch/nds32/Makefile	modified	+1	−1	View file
arch/nios2/Makefile	modified	+1	−10	View file
arch/nios2/boot/Makefile	modified	+0	−22	View file
arch/nios2/boot/dts/Makefile	added	+6	−0	View file
arch/nios2/boot/linked_dtb.S	deleted	+0	−19	View before deletion
arch/nios2/kernel/cpuinfo.c	modified	+3	−1	View file
arch/nios2/kernel/time.c	modified	+2	−2	View file
arch/openrisc/kernel/setup.c	modified	+1	−2	View file
arch/powerpc/Makefile	modified	+0	−3	View file
arch/powerpc/boot/Makefile	modified	+26	−29	View file
arch/powerpc/boot/dts/Makefile	added	+6	−0	View file
arch/powerpc/boot/dts/fsl/Makefile	added	+4	−0	View file
arch/powerpc/boot/libfdt_env.h	modified	+2	−0	View file
arch/powerpc/platforms/4xx/soc.c	modified	+1	−1	View file
arch/powerpc/platforms/8xx/m8xx_setup.c	modified	+3	−2	View file
arch/powerpc/platforms/powermac/feature.c	modified	+18	−33	View file
arch/powerpc/platforms/powermac/setup.c	modified	+8	−7	View file
arch/sh/boards/of-generic.c	modified	+1	−1	View file
arch/sparc/include/asm/prom.h	modified	+0	−3	View file
arch/x86/kernel/devicetree.c	modified	+1	−1	View file
arch/xtensa/Makefile	modified	+1	−11	View file
arch/xtensa/platforms/xtfpga/setup.c	modified	+3	−3	View file
drivers/bus/fsl-mc/fsl-mc-bus.c	modified	+3	−3	View file
drivers/bus/mvebu-mbus.c	modified	+1	−1	View file
drivers/clk/mvebu/clk-cpu.c	modified	+2	−2	View file
drivers/edac/cpc925_edac.c	modified	+2	−18	View file
drivers/firmware/scpi_pm_domain.c	modified	+1	−1	View file
drivers/gpu/drm/mediatek/mtk_hdmi.c	modified	+3	−2	View file
drivers/gpu/drm/msm/adreno/adreno_gpu.c	modified	+3	−2	View file
drivers/iommu/fsl_pamu.c	modified	+1	−1	View file
drivers/net/ethernet/broadcom/genet/bcmmii.c	modified	+1	−1	View file
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c	modified	+10	−2	View file
drivers/nfc/nfcmrvl/uart.c	modified	+2	−3	View file
drivers/of/base.c	modified	+45	−2	View file
drivers/of/device.c	modified	+3	−2	View file
drivers/of/of_mdio.c	modified	+6	−6	View file
drivers/of/of_numa.c	modified	+4	−15	View file
drivers/of/of_private.h	modified	+8	−0	View file
drivers/of/overlay.c	modified	+2	−2	View file
drivers/of/platform.c	modified	+4	−4	View file
drivers/of/unittest-data/overlay_15.dts	modified	+2	−2	View file
drivers/of/unittest-data/tests-overlay.dtsi	modified	+2	−2	View file
drivers/of/unittest.c	modified	+18	−11	View file
drivers/power/supply/twl4030_charger.c	modified	+3	−2	View file
drivers/soc/dove/pmu.c	modified	+4	−4	View file
drivers/soc/fsl/qe/qe_tdm.c	modified	+2	−2	View file
drivers/soc/qcom/apr.c	modified	+1	−1	View file
drivers/soc/rockchip/pm_domains.c	modified	+22	−22	View file
drivers/soc/tegra/pmc.c	modified	+6	−6	View file
drivers/soc/ti/knav_dma.c	modified	+4	−4	View file
drivers/soc/ti/knav_qmss_queue.c	modified	+4	−4	View file
drivers/video/fbdev/fsl-diu-fb.c	modified	+1	−1	View file
include/dt-bindings/clock/exynos3250.h	modified	+1	−4	View file
include/dt-bindings/clock/exynos4.h	modified	+2	−5	View file
include/dt-bindings/clock/exynos5250.h	modified	+2	−5	View file
include/dt-bindings/clock/exynos5260-clk.h	modified	+2	−5	View file
include/dt-bindings/clock/exynos5410.h	modified	+2	−5	View file
include/dt-bindings/clock/exynos5420.h	modified	+2	−5	View file
include/dt-bindings/clock/exynos5433.h	modified	+1	−4	View file
include/dt-bindings/clock/exynos7-clk.h	modified	+2	−5	View file
include/dt-bindings/clock/s3c2410.h	modified	+1	−4	View file
include/dt-bindings/clock/s3c2412.h	modified	+1	−4	View file
include/dt-bindings/clock/s3c2443.h	modified	+1	−4	View file
include/dt-bindings/interrupt-controller/arm-gic.h	modified	+1	−1	View file
include/dt-bindings/interrupt-controller/irq.h	modified	+1	−1	View file
include/dt-bindings/thermal/thermal_exynos.h	modified	+1	−11	View file
include/linux/libfdt_env.h	modified	+1	−0	View file
include/linux/of.h	modified	+12	−7	View file
lib/vsprintf.c	modified	+6	−1	View file
scripts/Makefile	modified	+1	−2	View file
scripts/Makefile.lib	modified	+1	−1	View file
scripts/dtc/Makefile	modified	+8	−1	View file
scripts/dtc/Makefile.dtc	modified	+4	−0	View file
scripts/dtc/checks.c	modified	+143	−0	View file
scripts/dtc/data.c	modified	+3	−1	View file
scripts/dtc/dtc-parser.y	modified	+11	−5	View file
scripts/dtc/dtc.c	modified	+11	−0	View file
scripts/dtc/dtc.h	modified	+13	−0	View file
scripts/dtc/flattree.c	modified	+1	−1	View file
scripts/dtc/libfdt/fdt.c	modified	+79	−2	View file
scripts/dtc/libfdt/fdt_addresses.c	modified	+13	−22	View file
scripts/dtc/libfdt/fdt_overlay.c	modified	+3	−3	View file
scripts/dtc/libfdt/fdt_ro.c	modified	+174	−25	View file
scripts/dtc/libfdt/fdt_rw.c	modified	+14	−14	View file
scripts/dtc/libfdt/fdt_sw.c	modified	+87	−22	View file
scripts/dtc/libfdt/libfdt.h	modified	+67	−9	View file
scripts/dtc/libfdt/libfdt_env.h	modified	+1	−0	View file
scripts/dtc/libfdt/libfdt_internal.h	modified	+3	−2	View file
scripts/dtc/livetree.c	modified	+6	−6	View file
scripts/dtc/treesource.c	modified	+135	−90	View file
scripts/dtc/update-dtc-source.sh	modified	+1	−1	View file
scripts/dtc/util.c	modified	+6	−17	View file
scripts/dtc/util.h	modified	+4	−16	View file
scripts/dtc/version_gen.h	modified	+1	−1	View file
scripts/dtc/yamltree.c	added	+247	−0	View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/devicetree/bindings/arm/al,alpine.txt

View file

diff --git a/Documentation/devicetree/bindings/arm/al,alpine.txt b/Documentation/devicetree/bindings/arm/al,alpine.txt
index f404a4f..d00debe 100644
--- a/Documentation/devicetree/bindings/arm/al,alpine.txt
+++ b/Documentation/devicetree/bindings/arm/al,alpine.txt
@@ -14,75 +14,3 @@ compatible: must contain "al,alpine"
 
 	...
 }
-
-* CPU node:
-
-The Alpine platform includes cortex-a15 cores.
-enable-method: must be "al,alpine-smp" to allow smp  [1]
-
-Example:
-
-cpus {
-	#address-cells = <1>;
-	#size-cells = <0>;
-	enable-method = "al,alpine-smp";
-
-	cpu@0 {
-		compatible = "arm,cortex-a15";
-		device_type = "cpu";
-		reg = <0>;
-	};
-
-	cpu@1 {
-		compatible = "arm,cortex-a15";
-		device_type = "cpu";
-		reg = <1>;
-	};
-
-	cpu@2 {
-		compatible = "arm,cortex-a15";
-		device_type = "cpu";
-		reg = <2>;
-	};
-
-	cpu@3 {
-		compatible = "arm,cortex-a15";
-		device_type = "cpu";
-		reg = <3>;
-	};
-};
-
-
-* Alpine CPU resume registers
-
-The CPU resume register are used to define required resume address after
-reset.
-
-Properties:
-- compatible : Should contain "al,alpine-cpu-resume".
-- reg : Offset and length of the register set for the device
-
-Example:
-
-cpu_resume {
-	compatible = "al,alpine-cpu-resume";
-	reg = <0xfbff5ed0 0x30>;
-};
-
-* Alpine System-Fabric Service Registers
-
-The System-Fabric Service Registers allow various operation on CPU and
-system fabric, like powering CPUs off.
-
-Properties:
-- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
-- reg : Offset and length of the register set for the device
-
-Example:
-
-nb_service {
-        compatible = "al,alpine-sysfabric-service", "syscon";
-        reg = <0xfb070000 0x10000>;
-};
-
-[1] arm/cpu-enable-method/al,alpine-smp

Documentation/devicetree/bindings/arm/atmel-at91.txt

View file

diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 31220b5..4bf1b4d 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -70,173 +70,3 @@ compatible: must be one of:
        - "atmel,samv71q19"
        - "atmel,samv71q20"
        - "atmel,samv71q21"
-
-Chipid required properties:
-- compatible: Should be "atmel,sama5d2-chipid"
-- reg : Should contain registers location and length
-
-PIT Timer required properties:
-- compatible: Should be "atmel,at91sam9260-pit"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the PIT which is the IRQ line
-  shared across all System Controller members.
-
-System Timer (ST) required properties:
-- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the ST which is the IRQ line
-  shared across all System Controller members.
-- clocks: phandle to input clock.
-Its subnodes can be:
-- watchdog: compatible should be "atmel,at91rm9200-wdt"
-
-RSTC Reset Controller required properties:
-- compatible: Should be "atmel,<chip>-rstc".
-  <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
-- reg: Should contain registers location and length
-- clocks: phandle to input clock.
-
-Example:
-
-	rstc@fffffd00 {
-		compatible = "atmel,at91sam9260-rstc";
-		reg = <0xfffffd00 0x10>;
-		clocks = <&clk32k>;
-	};
-
-RAMC SDRAM/DDR Controller required properties:
-- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
-			"atmel,at91sam9260-sdramc",
-			"atmel,at91sam9g45-ddramc",
-			"atmel,sama5d3-ddramc",
-- reg: Should contain registers location and length
-
-Examples:
-
-	ramc0: ramc@ffffe800 {
-		compatible = "atmel,at91sam9g45-ddramc";
-		reg = <0xffffe800 0x200>;
-	};
-
-SHDWC Shutdown Controller
-
-required properties:
-- compatible: Should be "atmel,<chip>-shdwc".
-  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
-- reg: Should contain registers location and length
-- clocks: phandle to input clock.
-
-optional properties:
-- atmel,wakeup-mode: String, operation mode of the wakeup mode.
-  Supported values are: "none", "high", "low", "any".
-- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
-
-optional at91sam9260 properties:
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-optional at91sam9rl properties:
-- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-optional at91sam9x5 properties:
-- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
-
-Example:
-
-	shdwc@fffffd10 {
-		compatible = "atmel,at91sam9260-shdwc";
-		reg = <0xfffffd10 0x10>;
-		clocks = <&clk32k>;
-	};
-
-SHDWC SAMA5D2-Compatible Shutdown Controller
-
-1) shdwc node
-
-required properties:
-- compatible: should be "atmel,sama5d2-shdwc".
-- reg: should contain registers location and length
-- clocks: phandle to input clock.
-- #address-cells: should be one. The cell is the wake-up input index.
-- #size-cells: should be zero.
-
-optional properties:
-
-- debounce-delay-us: minimum wake-up inputs debouncer period in
-  microseconds. It's usually a board-related property.
-- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
-
-The node contains child nodes for each wake-up input that the platform uses.
-
-2) input nodes
-
-Wake-up input nodes are usually described in the "board" part of the Device
-Tree. Note also that input 0 is linked to the wake-up pin and is frequently
-used.
-
-Required properties:
-- reg: should contain the wake-up input index [0 - 15].
-
-Optional properties:
-- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
-  by the child, forces the wake-up of the core power supply on a high level.
-  The default is to be active low.
-
-Example:
-
-On the SoC side:
-	shdwc@f8048010 {
-		compatible = "atmel,sama5d2-shdwc";
-		reg = <0xf8048010 0x10>;
-		clocks = <&clk32k>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		atmel,wakeup-rtc-timer;
-	};
-
-On the board side:
-	shdwc@f8048010 {
-		debounce-delay-us = <976>;
-
-		input@0 {
-			reg = <0>;
-		};
-
-		input@1 {
-			reg = <1>;
-			atmel,wakeup-active-high;
-		};
-	};
-
-Special Function Registers (SFR)
-
-Special Function Registers (SFR) manage specific aspects of the integrated
-memory, bridge implementations, processor and other functionality not controlled
-elsewhere.
-
-required properties:
-- compatible: Should be "atmel,<chip>-sfr", "syscon" or
-	"atmel,<chip>-sfrbu", "syscon"
-  <chip> can be "sama5d3", "sama5d4" or "sama5d2".
-- reg: Should contain registers location and length
-
-	sfr@f0038000 {
-		compatible = "atmel,sama5d3-sfr", "syscon";
-		reg = <0xf0038000 0x60>;
-	};
-
-Security Module (SECUMOD)
-
-The Security Module macrocell provides all necessary secure functions to avoid
-voltage, temperature, frequency and mechanical attacks on the chip. It also
-embeds secure memories that can be scrambled
-
-required properties:
-- compatible: Should be "atmel,<chip>-secumod", "syscon".
-  <chip> can be "sama5d2".
-- reg: Should contain registers location and length
-
-	secumod@fc040000 {
-		compatible = "atmel,sama5d2-secumod", "syscon";
-		reg = <0xfc040000 0x100>;
-	};

Documentation/devicetree/bindings/arm/atmel-sysregs.txt

View file

diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
new file mode 100644
index 0000000..4b96608
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -0,0 +1,171 @@
+Atmel system registers
+
+Chipid required properties:
+- compatible: Should be "atmel,sama5d2-chipid"
+- reg : Should contain registers location and length
+
+PIT Timer required properties:
+- compatible: Should be "atmel,at91sam9260-pit"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt for the PIT which is the IRQ line
+  shared across all System Controller members.
+
+System Timer (ST) required properties:
+- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt for the ST which is the IRQ line
+  shared across all System Controller members.
+- clocks: phandle to input clock.
+Its subnodes can be:
+- watchdog: compatible should be "atmel,at91rm9200-wdt"
+
+RSTC Reset Controller required properties:
+- compatible: Should be "atmel,<chip>-rstc".
+  <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
+- reg: Should contain registers location and length
+- clocks: phandle to input clock.
+
+Example:
+
+	rstc@fffffd00 {
+		compatible = "atmel,at91sam9260-rstc";
+		reg = <0xfffffd00 0x10>;
+		clocks = <&clk32k>;
+	};
+
+RAMC SDRAM/DDR Controller required properties:
+- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
+			"atmel,at91sam9260-sdramc",
+			"atmel,at91sam9g45-ddramc",
+			"atmel,sama5d3-ddramc",
+- reg: Should contain registers location and length
+
+Examples:
+
+	ramc0: ramc@ffffe800 {
+		compatible = "atmel,at91sam9g45-ddramc";
+		reg = <0xffffe800 0x200>;
+	};
+
+SHDWC Shutdown Controller
+
+required properties:
+- compatible: Should be "atmel,<chip>-shdwc".
+  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
+- reg: Should contain registers location and length
+- clocks: phandle to input clock.
+
+optional properties:
+- atmel,wakeup-mode: String, operation mode of the wakeup mode.
+  Supported values are: "none", "high", "low", "any".
+- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
+
+optional at91sam9260 properties:
+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
+
+optional at91sam9rl properties:
+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
+
+optional at91sam9x5 properties:
+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
+
+Example:
+
+	shdwc@fffffd10 {
+		compatible = "atmel,at91sam9260-shdwc";
+		reg = <0xfffffd10 0x10>;
+		clocks = <&clk32k>;
+	};
+
+SHDWC SAMA5D2-Compatible Shutdown Controller
+
+1) shdwc node
+
+required properties:
+- compatible: should be "atmel,sama5d2-shdwc".
+- reg: should contain registers location and length
+- clocks: phandle to input clock.
+- #address-cells: should be one. The cell is the wake-up input index.
+- #size-cells: should be zero.
+
+optional properties:
+
+- debounce-delay-us: minimum wake-up inputs debouncer period in
+  microseconds. It's usually a board-related property.
+- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
+
+The node contains child nodes for each wake-up input that the platform uses.
+
+2) input nodes
+
+Wake-up input nodes are usually described in the "board" part of the Device
+Tree. Note also that input 0 is linked to the wake-up pin and is frequently
+used.
+
+Required properties:
+- reg: should contain the wake-up input index [0 - 15].
+
+Optional properties:
+- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
+  by the child, forces the wake-up of the core power supply on a high level.
+  The default is to be active low.
+
+Example:
+
+On the SoC side:
+	shdwc@f8048010 {
+		compatible = "atmel,sama5d2-shdwc";
+		reg = <0xf8048010 0x10>;
+		clocks = <&clk32k>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		atmel,wakeup-rtc-timer;
+	};
+
+On the board side:
+	shdwc@f8048010 {
+		debounce-delay-us = <976>;
+
+		input@0 {
+			reg = <0>;
+		};
+
+		input@1 {
+			reg = <1>;
+			atmel,wakeup-active-high;
+		};
+	};
+
+Special Function Registers (SFR)
+
+Special Function Registers (SFR) manage specific aspects of the integrated
+memory, bridge implementations, processor and other functionality not controlled
+elsewhere.
+
+required properties:
+- compatible: Should be "atmel,<chip>-sfr", "syscon" or
+	"atmel,<chip>-sfrbu", "syscon"
+  <chip> can be "sama5d3", "sama5d4" or "sama5d2".
+- reg: Should contain registers location and length
+
+	sfr@f0038000 {
+		compatible = "atmel,sama5d3-sfr", "syscon";
+		reg = <0xf0038000 0x60>;
+	};
+
+Security Module (SECUMOD)
+
+The Security Module macrocell provides all necessary secure functions to avoid
+voltage, temperature, frequency and mechanical attacks on the chip. It also
+embeds secure memories that can be scrambled
+
+required properties:
+- compatible: Should be "atmel,<chip>-secumod", "syscon".
+  <chip> can be "sama5d2".
+- reg: Should contain registers location and length
+
+	secumod@fc040000 {
+		compatible = "atmel,sama5d2-secumod", "syscon";
+		reg = <0xfc040000 0x100>;
+	};

Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp

View file

diff --git a/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp b/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp
index c2e0cc5..35e5afb 100644
--- a/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp
+++ b/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp
@@ -14,7 +14,28 @@ Related properties:	(none)
 
 Note:
 This enable method requires valid nodes compatible with
-"al,alpine-cpu-resume" and "al,alpine-nb-service"[1].
+"al,alpine-cpu-resume" and "al,alpine-nb-service".
+
+
+* Alpine CPU resume registers
+
+The CPU resume register are used to define required resume address after
+reset.
+
+Properties:
+- compatible : Should contain "al,alpine-cpu-resume".
+- reg : Offset and length of the register set for the device
+
+
+* Alpine System-Fabric Service Registers
+
+The System-Fabric Service Registers allow various operation on CPU and
+system fabric, like powering CPUs off.
+
+Properties:
+- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
+- reg : Offset and length of the register set for the device
+
 
 Example:
 
@@ -48,5 +69,12 @@ cpus {
 	};
 };
 
---
-[1] arm/al,alpine.txt
+cpu_resume {
+	compatible = "al,alpine-cpu-resume";
+	reg = <0xfbff5ed0 0x30>;
+};
+
+nb_service {
+        compatible = "al,alpine-sysfabric-service", "syscon";
+        reg = <0xfb070000 0x10000>;
+};

Documentation/devicetree/bindings/arm/cpus.txt

View file

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 96dfccc..b0198a1 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -276,7 +276,7 @@ described below.
 		Usage: optional
 		Value type: <prop-encoded-array>
 		Definition: A u32 value that represents the running time dynamic
-			    power coefficient in units of mW/MHz/uV^2. The
+			    power coefficient in units of uW/MHz/V^2. The
 			    coefficient can either be calculated from power
 			    measurements or derived by analysis.
 
@@ -287,7 +287,7 @@ described below.
 
 			    Pdyn = dynamic-power-coefficient * V^2 * f
 
-			    where voltage is in uV, frequency is in MHz.
+			    where voltage is in V, frequency is in MHz.
 
 Example 1 (dual-cluster big.LITTLE system 32-bit):
 

Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt

View file

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
new file mode 100644
index 0000000..b5cb374
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
@@ -0,0 +1,19 @@
+Freescale DCFG
+
+DCFG is the device configuration unit, that provides general purpose
+configuration and status for the device. Such as setting the secondary
+core start address and release the secondary core from holdoff and startup.
+
+Required properties:
+  - compatible: Should contain a chip-specific compatible string,
+	Chip-specific strings are of the form "fsl,<chip>-dcfg",
+	The following <chip>s are known to be supported:
+	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
+
+  - reg : should contain base address and length of DCFG memory-mapped registers
+
+Example:
+	dcfg: dcfg@1ee0000 {
+		compatible = "fsl,ls1021a-dcfg";
+		reg = <0x0 0x1ee0000 0x0 0x10000>;
+	};

Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt

View file

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
new file mode 100644
index 0000000..0ab67b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
@@ -0,0 +1,19 @@
+Freescale SCFG
+
+SCFG is the supplemental configuration unit, that provides SoC specific
+configuration and status registers for the chip. Such as getting PEX port
+status.
+
+Required properties:
+  - compatible: Should contain a chip-specific compatible string,
+	Chip-specific strings are of the form "fsl,<chip>-scfg",
+	The following <chip>s are known to be supported:
+	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
+
+  - reg: should contain base address and length of SCFG memory-mapped registers
+
+Example:
+	scfg: scfg@1570000 {
+		compatible = "fsl,ls1021a-scfg";
+		reg = <0x0 0x1570000 0x0 0x10000>;
+	};

Documentation/devicetree/bindings/arm/fsl.txt

View file

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 8a1baa2..1e775aa 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -101,45 +101,6 @@ Freescale LS1021A Platform Device Tree Bindings
 Required root node compatible properties:
   - compatible = "fsl,ls1021a";
 
-Freescale SoC-specific Device Tree Bindings
--------------------------------------------
-
-Freescale SCFG
-  SCFG is the supplemental configuration unit, that provides SoC specific
-configuration and status registers for the chip. Such as getting PEX port
-status.
-  Required properties:
-  - compatible: Should contain a chip-specific compatible string,
-	Chip-specific strings are of the form "fsl,<chip>-scfg",
-	The following <chip>s are known to be supported:
-	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
-
-  - reg: should contain base address and length of SCFG memory-mapped registers
-
-Example:
-	scfg: scfg@1570000 {
-		compatible = "fsl,ls1021a-scfg";
-		reg = <0x0 0x1570000 0x0 0x10000>;
-	};
-
-Freescale DCFG
-  DCFG is the device configuration unit, that provides general purpose
-configuration and status for the device. Such as setting the secondary
-core start address and release the secondary core from holdoff and startup.
-  Required properties:
-  - compatible: Should contain a chip-specific compatible string,
-	Chip-specific strings are of the form "fsl,<chip>-dcfg",
-	The following <chip>s are known to be supported:
-	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
-
-  - reg : should contain base address and length of DCFG memory-mapped registers
-
-Example:
-	dcfg: dcfg@1ee0000 {
-		compatible = "fsl,ls1021a-dcfg";