projects/linux·commit b84da9fa

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

b84da9fa · Linus Torvalds <[email protected]> · 2015-11-15 09:10:53 -08:00

Pull MIPS updates from Ralf Baechle:
 "These are the highlists of the main MIPS pull request for 4.4:

   - Add latencytop support
   - Support appended DTBs
   - VDSO support and initially use it for gettimeofday.
   - Drop the .MIPS.abiflags and ELF NOTE sections from vmlinux
   - Support for the 5KE, an internal test core.
   - Switch all MIPS platfroms to libata drivers.
   - Improved support, cleanups for ralink and Lantiq platforms.
   - Support for the new xilfpga platform.
   - A number of DTB improvments for BMIPS.
   - Improved support for CM and CPS.
   - Minor JZ4740 and BCM47xx enhancements"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (120 commits)
  MIPS: idle: add case for CPU_5KE
  MIPS: Octeon: Support APPENDED_DTB
  MIPS: vmlinux: create a section for appended DTB
  MIPS: Clean up compat_siginfo_t
  MIPS: Fix PAGE_MASK definition
  MIPS: BMIPS: Enable GZIP ramdisk and timed printks
  MIPS: Add xilfpga defconfig
  MIPS: xilfpga: Add mipsfpga platform code
  MIPS: xilfpga: Add xilfpga device tree files.
  dt-bindings: MIPS: Document xilfpga bindings and boot style
  MIPS: Make MIPS_CMDLINE_DTB default
  MIPS: Make the kernel arguments from dtb available
  MIPS: Use USE_OF as the guard for appended dtb
  MIPS: BCM63XX: Use pr_* instead of printk
  MIPS: Loongson: Cleanup CONFIG_LOONGSON_SUSPEND.
  MIPS: lantiq: Disable xbar fpi burst mode
  MIPS: lantiq: Force the crossbar to big endian
  MIPS: lantiq: Initialize the USB core on boot
  MIPS: lantiq: Return correct value for fpi clock on ar9
  MIPS: ralink: Add missing clock on rt305x
  ...
Commit
b84da9fa47cf6e8dfd71d673a2f744ec1cac452c
Parents
12b76f3b · da342326

Merge commit. Changes below are compared with the first parent: 12b76f3b.

Changes

151 files changed · +4590 −749

FileStatusAddDelContent
Documentation/devicetree/bindings/mips/img/xilfpga.txtadded+83−0View file
arch/mips/Kbuildmodified+1−0View file
arch/mips/Kbuild.platformsmodified+1−0View file
arch/mips/Kconfigmodified+84−4View file
arch/mips/Kconfig.debugmodified+72−0View file
arch/mips/Makefilemodified+4−0View file
arch/mips/bcm47xx/setup.cmodified+18−1View file
arch/mips/bcm47xx/sprom.cmodified+22−24View file
arch/mips/bcm63xx/boards/board_bcm963xx.cmodified+7−7View file
arch/mips/bcm63xx/cpu.cmodified+6−6View file
arch/mips/bcm63xx/dev-pcmcia.cmodified+1−1View file
arch/mips/bcm63xx/irq.cmodified+1−1View file
arch/mips/bcm63xx/setup.cmodified+4−4View file
arch/mips/bcm63xx/timer.cmodified+1−1View file
arch/mips/bmips/setup.cmodified+0−1View file
arch/mips/boot/dts/Makefilemodified+1−0View file
arch/mips/boot/dts/brcm/bcm7346.dtsimodified+112−2View file
arch/mips/boot/dts/brcm/bcm7358.dtsimodified+60−2View file
arch/mips/boot/dts/brcm/bcm7360.dtsimodified+60−2View file
arch/mips/boot/dts/brcm/bcm7362.dtsimodified+92−2View file
arch/mips/boot/dts/brcm/bcm7425.dtsimodified+42−0View file
arch/mips/boot/dts/brcm/bcm97346dbsmb.dtsmodified+28−0View file
arch/mips/boot/dts/brcm/bcm97358svmb.dtsmodified+16−0View file
arch/mips/boot/dts/brcm/bcm97360svmb.dtsmodified+16−0View file
arch/mips/boot/dts/brcm/bcm97362svmb.dtsmodified+20−0View file
arch/mips/boot/dts/mti/malta.dtsmodified+4−0View file
arch/mips/boot/dts/xilfpga/Makefileadded+9−0View file
arch/mips/boot/dts/xilfpga/microAptiv.dtsiadded+21−0View file
arch/mips/boot/dts/xilfpga/nexys4ddr.dtsadded+46−0View file
arch/mips/cavium-octeon/setup.cmodified+9−2View file
arch/mips/configs/bigsur_defconfigmodified+6−6View file
arch/mips/configs/bmips_be_defconfigmodified+2−1View file
arch/mips/configs/bmips_stb_defconfigmodified+2−1View file
arch/mips/configs/capcella_defconfigmodified+3−3View file
arch/mips/configs/e55_defconfigmodified+3−3View file
arch/mips/configs/fuloong2e_defconfigmodified+5−9View file
arch/mips/configs/lasat_defconfigmodified+5−5View file
arch/mips/configs/lemote2f_defconfigmodified+3−8View file
arch/mips/configs/malta_defconfigmodified+2−4View file
arch/mips/configs/malta_kvm_defconfigmodified+9−7View file
arch/mips/configs/malta_kvm_guest_defconfigmodified+9−7View file
arch/mips/configs/malta_qemu_32r6_defconfigmodified+5−6View file
arch/mips/configs/maltaaprp_defconfigmodified+5−6View file
arch/mips/configs/maltasmvp_eva_defconfigmodified+5−6View file
arch/mips/configs/maltaup_defconfigmodified+5−6View file
arch/mips/configs/maltaup_xpa_defconfigmodified+9−7View file
arch/mips/configs/mpc30x_defconfigmodified+3−3View file
arch/mips/configs/xilfpga_defconfigadded+40−0View file
arch/mips/include/asm/abi.hmodified+3−2View file
arch/mips/include/asm/atomic.hmodified+1−1View file
arch/mips/include/asm/bcache.hmodified+27−0View file
arch/mips/include/asm/cdmm.hmodified+11−0View file
arch/mips/include/asm/clocksource.hadded+29−0View file
arch/mips/include/asm/compat.hmodified+34−28View file
arch/mips/include/asm/cpu-features.hmodified+1−5View file
arch/mips/include/asm/debug.hadded+22−0View file
arch/mips/include/asm/elf.hmodified+7−0View file
arch/mips/include/asm/fw/fw.hmodified+0−16View file
arch/mips/include/asm/mach-bcm47xx/bcm47xx.hmodified+0−5View file
arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.hmodified+14−0View file
arch/mips/include/asm/mach-malta/malta-dtshim.hadded+29−0View file
arch/mips/include/asm/mach-ralink/mt7620.hmodified+1−7View file
arch/mips/include/asm/mach-ralink/ralink_regs.hmodified+17−0View file
arch/mips/include/asm/mach-ralink/rt305x.hmodified+6−15View file
arch/mips/include/asm/mach-xilfpga/irq.hadded+18−0View file
arch/mips/include/asm/mips-cm.hmodified+70−8View file
arch/mips/include/asm/mips-cpc.hmodified+2−1View file
arch/mips/include/asm/mipsregs.hmodified+9−9View file
arch/mips/include/asm/page.hmodified+1−1View file
arch/mips/include/asm/processor.hmodified+1−7View file
arch/mips/include/asm/vdso.hmodified+123−16View file
arch/mips/include/uapi/asm/Kbuildmodified+1−1View file
arch/mips/include/uapi/asm/auxvec.hadded+17−0View file
arch/mips/jz4740/board-qi_lb60.cmodified+8−5View file
arch/mips/kernel/Makefilemodified+1−0View file
arch/mips/kernel/cps-vec-ns16550.Sadded+202−0View file
arch/mips/kernel/cps-vec.Smodified+36−8View file
arch/mips/kernel/cpu-probe.cmodified+1−2View file
arch/mips/kernel/csrc-r4k.cmodified+44−0View file
arch/mips/kernel/idle.cmodified+14−3View file
arch/mips/kernel/mips-cm.cmodified+83−31View file
arch/mips/kernel/mips-cpc.cmodified+6−0View file
arch/mips/kernel/mips-r2-to-r6-emul.cmodified+1−1View file
arch/mips/kernel/segment.cmodified+1−1View file
arch/mips/kernel/setup.cmodified+22−7View file
arch/mips/kernel/signal.cmodified+5−7View file
arch/mips/kernel/signal32.cmodified+2−5View file
arch/mips/kernel/signal_n32.cmodified+2−3View file
arch/mips/kernel/smp-cps.cmodified+30−5View file
arch/mips/kernel/smp-gic.cmodified+2−0View file
arch/mips/kernel/spinlock_test.cmodified+1−3View file
arch/mips/kernel/stacktrace.cmodified+15−12View file
arch/mips/kernel/traps.cmodified+5−6View file
arch/mips/kernel/unaligned.cmodified+1−1View file
arch/mips/kernel/vdso.cmodified+130−77View file
arch/mips/kernel/vmlinux.lds.Smodified+14−1View file
arch/mips/kvm/locore.Smodified+0−8View file
arch/mips/lantiq/clk.cmodified+17−0View file
arch/mips/lantiq/clk.hmodified+13−0View file
arch/mips/lantiq/irq.cmodified+4−4View file
arch/mips/lantiq/prom.cmodified+0−2View file
arch/mips/lantiq/xway/clk.cmodified+170−10View file
arch/mips/lantiq/xway/prom.cmodified+33−2View file
arch/mips/lantiq/xway/reset.cmodified+175−21View file
arch/mips/lantiq/xway/sysctrl.cmodified+262−39View file
arch/mips/lib/Makefilemodified+1−1View file
arch/mips/lib/bswapdi.cadded+15−0View file
arch/mips/lib/bswapsi.cadded+11−0View file
arch/mips/loongson64/Kconfigmodified+0−5View file
arch/mips/loongson64/common/Makefilemodified+1−1View file
arch/mips/loongson64/lemote-2f/Makefilemodified+1−1View file
arch/mips/math-emu/me-debugfs.cmodified+1−1View file
arch/mips/mm/Makefilemodified+1−0View file
arch/mips/mm/sc-debugfs.cadded+81−0View file
arch/mips/mm/sc-mips.cmodified+62−3View file
arch/mips/mm/tlbex.cmodified+62−35View file
arch/mips/mti-malta/Makefilemodified+12−3View file
arch/mips/mti-malta/malta-dtshim.cadded+162−0View file
arch/mips/mti-malta/malta-init.cmodified+1−0View file
arch/mips/mti-malta/malta-memory.cmodified+2−129View file
arch/mips/mti-malta/malta-setup.cmodified+4−1View file
arch/mips/netlogic/xlp/dt.cmodified+0−1View file
arch/mips/pci/pci-rt3883.cmodified+2−4View file
arch/mips/pistachio/init.cmodified+0−1View file
arch/mips/ralink/cevt-rt3352.cmodified+1−1View file
arch/mips/ralink/early_printk.cmodified+26−0View file
arch/mips/ralink/mt7620.cmodified+50−13View file
arch/mips/ralink/of.cmodified+0−2View file
arch/mips/ralink/prom.cmodified+5−0View file
arch/mips/ralink/reset.cmodified+10−3View file
arch/mips/ralink/rt288x.cmodified+1−0View file
arch/mips/ralink/rt305x.cmodified+6−7View file
arch/mips/ralink/rt3883.cmodified+2−0View file
arch/mips/vdso/.gitignoreadded+4−0View file
arch/mips/vdso/Makefileadded+160−0View file
arch/mips/vdso/elf.Sadded+68−0View file
arch/mips/vdso/genvdso.cadded+293−0View file
arch/mips/vdso/genvdso.hadded+187−0View file
arch/mips/vdso/gettimeofday.cadded+232−0View file
arch/mips/vdso/sigreturn.Sadded+49−0View file
arch/mips/vdso/vdso.hadded+89−0View file
arch/mips/vdso/vdso.lds.Sadded+105−0View file
arch/mips/xilfpga/Kconfigadded+9−0View file
arch/mips/xilfpga/Makefileadded+7−0View file
arch/mips/xilfpga/Platformadded+3−0View file
arch/mips/xilfpga/init.cadded+57−0View file
arch/mips/xilfpga/intc.cadded+25−0View file
arch/mips/xilfpga/time.cadded+41−0View file
drivers/clocksource/mips-gic-timer.cmodified+4−3View file
drivers/irqchip/irq-mips-gic.cmodified+14−0View file
include/linux/irqchip/mips-gic.hmodified+17−0View file

Only the first 600 diff lines are shown. Download the complete patch.

Documentation/devicetree/bindings/mips/img/xilfpga.txt

View file
diff --git a/Documentation/devicetree/bindings/mips/img/xilfpga.txt b/Documentation/devicetree/bindings/mips/img/xilfpga.txt
new file mode 100644
index 0000000..57e7ee9
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/img/xilfpga.txt
@@ -0,0 +1,83 @@
+Imagination University Program MIPSfpga
+=======================================
+
+Under the Imagination University Program, a microAptiv UP core has been
+released for academic usage.
+
+As we are dealing with a MIPS core instantiated on an FPGA, specifications
+are fluid and can be varied in RTL.
+
+This binding document is provided as baseline guidance for the example
+project provided by IMG.
+
+The example project runs on the Nexys4DDR board by Digilent powered by
+the ARTIX-7 FPGA by Xilinx.
+
+Relevant details about the example project and the Nexys4DDR board:
+
+- microAptiv UP core m14Kc
+- 50MHz clock speed
+- 128Mbyte DDR RAM at 0x0000_0000
+- 8Kbyte RAM at 0x1000_0000
+- axi_intc at 0x1020_0000
+- axi_uart16550 at 0x1040_0000
+- axi_gpio at 0x1060_0000
+- axi_i2c at 0x10A0_0000
+- custom_gpio at 0x10C0_0000
+- axi_ethernetlite at 0x10E0_0000
+- 8Kbyte BootRAM at 0x1FC0_0000
+
+Required properties:
+--------------------
+ - compatible: Must include "digilent,nexys4ddr","img,xilfpga".
+
+CPU nodes:
+----------
+A "cpus" node is required. Required properties:
+ - #address-cells: Must be 1.
+ - #size-cells: Must be 0.
+A CPU sub-node is also required for at least CPU 0. Required properties:
+ - device_type: Must be "cpu".
+ - compatible: Must be "mips,m14Kc".
+ - reg: Must be <0>.
+ - clocks: phandle to ext clock for fixed-clock received by MIPS core.
+
+Example:
+
+ compatible = "img,xilfpga","digilent,nexys4ddr";
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,m14Kc";
+ reg = <0>;
+ clocks = <&ext>;
+ };
+ };
+
+ ext: ext {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+
+Boot protocol:
+--------------
+
+The BootRAM is a writeable "RAM" in FPGA at 0x1FC0_0000.
+This is for easy reprogrammibility via JTAG.
+
+The BootRAM initializes the cache and the axi_uart peripheral.
+
+DDR initialization is already handled by a HW IP block.
+
+When the example project bitstream is loaded, the cpu_reset button
+needs to be pressed.
+
+The bootram initializes the cache and axi_uart.
+Then outputs MIPSFPGA\n\r on the serial port on the Nexys4DDR board.
+
+At this point, the board is ready to load the Linux kernel
+vmlinux file via JTAG.

arch/mips/Kbuild

View file
diff --git a/arch/mips/Kbuild b/arch/mips/Kbuild
index dd29533..5c3f688 100644
--- a/arch/mips/Kbuild
+++ b/arch/mips/Kbuild
@@ -17,6 +17,7 @@ obj- := $(platform-)
obj-y += kernel/
obj-y += mm/
obj-y += net/
+obj-y += vdso/
ifdef CONFIG_KVM
obj-y += kvm/

arch/mips/Kbuild.platforms

View file
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index a424e46..a96c81d 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -33,6 +33,7 @@ platforms += sibyte
platforms += sni
platforms += txx9
platforms += vr41xx
+platforms += xilfpga
# include the platform specific files
include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms))

arch/mips/Kconfig

View file
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e3aa5b0..71683a8 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -5,6 +5,7 @@ config MIPS
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_MIGHT_HAVE_PC_SERIO
select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
+ select ARCH_USE_BUILTIN_BSWAP
select HAVE_CONTEXT_TRACKING
select HAVE_GENERIC_DMA_COHERENT
select HAVE_IDE
@@ -60,6 +61,8 @@ config MIPS
select SYSCTL_EXCEPTION_TRACE
select HAVE_VIRT_CPU_ACCOUNTING_GEN
select HAVE_IRQ_TIME_ACCOUNTING
+ select GENERIC_TIME_VSYSCALL
+ select ARCH_CLOCKSOURCE_DATA
menu "Machine selection"
@@ -401,6 +404,28 @@ config MACH_PISTACHIO
help
This enables support for the IMG Pistachio SoC platform.
+config MACH_XILFPGA
+ bool "MIPSfpga Xilinx based boards"
+ select ARCH_REQUIRE_GPIOLIB
+ select BOOT_ELF32
+ select BOOT_RAW
+ select BUILTIN_DTB
+ select CEVT_R4K
+ select COMMON_CLK
+ select CSRC_R4K
+ select IRQ_MIPS_CPU
+ select LIBFDT
+ select MIPS_CPU_SCACHE
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_ZBOOT_UART16550
+ select USE_OF
+ select USE_GENERIC_EARLY_PRINTK_8250
+ help
+ This enables support for the IMG University Program MIPSfpga platform.
+
config MIPS_MALTA
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
@@ -424,6 +449,7 @@ config MIPS_MALTA
select MIPS_L1_CACHE_SHIFT_6
select PCI_GT64XXX_PCI0
select MIPS_MSC
+ select SMP_UP if SMP
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
@@ -449,6 +475,8 @@ config MIPS_MALTA
select SYS_SUPPORTS_ZBOOT
select USE_OF
select ZONE_DMA32 if 64BIT
+ select BUILTIN_DTB
+ select LIBFDT
help
This enables support for the MIPS Technologies Malta evaluation
board.
@@ -964,6 +992,7 @@ source "arch/mips/loongson32/Kconfig"
source "arch/mips/loongson64/Kconfig"
source "arch/mips/netlogic/Kconfig"
source "arch/mips/paravirt/Kconfig"
+source "arch/mips/xilfpga/Kconfig"
endmenu
@@ -1036,6 +1065,9 @@ config CSRC_R4K
config CSRC_SB1250
bool
+config MIPS_CLOCK_VSYSCALL
+ def_bool CSRC_R4K || CLKSRC_MIPS_GIC
+
config GPIO_TXX9
select ARCH_REQUIRE_GPIOLIB
bool
@@ -2529,6 +2561,9 @@ choice
help
Allows the configuration of the timer frequency.
+ config HZ_24
+ bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
+
config HZ_48
bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
@@ -2552,6 +2587,9 @@ choice
endchoice
+config SYS_SUPPORTS_24HZ
+ bool
+
config SYS_SUPPORTS_48HZ
bool
@@ -2575,13 +2613,18 @@ config SYS_SUPPORTS_1024HZ
config SYS_SUPPORTS_ARBIT_HZ
bool
- default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
- !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
- !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
+ default y if !SYS_SUPPORTS_24HZ && \
+ !SYS_SUPPORTS_48HZ && \
+ !SYS_SUPPORTS_100HZ && \
+ !SYS_SUPPORTS_128HZ && \
+ !SYS_SUPPORTS_250HZ && \
+ !SYS_SUPPORTS_256HZ && \
+ !SYS_SUPPORTS_1000HZ && \
!SYS_SUPPORTS_1024HZ
config HZ
int
+ default 24 if HZ_24
default 48 if HZ_48
default 100 if HZ_100
default 128 if HZ_128
@@ -2685,7 +2728,7 @@ config BUILTIN_DTB
bool
choice
- prompt "Kernel appended dtb support" if OF
+ prompt "Kernel appended dtb support" if USE_OF
default MIPS_NO_APPENDED_DTB
config MIPS_NO_APPENDED_DTB
@@ -2693,6 +2736,20 @@ choice
help
Do not enable appended dtb support.
+ config MIPS_ELF_APPENDED_DTB
+ bool "vmlinux"
+ help
+ With this option, the boot code will look for a device tree binary
+ DTB) included in the vmlinux ELF section .appended_dtb. By default
+ it is empty and the DTB can be appended using binutils command
+ objcopy:
+
+ objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
+
+ This is meant as a backward compatiblity convenience for those
+ systems with a bootloader that can't be upgraded to accommodate
+ the documented boot protocol using a device tree.
+
config MIPS_RAW_APPENDED_DTB
bool "vmlinux.bin"
help
@@ -2729,6 +2786,25 @@ choice
if you don't intend to always append a DTB.
endchoice
+choice
+ prompt "Kernel command line type" if !CMDLINE_OVERRIDE
+ default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
+ !MIPS_MALTA && !MIPS_SEAD3 && \
+ !CAVIUM_OCTEON_SOC
+ default MIPS_CMDLINE_FROM_BOOTLOADER
+
+ config MIPS_CMDLINE_FROM_DTB
+ depends on USE_OF
+ bool "Dtb kernel arguments if available"
+
+ config MIPS_CMDLINE_DTB_EXTEND
+ depends on USE_OF
+ bool "Extend dtb kernel arguments with bootloader arguments"
+
+ config MIPS_CMDLINE_FROM_BOOTLOADER
+ bool "Bootloader kernel arguments if available"
+endchoice
+
endmenu
config LOCKDEP_SUPPORT
@@ -2739,6 +2815,10 @@ config STACKTRACE_SUPPORT
bool
default y
+config HAVE_LATENCYTOP_SUPPORT
+ bool
+ default y
+
config PGTABLE_LEVELS
int
default 3 if 64BIT && !PAGE_SIZE_64KB

arch/mips/Kconfig.debug

View file
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index e250524..f0e314c 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -113,4 +113,76 @@ config SPINLOCK_TEST
help
Add several files to the debugfs to test spinlock speed.
+if CPU_MIPSR6
+
+choice
+ prompt "Compact branch policy"
+ default MIPS_COMPACT_BRANCHES_OPTIMAL
+
+config MIPS_COMPACT_BRANCHES_NEVER
+ bool "Never (force delay slot branches)"
+ help
+ Pass the -mcompact-branches=never flag to the compiler in order to
+ force it to always emit branches with delay slots, and make no use
+ of the compact branch instructions introduced by MIPSr6. This is
+ useful if you suspect there may be an issue with compact branches in
+ either the compiler or the CPU.
+
+config MIPS_COMPACT_BRANCHES_OPTIMAL
+ bool "Optimal (use where beneficial)"
+ help
+ Pass the -mcompact-branches=optimal flag to the compiler in order for
+ it to make use of compact branch instructions where it deems them
+ beneficial, and use branches with delay slots elsewhere. This is the
+ default compiler behaviour, and should be used unless you have a
+ reason to choose otherwise.
+
+config MIPS_COMPACT_BRANCHES_ALWAYS
+ bool "Always (force compact branches)"
+ help
+ Pass the -mcompact-branches=always flag to the compiler in order to
+ force it to always emit compact branches, making no use of branch
+ instructions with delay slots. This can result in more compact code
+ which may be beneficial in some scenarios.
+
+endchoice
+
+endif # CPU_MIPSR6
+
+config SCACHE_DEBUGFS
+ bool "L2 cache debugfs entries"
+ depends on DEBUG_FS
+ help
+ Enable this to allow parts of the L2 cache configuration, such as
+ whether or not prefetching is enabled, to be exposed to userland
+ via debugfs.
+
+ If unsure, say N.
+
+menuconfig MIPS_CPS_NS16550
+ bool "CPS SMP NS16550 UART output"
+ depends on MIPS_CPS
+ help
+ Output debug information via an ns16550 compatible UART if exceptions
+ occur early in the boot process of a secondary core.
+
+if MIPS_CPS_NS16550
+
+config MIPS_CPS_NS16550_BASE
+ hex "UART Base Address"
+ default 0x1b0003f8 if MIPS_MALTA
+ help
+ The base address of the ns16550 compatible UART on which to output
+ debug information from the early stages of core startup.
+
+config MIPS_CPS_NS16550_SHIFT
+ int "UART Register Shift"
+ default 0 if MIPS_MALTA
+ help
+ The number of bits to shift ns16550 register indices by in order to
+ form their addresses. That is, log base 2 of the span between
+ adjacent ns16550 registers in the system.
+
+endif # MIPS_CPS_NS16550
+
endmenu

arch/mips/Makefile

View file
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 252e347..3f70ba5 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -204,6 +204,10 @@ toolchain-msa := $(call cc-option-yn,$(mips-cflags) -mhard-float -mfp64 -Wa$(
cflags-$(toolchain-msa) += -DTOOLCHAIN_SUPPORTS_MSA
endif
+cflags-$(CONFIG_MIPS_COMPACT_BRANCHES_NEVER) += -mcompact-branches=never
+cflags-$(CONFIG_MIPS_COMPACT_BRANCHES_OPTIMAL) += -mcompact-branches=optimal
+cflags-$(CONFIG_MIPS_COMPACT_BRANCHES_ALWAYS) += -mcompact-branches=always
+
#
# Firmware support
#

arch/mips/bcm47xx/setup.c

View file
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 17503a0..6d38948 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -105,11 +105,28 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
struct ssb_init_invariants *iv)
{
char buf[20];
+ int len, err;
/* Fill boardinfo structure */
memset(&iv->boardinfo, 0 , sizeof(struct ssb_boardinfo));
- bcm47xx_fill_ssb_boardinfo(&iv->boardinfo, NULL);
+ len = bcm47xx_nvram_getenv("boardvendor", buf, sizeof(buf));
+ if (len > 0) {
+ err = kstrtou16(strim(buf), 0, &iv->boardinfo.vendor);
+ if (err)
+ pr_warn("Couldn't parse nvram board vendor entry with value \"%s\"\n",
+ buf);
+ }
+ if (!iv->boardinfo.vendor)
+ iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
+
+ len = bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf));
+ if (len > 0) {
+ err = kstrtou16(strim(buf), 0, &iv->boardinfo.type);
+ if (err)
+ pr_warn("Couldn't parse nvram board type entry with value \"%s\"\n",
+ buf);
+ }
memset(&iv->sprom, 0, sizeof(struct ssb_sprom));
bcm47xx_fill_sprom(&iv->sprom, NULL, false);

arch/mips/bcm47xx/sprom.c

View file
diff --git a/arch/mips/bcm47xx/sprom.c b/arch/mips/bcm47xx/sprom.c
index 2d5c7a7..a7e569c 100644
--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
@@ -60,9 +60,9 @@ static int get_nvram_var(const char *prefix, const char *postfix,
}
#define NVRAM_READ_VAL(type) \
-static void nvram_read_ ## type (const char *prefix, \
- const char *postfix, const char *name, \
- type *val, type allset, bool fallback) \
+static void nvram_read_ ## type(const char *prefix, \
+ const char *postfix, const char *name, \
+ type *val, type allset, bool fallback) \
{ \
char buf[100]; \
int err; \
@@ -422,7 +422,10 @@ static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
int i;
for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
- struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
+ struct ssb_sprom_core_pwr_info *pwr_info;
+
+ pwr_info = &sprom->core_pwr_info[i];
+
snprintf(postfix, sizeof(postfix), "%i", i);
nvram_read_u8(prefix, postfix, "maxp2ga",
&pwr_info->maxpwr_2g, 0, fallback);
@@ -470,7 +473,10 @@ static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
int i;
for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
- struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
+ struct ssb_sprom_core_pwr_info *pwr_info;
+
+ pwr_info = &sprom->core_pwr_info[i];
+
snprintf(postfix, sizeof(postfix), "%i", i);
nvram_read_u16(prefix, postfix, "pa2gw3a",
&pwr_info->pa_2g[3], 0, fallback);
@@ -535,10 +541,11 @@ static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
/* The address prefix 00:90:4C is used by Broadcom in their initial
- configuration. When a mac address with the prefix 00:90:4C is used
- all devices from the same series are sharing the same mac address.
- To prevent mac address collisions we replace them with a mac address
- based on the base address. */
+ * configuration. When a mac address with the prefix 00:90:4C is used
+ * all devices from the same series are sharing the same mac address.
+ * To prevent mac address collisions we replace them with a mac address
+ * based on the base address.
+ */
if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
u8 mac[6];
@@ -592,32 +599,23 @@ void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
}
-#ifdef CONFIG_BCM47XX_SSB
-void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,
- const char *prefix)
-{
- nvram_read_u16(prefix, NULL, "boardvendor", &boardinfo->vendor, 0,
- true);
- if (!boardinfo->vendor)
- boardinfo->vendor = SSB_BOARDVENDOR_BCM;
-
- nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0, true);
-}
-#endif
-
#if defined(CONFIG_BCM47XX_SSB)
static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
{
char prefix[10];
- if (bus->bustype == SSB_BUSTYPE_PCI) {
+ switch (bus->bustype) {
+ case SSB_BUSTYPE_SSB:
+ bcm47xx_fill_sprom(out, NULL, false);
+ return 0;
+ case SSB_BUSTYPE_PCI:
memset(out, 0, sizeof(struct ssb_sprom));
snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
bus->host_pci->bus->number + 1,
PCI_SLOT(bus->host_pci->devfn));
bcm47xx_fill_sprom(out, prefix, false);
return 0;
- } else {
+ default:
pr_warn("Unable to fill SPROM for given bustype.\n");
return -EINVAL;
}

arch/mips/bcm63xx/boards/board_bcm963xx.c

View file
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 33727e7..b2097c0 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -7,6 +7,8 @@
* Copyright (C) 2008 Florian Fainelli <[email protected]>
*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
@@ -31,7 +33,6 @@
#include <uapi/linux/bcm933xx_hcs.h>
-#define PFX "board_bcm963xx: "
#define HCS_OFFSET_128K 0x20000
@@ -740,7 +741,7 @@ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
return 0;
} else {
- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+ pr_err("unable to fill SPROM for given bustype\n");
return -EINVAL;
}
}
@@ -784,7 +785,7 @@ void __init board_prom_init(void)
cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
else
strcpy(cfe_version, "unknown");
- printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
+ pr_info("CFE version: %s\n", cfe_version);
bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET);
@@ -808,8 +809,7 @@ void __init board_prom_init(void)
char name[17];
memcpy(name, board_name, 16);
name[16] = 0;
- printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
- name);
+ pr_err("unknown bcm963xx board: %s\n", name);
return;
}
@@ -854,7 +854,7 @@ void __init board_setup(void)
{
if (!board.name[0])
panic("unable to detect bcm963xx board");
- printk(KERN_INFO PFX "board name: %s\n", board.name);
+ pr_info("board name: %s\n", board.name);
/* make sure we're running on expected cpu */
if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
@@ -910,7 +910,7 @@ int __init board_register_devices(void)
memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
if (ssb_arch_register_fallback_sprom(
&bcm63xx_get_fallback_sprom) < 0)
- pr_err(PFX "failed to register fallback SPROM\n");
+ pr_err("failed to register fallback SPROM\n");
}
#endif

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arch/mips/xilfpga/time.c

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drivers/clocksource/mips-gic-timer.c

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drivers/irqchip/irq-mips-gic.c

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include/linux/irqchip/mips-gic.h

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