Merge tag 'arm-imx-clk-fixes' of git://git.pengutronix.de/git/imx/linux-2.6 into next/fixes-non-critical

be8fd292 · Arnd Bergmann <[email protected]> · 2013-02-19 22:45:33 +01:00

ARM: i.MX: clock fixes

- fix wrong timer clock on i.MX25 leading to strange timing inconsistencies
- fix SPI clocks for i.MX27

* tag 'arm-imx-clk-fixes' of git://git.pengutronix.de/git/imx/linux-2.6:
  ARM: i.MX25: clk: parent per5_clk to AHB clock
  ARM: imx27: clk-imx27: SPI: Rename IPG clock and add PER clock

Signed-off-by: Arnd Bergmann <[email protected]>

Commit: be8fd292f9b1ed787a04cb4437f7faef16c4afef
Parents: f12a500e · 4b526ca5

Merge commit. Changes below are compared with the first parent: f12a500e.

Changes

2 files changed · +9 −3

File	Status	Add	Del	Content
arch/arm/mach-imx/clk-imx25.c	modified	+3	−0	View file
arch/arm/mach-imx/clk-imx27.c	modified	+6	−3	View file

arch/arm/mach-imx/clk-imx25.c

View file

diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 2c570cd..69858c7 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -224,6 +224,9 @@ static int __init __mx25_clocks_init(unsigned long osc_rate)
 
 	clk_prepare_enable(clk[emi_ahb]);
 
+	/* Clock source for gpt must be derived from AHB */
+	clk_set_parent(clk[per5_sel], clk[ahb]);
+
 	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
 	clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
 

arch/arm/mach-imx/clk-imx27.c

View file

diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 1ffe3b5..e30369a 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -228,9 +228,12 @@ int __init mx27_clocks_init(unsigned long fref)
 	clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
 	clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
 	clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
-	clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");
-	clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");
-	clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");
+	clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.0");
+	clk_register_clkdev(clk[cspi1_ipg_gate], "ipg", "imx27-cspi.0");
+	clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.1");
+	clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx27-cspi.1");
+	clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.2");
+	clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx27-cspi.2");
 	clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
 	clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
 	clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");